1 // Auto-generated file. Do not edit!
2 // Template: src/f32-dwconv/up-wasmsimd.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <wasm_simd128.h>
13
14 #include <xnnpack/dwconv.h>
15
16
xnn_f32_dwconv_minmax_ukernel_up8x9__wasmsimd_arm_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,size_t input_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_dwconv_minmax_ukernel_up8x9__wasmsimd_arm_acc2(
18 size_t channels,
19 size_t output_width,
20 const float** input,
21 const float* weights,
22 float* output,
23 size_t input_stride,
24 size_t output_increment,
25 size_t input_offset,
26 const float* zero,
27 const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
28 {
29 assert(channels != 0);
30 assert(output_width != 0);
31
32 const v128_t vmin = wasm_v32x4_load_splat(¶ms->scalar.min);
33 const v128_t vmax = wasm_v32x4_load_splat(¶ms->scalar.max);
34 do {
35 const float* i0 = input[0];
36 assert(i0 != NULL);
37 if XNN_UNPREDICTABLE(i0 != zero) {
38 i0 = (const float*) ((uintptr_t) i0 + input_offset);
39 }
40 const float* i1 = input[1];
41 assert(i1 != NULL);
42 if XNN_UNPREDICTABLE(i1 != zero) {
43 i1 = (const float*) ((uintptr_t) i1 + input_offset);
44 }
45 const float* i2 = input[2];
46 assert(i2 != NULL);
47 if XNN_UNPREDICTABLE(i2 != zero) {
48 i2 = (const float*) ((uintptr_t) i2 + input_offset);
49 }
50 const float* i3 = input[3];
51 assert(i3 != NULL);
52 if XNN_UNPREDICTABLE(i3 != zero) {
53 i3 = (const float*) ((uintptr_t) i3 + input_offset);
54 }
55 const float* i4 = input[4];
56 assert(i4 != NULL);
57 if XNN_UNPREDICTABLE(i4 != zero) {
58 i4 = (const float*) ((uintptr_t) i4 + input_offset);
59 }
60 const float* i5 = input[5];
61 assert(i5 != NULL);
62 if XNN_UNPREDICTABLE(i5 != zero) {
63 i5 = (const float*) ((uintptr_t) i5 + input_offset);
64 }
65 const float* i6 = input[6];
66 assert(i6 != NULL);
67 if XNN_UNPREDICTABLE(i6 != zero) {
68 i6 = (const float*) ((uintptr_t) i6 + input_offset);
69 }
70 const float* i7 = input[7];
71 assert(i7 != NULL);
72 if XNN_UNPREDICTABLE(i7 != zero) {
73 i7 = (const float*) ((uintptr_t) i7 + input_offset);
74 }
75 const float* i8 = input[8];
76 assert(i8 != NULL);
77 if XNN_UNPREDICTABLE(i8 != zero) {
78 i8 = (const float*) ((uintptr_t) i8 + input_offset);
79 }
80 input = (const float**) ((uintptr_t) input + input_stride);
81
82 size_t c = channels;
83 const float* w = weights;
84 for (; c >= 8; c -= 8) {
85 v128_t vacc0123p0 = wasm_v128_load(w);
86 v128_t vacc4567p0 = wasm_v128_load(w + 4);
87
88
89 const v128_t vi0x0123 = wasm_v128_load(i0);
90 const v128_t vi0x4567 = wasm_v128_load(i0 + 4);
91 i0 += 8;
92
93 const v128_t vk0x0123 = wasm_v128_load(w + 8);
94 const v128_t vk0x4567 = wasm_v128_load(w + 12);
95 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi0x0123, vk0x0123));
96 vacc4567p0 = wasm_f32x4_add(vacc4567p0, wasm_f32x4_mul(vi0x4567, vk0x4567));
97
98 const v128_t vi1x0123 = wasm_v128_load(i1);
99 const v128_t vi1x4567 = wasm_v128_load(i1 + 4);
100 i1 += 8;
101
102 const v128_t vk1x0123 = wasm_v128_load(w + 16);
103 const v128_t vk1x4567 = wasm_v128_load(w + 20);
104 v128_t vacc0123p1 = wasm_f32x4_mul(vi1x0123, vk1x0123);
105 v128_t vacc4567p1 = wasm_f32x4_mul(vi1x4567, vk1x4567);
106
107 const v128_t vi2x0123 = wasm_v128_load(i2);
108 const v128_t vi2x4567 = wasm_v128_load(i2 + 4);
109 i2 += 8;
110
111 const v128_t vk2x0123 = wasm_v128_load(w + 24);
112 const v128_t vk2x4567 = wasm_v128_load(w + 28);
113 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi2x0123, vk2x0123));
114 vacc4567p0 = wasm_f32x4_add(vacc4567p0, wasm_f32x4_mul(vi2x4567, vk2x4567));
115
116 const v128_t vi3x0123 = wasm_v128_load(i3);
117 const v128_t vi3x4567 = wasm_v128_load(i3 + 4);
118 i3 += 8;
119
120 const v128_t vk3x0123 = wasm_v128_load(w + 32);
121 const v128_t vk3x4567 = wasm_v128_load(w + 36);
122 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi3x0123, vk3x0123));
123 vacc4567p1 = wasm_f32x4_add(vacc4567p1, wasm_f32x4_mul(vi3x4567, vk3x4567));
124
125 const v128_t vi4x0123 = wasm_v128_load(i4);
126 const v128_t vi4x4567 = wasm_v128_load(i4 + 4);
127 i4 += 8;
128
129 const v128_t vk4x0123 = wasm_v128_load(w + 40);
130 const v128_t vk4x4567 = wasm_v128_load(w + 44);
131 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi4x0123, vk4x0123));
132 vacc4567p0 = wasm_f32x4_add(vacc4567p0, wasm_f32x4_mul(vi4x4567, vk4x4567));
133
134 const v128_t vi5x0123 = wasm_v128_load(i5);
135 const v128_t vi5x4567 = wasm_v128_load(i5 + 4);
136 i5 += 8;
137
138 const v128_t vk5x0123 = wasm_v128_load(w + 48);
139 const v128_t vk5x4567 = wasm_v128_load(w + 52);
140 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi5x0123, vk5x0123));
141 vacc4567p1 = wasm_f32x4_add(vacc4567p1, wasm_f32x4_mul(vi5x4567, vk5x4567));
142
143 const v128_t vi6x0123 = wasm_v128_load(i6);
144 const v128_t vi6x4567 = wasm_v128_load(i6 + 4);
145 i6 += 8;
146
147 const v128_t vk6x0123 = wasm_v128_load(w + 56);
148 const v128_t vk6x4567 = wasm_v128_load(w + 60);
149 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi6x0123, vk6x0123));
150 vacc4567p0 = wasm_f32x4_add(vacc4567p0, wasm_f32x4_mul(vi6x4567, vk6x4567));
151
152 const v128_t vi7x0123 = wasm_v128_load(i7);
153 const v128_t vi7x4567 = wasm_v128_load(i7 + 4);
154 i7 += 8;
155
156 const v128_t vk7x0123 = wasm_v128_load(w + 64);
157 const v128_t vk7x4567 = wasm_v128_load(w + 68);
158 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi7x0123, vk7x0123));
159 vacc4567p1 = wasm_f32x4_add(vacc4567p1, wasm_f32x4_mul(vi7x4567, vk7x4567));
160
161 const v128_t vi8x0123 = wasm_v128_load(i8);
162 const v128_t vi8x4567 = wasm_v128_load(i8 + 4);
163 i8 += 8;
164
165 const v128_t vk8x0123 = wasm_v128_load(w + 72);
166 const v128_t vk8x4567 = wasm_v128_load(w + 76);
167 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi8x0123, vk8x0123));
168 vacc4567p0 = wasm_f32x4_add(vacc4567p0, wasm_f32x4_mul(vi8x4567, vk8x4567));
169
170 w += 80;
171
172 // Add up all accumulators to vacc01234567p0
173 vacc0123p0 = wasm_f32x4_add(vacc0123p0, vacc0123p1);
174 vacc4567p0 = wasm_f32x4_add(vacc4567p0, vacc4567p1);
175
176 v128_t vacc0123 = wasm_f32x4_max(vacc0123p0, vmin);
177 v128_t vacc4567 = wasm_f32x4_max(vacc4567p0, vmin);
178
179 vacc0123 = wasm_f32x4_min(vacc0123, vmax);
180 vacc4567 = wasm_f32x4_min(vacc4567, vmax);
181
182 wasm_v128_store(output, vacc0123);
183 wasm_v128_store(output + 4, vacc4567);
184 output += 8;
185 }
186 for (; c >= 4; c -= 4) {
187 v128_t vacc0123p0 = wasm_v128_load(w);
188
189 const v128_t vi0x0123 = wasm_v128_load(i0);
190 i0 += 4;
191
192 const v128_t vk0x0123 = wasm_v128_load(w + 8);
193 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi0x0123, vk0x0123));
194
195 const v128_t vi1x0123 = wasm_v128_load(i1);
196 i1 += 4;
197
198 const v128_t vk1x0123 = wasm_v128_load(w + 16);
199 v128_t vacc0123p1 = wasm_f32x4_mul(vi1x0123, vk1x0123);
200
201 const v128_t vi2x0123 = wasm_v128_load(i2);
202 i2 += 4;
203
204 const v128_t vk2x0123 = wasm_v128_load(w + 24);
205 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi2x0123, vk2x0123));
206
207 const v128_t vi3x0123 = wasm_v128_load(i3);
208 i3 += 4;
209
210 const v128_t vk3x0123 = wasm_v128_load(w + 32);
211 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi3x0123, vk3x0123));
212
213 const v128_t vi4x0123 = wasm_v128_load(i4);
214 i4 += 4;
215
216 const v128_t vk4x0123 = wasm_v128_load(w + 40);
217 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi4x0123, vk4x0123));
218
219 const v128_t vi5x0123 = wasm_v128_load(i5);
220 i5 += 4;
221
222 const v128_t vk5x0123 = wasm_v128_load(w + 48);
223 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi5x0123, vk5x0123));
224
225 const v128_t vi6x0123 = wasm_v128_load(i6);
226 i6 += 4;
227
228 const v128_t vk6x0123 = wasm_v128_load(w + 56);
229 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi6x0123, vk6x0123));
230
231 const v128_t vi7x0123 = wasm_v128_load(i7);
232 i7 += 4;
233
234 const v128_t vk7x0123 = wasm_v128_load(w + 64);
235 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi7x0123, vk7x0123));
236
237 const v128_t vi8x0123 = wasm_v128_load(i8);
238 i8 += 4;
239
240 const v128_t vk8x0123 = wasm_v128_load(w + 72);
241 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi8x0123, vk8x0123));
242
243 w += 4;
244
245 // Add up all accumulators to vacc01234567p0
246 vacc0123p0 = wasm_f32x4_add(vacc0123p0, vacc0123p1);
247
248 v128_t vacc0123 = wasm_f32x4_max(vacc0123p0, vmin);
249 vacc0123 = wasm_f32x4_min(vacc0123, vmax);
250
251 wasm_v128_store(output, vacc0123);
252 output += 4;
253 }
254 if XNN_UNLIKELY(c != 0) {
255 v128_t vacc0123p0 = wasm_v128_load(w);
256
257 const v128_t vi0x0123 = wasm_v128_load(i0);
258 const v128_t vk0x0123 = wasm_v128_load(w + 8);
259 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi0x0123, vk0x0123));
260
261 const v128_t vi1x0123 = wasm_v128_load(i1);
262 const v128_t vk1x0123 = wasm_v128_load(w + 16);
263 v128_t vacc0123p1 = wasm_f32x4_mul(vi1x0123, vk1x0123);
264
265 const v128_t vi2x0123 = wasm_v128_load(i2);
266 const v128_t vk2x0123 = wasm_v128_load(w + 24);
267 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi2x0123, vk2x0123));
268
269 const v128_t vi3x0123 = wasm_v128_load(i3);
270 const v128_t vk3x0123 = wasm_v128_load(w + 32);
271 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi3x0123, vk3x0123));
272
273 const v128_t vi4x0123 = wasm_v128_load(i4);
274 const v128_t vk4x0123 = wasm_v128_load(w + 40);
275 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi4x0123, vk4x0123));
276
277 const v128_t vi5x0123 = wasm_v128_load(i5);
278 const v128_t vk5x0123 = wasm_v128_load(w + 48);
279 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi5x0123, vk5x0123));
280
281 const v128_t vi6x0123 = wasm_v128_load(i6);
282 const v128_t vk6x0123 = wasm_v128_load(w + 56);
283 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi6x0123, vk6x0123));
284
285 const v128_t vi7x0123 = wasm_v128_load(i7);
286 const v128_t vk7x0123 = wasm_v128_load(w + 64);
287 vacc0123p1 = wasm_f32x4_add(vacc0123p1, wasm_f32x4_mul(vi7x0123, vk7x0123));
288
289 const v128_t vi8x0123 = wasm_v128_load(i8);
290 const v128_t vk8x0123 = wasm_v128_load(w + 72);
291 vacc0123p0 = wasm_f32x4_add(vacc0123p0, wasm_f32x4_mul(vi8x0123, vk8x0123));
292
293 // Add up all accumulators to vacc01234567p0
294 vacc0123p0 = wasm_f32x4_add(vacc0123p0, vacc0123p1);
295
296 v128_t vacc0123 = wasm_f32x4_max(vacc0123p0, vmin);
297 vacc0123 = wasm_f32x4_min(vacc0123, vmax);
298
299 if (c & 2) {
300 *((double*) output) = wasm_f64x2_extract_lane(vacc0123, 0);
301 vacc0123 = wasm_v32x4_shuffle(vacc0123, vacc0123, 2, 3, 2, 3);
302 output += 2;
303 }
304 if (c & 1) {
305 *output = wasm_f32x4_extract_lane(vacc0123, 0);
306 output += 1;
307 }
308 }
309
310 output = (float*) ((uintptr_t) output + output_increment);
311 } while (--output_width != 0);
312 }
313