1 // Auto-generated file. Do not edit!
2 // Template: src/f32-igemm/wasmsimd-loadsplat.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <wasm_simd128.h>
13
14 #include <xnnpack/igemm.h>
15
16
xnn_f32_igemm_minmax_ukernel_6x8__wasmsimd_x86_loadsplat(size_t mr,size_t nc,size_t kc,size_t ks,const float ** restrict a,const float * restrict w,float * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const float * zero,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_igemm_minmax_ukernel_6x8__wasmsimd_x86_loadsplat(
18 size_t mr,
19 size_t nc,
20 size_t kc,
21 size_t ks,
22 const float**restrict a,
23 const float*restrict w,
24 float*restrict c,
25 size_t cm_stride,
26 size_t cn_stride,
27 size_t a_offset,
28 const float* zero,
29 const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)])
30 {
31 assert(mr != 0);
32 assert(mr <= 6);
33 assert(nc != 0);
34 assert(kc != 0);
35 assert(kc % sizeof(float) == 0);
36 assert(ks != 0);
37 assert(ks % (6 * sizeof(void*)) == 0);
38 assert(a_offset % sizeof(float) == 0);
39 assert(a != NULL);
40 assert(w != NULL);
41 assert(c != NULL);
42
43 float* c0 = c;
44 float* c1 = (float*) ((uintptr_t) c0 + cm_stride);
45 if XNN_UNPREDICTABLE(mr < 2) {
46 c1 = c0;
47 }
48 float* c2 = (float*) ((uintptr_t) c1 + cm_stride);
49 if XNN_UNPREDICTABLE(mr <= 2) {
50 c2 = c1;
51 }
52 float* c3 = (float*) ((uintptr_t) c2 + cm_stride);
53 if XNN_UNPREDICTABLE(mr < 4) {
54 c3 = c2;
55 }
56 float* c4 = (float*) ((uintptr_t) c3 + cm_stride);
57 if XNN_UNPREDICTABLE(mr <= 4) {
58 c4 = c3;
59 }
60 float* c5 = (float*) ((uintptr_t) c4 + cm_stride);
61 if XNN_UNPREDICTABLE(mr != 6) {
62 c5 = c4;
63 }
64
65 do {
66 v128_t vacc0x0123 = wasm_v128_load(w);
67 v128_t vacc0x4567 = wasm_v128_load(w + 4);
68 v128_t vacc1x0123 = vacc0x0123;
69 v128_t vacc1x4567 = vacc0x4567;
70 v128_t vacc2x0123 = vacc0x0123;
71 v128_t vacc2x4567 = vacc0x4567;
72 v128_t vacc3x0123 = vacc0x0123;
73 v128_t vacc3x4567 = vacc0x4567;
74 v128_t vacc4x0123 = vacc0x0123;
75 v128_t vacc4x4567 = vacc0x4567;
76 v128_t vacc5x0123 = vacc0x0123;
77 v128_t vacc5x4567 = vacc0x4567;
78 w += 8;
79
80 size_t p = ks;
81 do {
82 const float* restrict a0 = a[0];
83 assert(a0 != NULL);
84 if XNN_UNPREDICTABLE(a0 != zero) {
85 a0 = (const float*) ((uintptr_t) a0 + a_offset);
86 }
87 const float* restrict a1 = a[1];
88 assert(a1 != NULL);
89 if XNN_UNPREDICTABLE(a1 != zero) {
90 a1 = (const float*) ((uintptr_t) a1 + a_offset);
91 }
92 const float* restrict a2 = a[2];
93 assert(a2 != NULL);
94 if XNN_UNPREDICTABLE(a2 != zero) {
95 a2 = (const float*) ((uintptr_t) a2 + a_offset);
96 }
97 const float* restrict a3 = a[3];
98 assert(a3 != NULL);
99 if XNN_UNPREDICTABLE(a3 != zero) {
100 a3 = (const float*) ((uintptr_t) a3 + a_offset);
101 }
102 const float* restrict a4 = a[4];
103 assert(a4 != NULL);
104 if XNN_UNPREDICTABLE(a4 != zero) {
105 a4 = (const float*) ((uintptr_t) a4 + a_offset);
106 }
107 const float* restrict a5 = a[5];
108 assert(a5 != NULL);
109 if XNN_UNPREDICTABLE(a5 != zero) {
110 a5 = (const float*) ((uintptr_t) a5 + a_offset);
111 }
112 a += 6;
113
114 size_t k = kc;
115 do {
116 const v128_t vb0123 = wasm_v128_load(w);
117 const v128_t vb4567 = wasm_v128_load(w + 4);
118 w += 8;
119
120 const v128_t va0 = wasm_v32x4_load_splat(a0);
121 a0 += 1;
122 const v128_t va1 = wasm_v32x4_load_splat(a1);
123 a1 += 1;
124 const v128_t va2 = wasm_v32x4_load_splat(a2);
125 a2 += 1;
126 const v128_t va3 = wasm_v32x4_load_splat(a3);
127 a3 += 1;
128 const v128_t va4 = wasm_v32x4_load_splat(a4);
129 a4 += 1;
130 const v128_t va5 = wasm_v32x4_load_splat(a5);
131 a5 += 1;
132
133 vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(va0, vb0123));
134 vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(va0, vb4567));
135 vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(va1, vb0123));
136 vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(va1, vb4567));
137 vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(va2, vb0123));
138 vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(va2, vb4567));
139 vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(va3, vb0123));
140 vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(va3, vb4567));
141 vacc4x0123 = wasm_f32x4_add(vacc4x0123, wasm_f32x4_mul(va4, vb0123));
142 vacc4x4567 = wasm_f32x4_add(vacc4x4567, wasm_f32x4_mul(va4, vb4567));
143 vacc5x0123 = wasm_f32x4_add(vacc5x0123, wasm_f32x4_mul(va5, vb0123));
144 vacc5x4567 = wasm_f32x4_add(vacc5x4567, wasm_f32x4_mul(va5, vb4567));
145 k -= sizeof(float);
146 } while (k != 0);
147 p -= 6 * sizeof(void*);
148 } while (p != 0);
149
150 const v128_t vmin = wasm_v32x4_load_splat(¶ms->scalar.min);
151 vacc0x0123 = wasm_v128_bitselect(vmin, vacc0x0123, wasm_f32x4_lt(vacc0x0123, vmin));
152 vacc1x0123 = wasm_v128_bitselect(vmin, vacc1x0123, wasm_f32x4_lt(vacc1x0123, vmin));
153 vacc2x0123 = wasm_v128_bitselect(vmin, vacc2x0123, wasm_f32x4_lt(vacc2x0123, vmin));
154 vacc3x0123 = wasm_v128_bitselect(vmin, vacc3x0123, wasm_f32x4_lt(vacc3x0123, vmin));
155 vacc4x0123 = wasm_v128_bitselect(vmin, vacc4x0123, wasm_f32x4_lt(vacc4x0123, vmin));
156 vacc5x0123 = wasm_v128_bitselect(vmin, vacc5x0123, wasm_f32x4_lt(vacc5x0123, vmin));
157 vacc0x4567 = wasm_v128_bitselect(vmin, vacc0x4567, wasm_f32x4_lt(vacc0x4567, vmin));
158 vacc1x4567 = wasm_v128_bitselect(vmin, vacc1x4567, wasm_f32x4_lt(vacc1x4567, vmin));
159 vacc2x4567 = wasm_v128_bitselect(vmin, vacc2x4567, wasm_f32x4_lt(vacc2x4567, vmin));
160 vacc3x4567 = wasm_v128_bitselect(vmin, vacc3x4567, wasm_f32x4_lt(vacc3x4567, vmin));
161 vacc4x4567 = wasm_v128_bitselect(vmin, vacc4x4567, wasm_f32x4_lt(vacc4x4567, vmin));
162 vacc5x4567 = wasm_v128_bitselect(vmin, vacc5x4567, wasm_f32x4_lt(vacc5x4567, vmin));
163
164 const v128_t vmax = wasm_v32x4_load_splat(¶ms->scalar.max);
165 vacc0x0123 = wasm_v128_bitselect(vacc0x0123, vmax, wasm_f32x4_le(vacc0x0123, vmax));
166 vacc1x0123 = wasm_v128_bitselect(vacc1x0123, vmax, wasm_f32x4_le(vacc1x0123, vmax));
167 vacc2x0123 = wasm_v128_bitselect(vacc2x0123, vmax, wasm_f32x4_le(vacc2x0123, vmax));
168 vacc3x0123 = wasm_v128_bitselect(vacc3x0123, vmax, wasm_f32x4_le(vacc3x0123, vmax));
169 vacc4x0123 = wasm_v128_bitselect(vacc4x0123, vmax, wasm_f32x4_le(vacc4x0123, vmax));
170 vacc5x0123 = wasm_v128_bitselect(vacc5x0123, vmax, wasm_f32x4_le(vacc5x0123, vmax));
171 vacc0x4567 = wasm_v128_bitselect(vacc0x4567, vmax, wasm_f32x4_le(vacc0x4567, vmax));
172 vacc1x4567 = wasm_v128_bitselect(vacc1x4567, vmax, wasm_f32x4_le(vacc1x4567, vmax));
173 vacc2x4567 = wasm_v128_bitselect(vacc2x4567, vmax, wasm_f32x4_le(vacc2x4567, vmax));
174 vacc3x4567 = wasm_v128_bitselect(vacc3x4567, vmax, wasm_f32x4_le(vacc3x4567, vmax));
175 vacc4x4567 = wasm_v128_bitselect(vacc4x4567, vmax, wasm_f32x4_le(vacc4x4567, vmax));
176 vacc5x4567 = wasm_v128_bitselect(vacc5x4567, vmax, wasm_f32x4_le(vacc5x4567, vmax));
177
178 if XNN_LIKELY(nc >= 8) {
179 wasm_v128_store(c5, vacc5x0123);
180 wasm_v128_store(c5 + 4, vacc5x4567);
181 c5 = (float*) ((uintptr_t) c5 + cn_stride);
182 wasm_v128_store(c4, vacc4x0123);
183 wasm_v128_store(c4 + 4, vacc4x4567);
184 c4 = (float*) ((uintptr_t) c4 + cn_stride);
185 wasm_v128_store(c3, vacc3x0123);
186 wasm_v128_store(c3 + 4, vacc3x4567);
187 c3 = (float*) ((uintptr_t) c3 + cn_stride);
188 wasm_v128_store(c2, vacc2x0123);
189 wasm_v128_store(c2 + 4, vacc2x4567);
190 c2 = (float*) ((uintptr_t) c2 + cn_stride);
191 wasm_v128_store(c1, vacc1x0123);
192 wasm_v128_store(c1 + 4, vacc1x4567);
193 c1 = (float*) ((uintptr_t) c1 + cn_stride);
194 wasm_v128_store(c0, vacc0x0123);
195 wasm_v128_store(c0 + 4, vacc0x4567);
196 c0 = (float*) ((uintptr_t) c0 + cn_stride);
197
198 a = (const float**restrict) ((uintptr_t) a - ks);
199 nc -= 8;
200 } else {
201 if (nc & 4) {
202 wasm_v128_store(c5, vacc5x0123);
203 wasm_v128_store(c4, vacc4x0123);
204 wasm_v128_store(c3, vacc3x0123);
205 wasm_v128_store(c2, vacc2x0123);
206 wasm_v128_store(c1, vacc1x0123);
207 wasm_v128_store(c0, vacc0x0123);
208
209 vacc5x0123 = vacc5x4567;
210 vacc4x0123 = vacc4x4567;
211 vacc3x0123 = vacc3x4567;
212 vacc2x0123 = vacc2x4567;
213 vacc1x0123 = vacc1x4567;
214 vacc0x0123 = vacc0x4567;
215
216 c5 += 4;
217 c4 += 4;
218 c3 += 4;
219 c2 += 4;
220 c1 += 4;
221 c0 += 4;
222 }
223 if (nc & 2) {
224 *((double*) c5) = wasm_f64x2_extract_lane(vacc5x0123, 0);
225 *((double*) c4) = wasm_f64x2_extract_lane(vacc4x0123, 0);
226 *((double*) c3) = wasm_f64x2_extract_lane(vacc3x0123, 0);
227 *((double*) c2) = wasm_f64x2_extract_lane(vacc2x0123, 0);
228 *((double*) c1) = wasm_f64x2_extract_lane(vacc1x0123, 0);
229 *((double*) c0) = wasm_f64x2_extract_lane(vacc0x0123, 0);
230
231 vacc5x0123 = wasm_v32x4_shuffle(vacc5x0123, vacc5x0123, 2, 3, 2, 3);
232 vacc4x0123 = wasm_v32x4_shuffle(vacc4x0123, vacc4x0123, 2, 3, 2, 3);
233 vacc3x0123 = wasm_v32x4_shuffle(vacc3x0123, vacc3x0123, 2, 3, 2, 3);
234 vacc2x0123 = wasm_v32x4_shuffle(vacc2x0123, vacc2x0123, 2, 3, 2, 3);
235 vacc1x0123 = wasm_v32x4_shuffle(vacc1x0123, vacc1x0123, 2, 3, 2, 3);
236 vacc0x0123 = wasm_v32x4_shuffle(vacc0x0123, vacc0x0123, 2, 3, 2, 3);
237
238 c5 += 2;
239 c4 += 2;
240 c3 += 2;
241 c2 += 2;
242 c1 += 2;
243 c0 += 2;
244 }
245 if (nc & 1) {
246 *c5 = wasm_f32x4_extract_lane(vacc5x0123, 0);
247 *c4 = wasm_f32x4_extract_lane(vacc4x0123, 0);
248 *c3 = wasm_f32x4_extract_lane(vacc3x0123, 0);
249 *c2 = wasm_f32x4_extract_lane(vacc2x0123, 0);
250 *c1 = wasm_f32x4_extract_lane(vacc1x0123, 0);
251 *c0 = wasm_f32x4_extract_lane(vacc0x0123, 0);
252 }
253
254 nc = 0;
255 }
256 } while (nc != 0);
257 }
258