1 // Auto-generated file. Do not edit!
2 // Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc3(size_t elements,const float * input,float * output,float * sum,float max)18 void xnn_f32_raddstoreexpminusmax_ukernel__neon_p5_x12_acc3(
19 size_t elements,
20 const float* input,
21 float* output,
22 float* sum,
23 float max) XNN_DISABLE_TSAN
24 {
25 assert(elements % sizeof(float) == 0);
26
27 const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
28 // The smallest x for which expf(x) is normalized.
29 const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
30 const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
31 // Last 7 bits are zeroes
32 const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E400p-1f);
33 const float32x4_t vminus_ln2_lo = vmovq_n_f32(-0x1.7F7D1Cp-20f);
34
35 const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
36 const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
37 const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
38 const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
39 const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
40
41 const float32x4_t vi_max = vdupq_n_f32(max);
42
43 float32x4_t vacc0 = vmovq_n_f32(0.0f);
44 float32x4_t vacc1 = vmovq_n_f32(0.0f);
45 float32x4_t vacc2 = vmovq_n_f32(0.0f);
46 for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
47 // Load 12 (3x4) inputs at a time.
48 const float32x4_t vi0123 = vld1q_f32(input); input += 4;
49 const float32x4_t vi4567 = vld1q_f32(input); input += 4;
50 const float32x4_t vi89AB = vld1q_f32(input); input += 4;
51
52 // Subtract maximum input x := i - i_max. This implies x <= 0.
53 const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
54 const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
55 const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
56
57 // Compute reduced argument n := round(x / log(2)).
58 // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
59 // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
60 // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
61 // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
62 // of the algorithm.
63 float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
64 float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
65 float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
66
67 // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
68 // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
69 const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
70 const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
71 const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
72
73 // Subtract the large number back to get final n := round(x / log(2)).
74 vn0123 = vsubq_f32(vn0123, vmagic_bias);
75 vn4567 = vsubq_f32(vn4567, vmagic_bias);
76 vn89AB = vsubq_f32(vn89AB, vmagic_bias);
77
78 // Compute reduced argument t := z - n * log(2).
79 // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
80 float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
81 float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
82 float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
83
84 vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
85 vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
86 vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
87
88 // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
89 float32x4_t vp0123 = vmlaq_f32(vc4, vc5, vt0123);
90 float32x4_t vp4567 = vmlaq_f32(vc4, vc5, vt4567);
91 float32x4_t vp89AB = vmlaq_f32(vc4, vc5, vt89AB);
92
93 vp0123 = vmlaq_f32(vc3, vp0123, vt0123);
94 vp4567 = vmlaq_f32(vc3, vp4567, vt4567);
95 vp89AB = vmlaq_f32(vc3, vp89AB, vt89AB);
96
97 vp0123 = vmlaq_f32(vc2, vp0123, vt0123);
98 vp4567 = vmlaq_f32(vc2, vp4567, vt4567);
99 vp89AB = vmlaq_f32(vc2, vp89AB, vt89AB);
100
101 vp0123 = vmlaq_f32(vc1, vp0123, vt0123);
102 vp4567 = vmlaq_f32(vc1, vp4567, vt4567);
103 vp89AB = vmlaq_f32(vc1, vp89AB, vt89AB);
104
105 // Reconstruct the final f value:
106 // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
107 // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
108 // = s + (t * s) * p
109 vt0123 = vmulq_f32(vt0123, vs0123);
110 vt4567 = vmulq_f32(vt4567, vs4567);
111 vt89AB = vmulq_f32(vt89AB, vs89AB);
112
113 float32x4_t vf0123 = vmlaq_f32(vs0123, vp0123, vt0123);
114 float32x4_t vf4567 = vmlaq_f32(vs4567, vp4567, vt4567);
115 float32x4_t vf89AB = vmlaq_f32(vs89AB, vp89AB, vt89AB);
116
117 // For inputs below denormal cutoff, replace output with +0.0f.
118 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
119 vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
120 vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
121 vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
122
123 // Store 12 (3x4) outputs at a time.
124 vst1q_f32(output, vf0123); output += 4;
125 vst1q_f32(output, vf4567); output += 4;
126 vst1q_f32(output, vf89AB); output += 4;
127
128 // Accumulate computed exponents.
129 vacc0 = vaddq_f32(vacc0, vf0123);
130 vacc1 = vaddq_f32(vacc1, vf4567);
131 vacc2 = vaddq_f32(vacc2, vf89AB);
132 }
133 // Add up all accumulators to vacc0
134 vacc0 = vaddq_f32(vacc0, vacc1);
135 vacc0 = vaddq_f32(vacc0, vacc2);
136
137 float32x4_t vacc = vacc0;
138 for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
139 // Load 4 inputs at a time.
140 const float32x4_t vi = vld1q_f32(input); input += 4;
141
142 // Subtract maximum input x := i - i_max. This implies x <= 0.
143 const float32x4_t vx = vsubq_f32(vi, vi_max);
144
145 // Compute reduced argument n := round(x / log(2)).
146 // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
147 // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
148 // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
149 // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
150 // of the algorithm.
151 float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
152
153 // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
154 // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
155 const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
156
157 // Subtract the large number back to get final n := round(x / log(2)).
158 vn = vsubq_f32(vn, vmagic_bias);
159
160 // Compute reduced argument t := z - n * log(2).
161 // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
162 float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
163 vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
164
165 // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
166 float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
167 vp = vmlaq_f32(vc3, vp, vt);
168 vp = vmlaq_f32(vc2, vp, vt);
169 vp = vmlaq_f32(vc1, vp, vt);
170
171 // Reconstruct the final f value:
172 // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
173 // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
174 // = s + (t * s) * p
175 vt = vmulq_f32(vt, vs);
176 float32x4_t vf = vmlaq_f32(vs, vp, vt);
177
178 // For inputs below denormal cutoff, replace output with +0.0f.
179 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
180 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
181
182 // Store 4 outputs at a time.
183 vst1q_f32(output, vf); output += 4;
184
185 // Accumulate computed exponents.
186 vacc = vaddq_f32(vacc, vf);
187 }
188 #if XNN_ARCH_ARM64
189 float vacc_lo = vaddvq_f32(vacc);
190 #else
191 float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
192 #endif
193 if (elements != 0) {
194 assert(elements >= 1 * sizeof(float));
195 assert(elements <= 3 * sizeof(float));
196 // Load 4 inputs at a time.
197 const float32x4_t vi = vld1q_f32(input); input += 4;
198
199 // Subtract maximum input x := i - i_max. This implies x <= 0.
200 const float32x4_t vx = vsubq_f32(vi, vi_max);
201
202 // Compute reduced argument n := round(x / log(2)).
203 // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
204 // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
205 // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
206 // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
207 // of the algorithm.
208 float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
209
210 // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
211 // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
212 const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
213
214 // Subtract the large number back to get final n := round(x / log(2)).
215 vn = vsubq_f32(vn, vmagic_bias);
216
217 // Compute reduced argument t := z - n * log(2).
218 // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
219 float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
220 vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
221
222 // Compute degree-5 polynomial approximation for exp(t) on [-log(2)/2, log(2)/2].
223 float32x4_t vp = vmlaq_f32(vc4, vc5, vt);
224 vp = vmlaq_f32(vc3, vp, vt);
225 vp = vmlaq_f32(vc2, vp, vt);
226 vp = vmlaq_f32(vc1, vp, vt);
227
228 // Reconstruct the final f value:
229 // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
230 // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
231 // = s + (t * s) * p
232 vt = vmulq_f32(vt, vs);
233 float32x4_t vf = vmlaq_f32(vs, vp, vt);
234
235 // For inputs below denormal cutoff, replace output with +0.0f.
236 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
237 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
238
239 float32x2_t vf_lo = vget_low_f32(vf);
240 if (elements & (2 * sizeof(float))) {
241 // Store 2 outputs at a time.
242 vst1_f32(output, vf_lo); output += 2;
243
244 // Accumulate 2 computed exponents.
245 #if XNN_ARCH_ARM64
246 vacc_lo += vaddv_f32(vf_lo);
247 #else
248 vacc_lo = vadd_f32(vacc_lo, vf_lo);
249 #endif
250
251 vf_lo = vget_high_f32(vf);
252 }
253 if (elements & (1 * sizeof(float))) {
254 // Store 1 output at a time.
255 vst1_lane_f32(output, vf_lo, 0);
256
257 // Accumulate 1 computed exponent.
258 #if XNN_ARCH_ARM64
259 vacc_lo += vget_lane_f32(vf_lo, 0);
260 #else
261 vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
262 #endif
263 }
264 }
265 // Reduce 4 elements in the SIMD register
266 #if XNN_ARCH_ARM64
267 *sum = vacc_lo;
268 #else
269 vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
270 #endif
271 }
272