1 // Auto-generated file. Do not edit!
2 // Template: src/f32-velu/avx2-rr1-lut16-p3-gather.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16
17
18 extern XNN_INTERNAL const int xnn_table_exp2minus_k_over_16[16];
19
20 static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
21
xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x56(size_t n,const float * x,float * y,const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS (1)])22 void xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x56(
23 size_t n,
24 const float* x,
25 float* y,
26 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)])
27 {
28 assert(n % sizeof(float) == 0);
29
30 const __m256 vprescale = _mm256_broadcast_ps((const __m128*) params->sse.prescale);
31 const __m256 valpha = _mm256_broadcast_ps((const __m128*) params->sse.alpha);
32 const __m256 vbeta = _mm256_broadcast_ps((const __m128*) params->sse.beta);
33
34 const __m256 vsat_cutoff = _mm256_set1_ps(-0x1.154246p+4f);
35 const __m256 vmagic_bias = _mm256_set1_ps(0x1.800000p19f);
36 const __m256 vlog2e = _mm256_set1_ps(0x1.715476p+0f);
37 const __m256i vindex_mask = _mm256_set1_epi32(0xF);
38 const __m256 vminus_ln2 = _mm256_set1_ps(-0x1.62E43p-1f);
39 const __m256 vc3 = _mm256_set1_ps(0x1.55561Cp-3f);
40 const __m256 vc2 = _mm256_set1_ps(0x1.0001ECp-1f);
41
42 for (; n >= 56 * sizeof(float); n -= 56 * sizeof(float)) {
43 __m256 vx0 = _mm256_loadu_ps(x);
44 __m256 vx1 = _mm256_loadu_ps(x + 8);
45 __m256 vx2 = _mm256_loadu_ps(x + 16);
46 __m256 vx3 = _mm256_loadu_ps(x + 24);
47 __m256 vx4 = _mm256_loadu_ps(x + 32);
48 __m256 vx5 = _mm256_loadu_ps(x + 40);
49 __m256 vx6 = _mm256_loadu_ps(x + 48);
50 x += 56;
51
52 const __m256 vz0 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx0, vprescale));
53 const __m256 vz1 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx1, vprescale));
54 const __m256 vz2 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx2, vprescale));
55 const __m256 vz3 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx3, vprescale));
56 const __m256 vz4 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx4, vprescale));
57 const __m256 vz5 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx5, vprescale));
58 const __m256 vz6 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx6, vprescale));
59
60 __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias);
61 __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias);
62 __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias);
63 __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias);
64 __m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias);
65 __m256 vn5 = _mm256_fmadd_ps(vz5, vlog2e, vmagic_bias);
66 __m256 vn6 = _mm256_fmadd_ps(vz6, vlog2e, vmagic_bias);
67
68 const __m256i vidx0 = _mm256_and_si256(_mm256_castps_si256(vn0), vindex_mask);
69 const __m256i vl0 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx0, sizeof(float));
70 const __m256i vidx1 = _mm256_and_si256(_mm256_castps_si256(vn1), vindex_mask);
71 const __m256i vl1 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx1, sizeof(float));
72 const __m256i vidx2 = _mm256_and_si256(_mm256_castps_si256(vn2), vindex_mask);
73 const __m256i vl2 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx2, sizeof(float));
74 const __m256i vidx3 = _mm256_and_si256(_mm256_castps_si256(vn3), vindex_mask);
75 const __m256i vl3 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx3, sizeof(float));
76 const __m256i vidx4 = _mm256_and_si256(_mm256_castps_si256(vn4), vindex_mask);
77 const __m256i vl4 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx4, sizeof(float));
78 const __m256i vidx5 = _mm256_and_si256(_mm256_castps_si256(vn5), vindex_mask);
79 const __m256i vl5 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx5, sizeof(float));
80 const __m256i vidx6 = _mm256_and_si256(_mm256_castps_si256(vn6), vindex_mask);
81 const __m256i vl6 = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx6, sizeof(float));
82
83 const __m256i ven0 = _mm256_slli_epi32(_mm256_castps_si256(vn0), 19);
84 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
85 const __m256i ven1 = _mm256_slli_epi32(_mm256_castps_si256(vn1), 19);
86 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
87 const __m256i ven2 = _mm256_slli_epi32(_mm256_castps_si256(vn2), 19);
88 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
89 const __m256i ven3 = _mm256_slli_epi32(_mm256_castps_si256(vn3), 19);
90 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
91 const __m256i ven4 = _mm256_slli_epi32(_mm256_castps_si256(vn4), 19);
92 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
93 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 19);
94 vn5 = _mm256_sub_ps(vn5, vmagic_bias);
95 const __m256i ven6 = _mm256_slli_epi32(_mm256_castps_si256(vn6), 19);
96 vn6 = _mm256_sub_ps(vn6, vmagic_bias);
97
98 __m256 vs0 = _mm256_castsi256_ps(_mm256_add_epi32(vl0, ven0));
99 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0);
100 __m256 vs1 = _mm256_castsi256_ps(_mm256_add_epi32(vl1, ven1));
101 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1);
102 __m256 vs2 = _mm256_castsi256_ps(_mm256_add_epi32(vl2, ven2));
103 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2);
104 __m256 vs3 = _mm256_castsi256_ps(_mm256_add_epi32(vl3, ven3));
105 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3);
106 __m256 vs4 = _mm256_castsi256_ps(_mm256_add_epi32(vl4, ven4));
107 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4);
108 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5));
109 __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2, vz5);
110 __m256 vs6 = _mm256_castsi256_ps(_mm256_add_epi32(vl6, ven6));
111 __m256 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2, vz6);
112
113 __m256 vp0 = _mm256_fmadd_ps(vc3, vt0, vc2);
114 __m256 vp1 = _mm256_fmadd_ps(vc3, vt1, vc2);
115 __m256 vp2 = _mm256_fmadd_ps(vc3, vt2, vc2);
116 __m256 vp3 = _mm256_fmadd_ps(vc3, vt3, vc2);
117 __m256 vp4 = _mm256_fmadd_ps(vc3, vt4, vc2);
118 __m256 vp5 = _mm256_fmadd_ps(vc3, vt5, vc2);
119 __m256 vp6 = _mm256_fmadd_ps(vc3, vt6, vc2);
120
121 vp0 = _mm256_mul_ps(vp0, vt0);
122 vt0 = _mm256_mul_ps(vt0, vs0);
123 vp1 = _mm256_mul_ps(vp1, vt1);
124 vt1 = _mm256_mul_ps(vt1, vs1);
125 vp2 = _mm256_mul_ps(vp2, vt2);
126 vt2 = _mm256_mul_ps(vt2, vs2);
127 vp3 = _mm256_mul_ps(vp3, vt3);
128 vt3 = _mm256_mul_ps(vt3, vs3);
129 vp4 = _mm256_mul_ps(vp4, vt4);
130 vt4 = _mm256_mul_ps(vt4, vs4);
131 vp5 = _mm256_mul_ps(vp5, vt5);
132 vt5 = _mm256_mul_ps(vt5, vs5);
133 vp6 = _mm256_mul_ps(vp6, vt6);
134 vt6 = _mm256_mul_ps(vt6, vs6);
135
136 vs0 = _mm256_fmsub_ps(vs0, valpha, valpha);
137 vp0 = _mm256_fmadd_ps(vp0, vt0, vt0);
138 vs1 = _mm256_fmsub_ps(vs1, valpha, valpha);
139 vp1 = _mm256_fmadd_ps(vp1, vt1, vt1);
140 vs2 = _mm256_fmsub_ps(vs2, valpha, valpha);
141 vp2 = _mm256_fmadd_ps(vp2, vt2, vt2);
142 vs3 = _mm256_fmsub_ps(vs3, valpha, valpha);
143 vp3 = _mm256_fmadd_ps(vp3, vt3, vt3);
144 vs4 = _mm256_fmsub_ps(vs4, valpha, valpha);
145 vp4 = _mm256_fmadd_ps(vp4, vt4, vt4);
146 vs5 = _mm256_fmsub_ps(vs5, valpha, valpha);
147 vp5 = _mm256_fmadd_ps(vp5, vt5, vt5);
148 vs6 = _mm256_fmsub_ps(vs6, valpha, valpha);
149 vp6 = _mm256_fmadd_ps(vp6, vt6, vt6);
150
151 const __m256 ve0 = _mm256_fmadd_ps(vp0, valpha, vs0);
152 vx0 = _mm256_mul_ps(vx0, vbeta);
153 const __m256 ve1 = _mm256_fmadd_ps(vp1, valpha, vs1);
154 vx1 = _mm256_mul_ps(vx1, vbeta);
155 const __m256 ve2 = _mm256_fmadd_ps(vp2, valpha, vs2);
156 vx2 = _mm256_mul_ps(vx2, vbeta);
157 const __m256 ve3 = _mm256_fmadd_ps(vp3, valpha, vs3);
158 vx3 = _mm256_mul_ps(vx3, vbeta);
159 const __m256 ve4 = _mm256_fmadd_ps(vp4, valpha, vs4);
160 vx4 = _mm256_mul_ps(vx4, vbeta);
161 const __m256 ve5 = _mm256_fmadd_ps(vp5, valpha, vs5);
162 vx5 = _mm256_mul_ps(vx5, vbeta);
163 const __m256 ve6 = _mm256_fmadd_ps(vp6, valpha, vs6);
164 vx6 = _mm256_mul_ps(vx6, vbeta);
165
166 const __m256 vy0 = _mm256_blendv_ps(vx0, ve0, vx0);
167 const __m256 vy1 = _mm256_blendv_ps(vx1, ve1, vx1);
168 const __m256 vy2 = _mm256_blendv_ps(vx2, ve2, vx2);
169 const __m256 vy3 = _mm256_blendv_ps(vx3, ve3, vx3);
170 const __m256 vy4 = _mm256_blendv_ps(vx4, ve4, vx4);
171 const __m256 vy5 = _mm256_blendv_ps(vx5, ve5, vx5);
172 const __m256 vy6 = _mm256_blendv_ps(vx6, ve6, vx6);
173
174 _mm256_storeu_ps(y, vy0);
175 _mm256_storeu_ps(y + 8, vy1);
176 _mm256_storeu_ps(y + 16, vy2);
177 _mm256_storeu_ps(y + 24, vy3);
178 _mm256_storeu_ps(y + 32, vy4);
179 _mm256_storeu_ps(y + 40, vy5);
180 _mm256_storeu_ps(y + 48, vy6);
181 y += 56;
182 }
183 for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) {
184 __m256 vx = _mm256_loadu_ps(x);
185 x += 8;
186
187 const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
188
189 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
190 const __m256i vidx = _mm256_and_si256(_mm256_castps_si256(vn), vindex_mask);
191 const __m256i vl = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx, sizeof(float));
192
193 const __m256i ven = _mm256_slli_epi32(_mm256_castps_si256(vn), 19);
194 vn = _mm256_sub_ps(vn, vmagic_bias);
195
196 __m256 vs = _mm256_castsi256_ps(_mm256_add_epi32(vl, ven));
197 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
198
199 __m256 vp = _mm256_fmadd_ps(vc3, vt, vc2);
200 vp = _mm256_mul_ps(vp, vt);
201
202 vt = _mm256_mul_ps(vt, vs);
203 vs = _mm256_fmsub_ps(vs, valpha, valpha);
204 vp = _mm256_fmadd_ps(vp, vt, vt);
205 const __m256 ve = _mm256_fmadd_ps(vp, valpha, vs);
206
207 vx = _mm256_mul_ps(vx, vbeta);
208 const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
209
210 _mm256_storeu_ps(y, vy);
211 y += 8;
212 }
213 if XNN_UNLIKELY(n != 0) {
214 assert(n >= 1 * sizeof(float));
215 assert(n <= 7 * sizeof(float));
216 __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &mask_table[7] - n));
217
218 __m256 vx = _mm256_maskload_ps(x, vmask);
219
220 const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
221
222 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
223 const __m256i vidx = _mm256_and_si256(_mm256_castps_si256(vn), vindex_mask);
224 const __m256i vl = _mm256_i32gather_epi32(xnn_table_exp2minus_k_over_16, vidx, sizeof(float));
225
226 const __m256i ven = _mm256_slli_epi32(_mm256_castps_si256(vn), 19);
227 vn = _mm256_sub_ps(vn, vmagic_bias);
228
229 __m256 vs = _mm256_castsi256_ps(_mm256_add_epi32(vl, ven));
230 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
231
232 __m256 vp = _mm256_fmadd_ps(vc3, vt, vc2);
233 vp = _mm256_mul_ps(vp, vt);
234
235 vt = _mm256_mul_ps(vt, vs);
236 vs = _mm256_fmsub_ps(vs, valpha, valpha);
237 vp = _mm256_fmadd_ps(vp, vt, vt);
238 const __m256 ve = _mm256_fmadd_ps(vp, valpha, vs);
239
240 vx = _mm256_mul_ps(vx, vbeta);
241 const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
242
243 // _mm256_maskstore_ps(y, vmask, vf) could be used here, but triggers msan failures (probably an msan bug).
244 __m128 vy_lo = _mm256_castps256_ps128(vy);
245 if (n & (4 * sizeof(float))) {
246 _mm_storeu_ps(y, vy_lo);
247 vy_lo = _mm256_extractf128_ps(vy, 1);
248 y += 4;
249 }
250 if (n & (2 * sizeof(float))) {
251 _mm_storel_pi((__m64*) y, vy_lo);
252 vy_lo = _mm_movehl_ps(vy_lo, vy_lo);
253 y += 2;
254 }
255 if (n & (1 * sizeof(float))) {
256 _mm_store_ss(y, vy_lo);
257 }
258 }
259 }
260