1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-velu/avx2-rr1-lut4-p4-perm.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <immintrin.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16 
17 
18 static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
19 
xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56(size_t n,const float * x,float * y,const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56(
21     size_t n,
22     const float* x,
23     float* y,
24     const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)])
25 {
26   assert(n % sizeof(float) == 0);
27 
28   const __m256 vprescale = _mm256_broadcast_ps((const __m128*) params->sse.prescale);
29   const __m256 valpha = _mm256_broadcast_ps((const __m128*) params->sse.alpha);
30   const __m256 vbeta = _mm256_broadcast_ps((const __m128*) params->sse.beta);
31 
32   const __m256 vsat_cutoff = _mm256_set1_ps(-0x1.154246p+4f);
33   const __m256 vmagic_bias = _mm256_set1_ps(0x1.800000p21f);
34   const __m256 vlog2e = _mm256_set1_ps(0x1.715476p+0f);
35   const __m256 vtable = _mm256_set_ps(
36     0x1.EE89FAp-1f, 0x1.EA09E6p-1f, 0x1.F06FE0p-1f, 0x1.000000p+0f,
37     0x1.EE89FAp-1f, 0x1.EA09E6p-1f, 0x1.F06FE0p-1f, 0x1.000000p+0f);
38   const __m256 vminus_ln2 = _mm256_set1_ps(-0x1.62E43p-1f);
39   const __m256 vc4 = _mm256_set1_ps(0x1.554F9Ap-5f);
40   const __m256 vc3 = _mm256_set1_ps(0x1.557082p-3f);
41   const __m256 vc2 = _mm256_set1_ps(0x1.000002p-1f);
42 
43   for (; n >= 56 * sizeof(float); n -= 56 * sizeof(float)) {
44     __m256 vx0 = _mm256_loadu_ps(x);
45     __m256 vx1 = _mm256_loadu_ps(x + 8);
46     __m256 vx2 = _mm256_loadu_ps(x + 16);
47     __m256 vx3 = _mm256_loadu_ps(x + 24);
48     __m256 vx4 = _mm256_loadu_ps(x + 32);
49     __m256 vx5 = _mm256_loadu_ps(x + 40);
50     __m256 vx6 = _mm256_loadu_ps(x + 48);
51     x += 56;
52 
53     const __m256 vz0 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx0, vprescale));
54     const __m256 vz1 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx1, vprescale));
55     const __m256 vz2 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx2, vprescale));
56     const __m256 vz3 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx3, vprescale));
57     const __m256 vz4 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx4, vprescale));
58     const __m256 vz5 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx5, vprescale));
59     const __m256 vz6 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx6, vprescale));
60 
61     __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias);
62     __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias);
63     __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias);
64     __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias);
65     __m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias);
66     __m256 vn5 = _mm256_fmadd_ps(vz5, vlog2e, vmagic_bias);
67     __m256 vn6 = _mm256_fmadd_ps(vz6, vlog2e, vmagic_bias);
68 
69     const __m256i ven0 = _mm256_slli_epi32(_mm256_castps_si256(vn0), 21);
70     const __m256i vl0 = _mm256_castps_si256(_mm256_permutevar_ps(vtable, _mm256_castps_si256(vn0)));
71     vn0 = _mm256_sub_ps(vn0, vmagic_bias);
72     const __m256i ven1 = _mm256_slli_epi32(_mm256_castps_si256(vn1), 21);
73     const __m256i vl1 = _mm256_castps_si256(_mm256_permutevar_ps(vtable, _mm256_castps_si256(vn1)));
74     vn1 = _mm256_sub_ps(vn1, vmagic_bias);
75     const __m256i ven2 = _mm256_slli_epi32(_mm256_castps_si256(vn2), 21);
76     const __m256i vl2 = _mm256_castps_si256(_mm256_permutevar_ps(vtable, _mm256_castps_si256(vn2)));
77     vn2 = _mm256_sub_ps(vn2, vmagic_bias);
78     const __m256i ven3 = _mm256_slli_epi32(_mm256_castps_si256(vn3), 21);
79     const __m256i vl3 = _mm256_castps_si256(_mm256_permutevar_ps(vtable, _mm256_castps_si256(vn3)));
80     vn3 = _mm256_sub_ps(vn3, vmagic_bias);
81     const __m256i ven4 = _mm256_slli_epi32(_mm256_castps_si256(vn4), 21);
82     const __m256i vl4 = _mm256_castps_si256(_mm256_permutevar_ps(vtable, _mm256_castps_si256(vn4)));
83     vn4 = _mm256_sub_ps(vn4, vmagic_bias);
84     const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 21);
85     const __m256i vl5 = _mm256_castps_si256(_mm256_permutevar_ps(vtable, _mm256_castps_si256(vn5)));
86     vn5 = _mm256_sub_ps(vn5, vmagic_bias);
87     const __m256i ven6 = _mm256_slli_epi32(_mm256_castps_si256(vn6), 21);
88     const __m256i vl6 = _mm256_castps_si256(_mm256_permutevar_ps(vtable, _mm256_castps_si256(vn6)));
89     vn6 = _mm256_sub_ps(vn6, vmagic_bias);
90 
91     __m256 vs0 = _mm256_castsi256_ps(_mm256_add_epi32(vl0, ven0));
92     __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0);
93     __m256 vs1 = _mm256_castsi256_ps(_mm256_add_epi32(vl1, ven1));
94     __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1);
95     __m256 vs2 = _mm256_castsi256_ps(_mm256_add_epi32(vl2, ven2));
96     __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2);
97     __m256 vs3 = _mm256_castsi256_ps(_mm256_add_epi32(vl3, ven3));
98     __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3);
99     __m256 vs4 = _mm256_castsi256_ps(_mm256_add_epi32(vl4, ven4));
100     __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4);
101     __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5));
102     __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2, vz5);
103     __m256 vs6 = _mm256_castsi256_ps(_mm256_add_epi32(vl6, ven6));
104     __m256 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2, vz6);
105 
106     __m256 vp0 = _mm256_fmadd_ps(vc4, vt0, vc3);
107     __m256 vp1 = _mm256_fmadd_ps(vc4, vt1, vc3);
108     __m256 vp2 = _mm256_fmadd_ps(vc4, vt2, vc3);
109     __m256 vp3 = _mm256_fmadd_ps(vc4, vt3, vc3);
110     __m256 vp4 = _mm256_fmadd_ps(vc4, vt4, vc3);
111     __m256 vp5 = _mm256_fmadd_ps(vc4, vt5, vc3);
112     __m256 vp6 = _mm256_fmadd_ps(vc4, vt6, vc3);
113 
114     vp0 = _mm256_fmadd_ps(vp0, vt0, vc2);
115     vp1 = _mm256_fmadd_ps(vp1, vt1, vc2);
116     vp2 = _mm256_fmadd_ps(vp2, vt2, vc2);
117     vp3 = _mm256_fmadd_ps(vp3, vt3, vc2);
118     vp4 = _mm256_fmadd_ps(vp4, vt4, vc2);
119     vp5 = _mm256_fmadd_ps(vp5, vt5, vc2);
120     vp6 = _mm256_fmadd_ps(vp6, vt6, vc2);
121 
122     vp0 = _mm256_mul_ps(vp0, vt0);
123     vt0 = _mm256_mul_ps(vt0, vs0);
124     vp1 = _mm256_mul_ps(vp1, vt1);
125     vt1 = _mm256_mul_ps(vt1, vs1);
126     vp2 = _mm256_mul_ps(vp2, vt2);
127     vt2 = _mm256_mul_ps(vt2, vs2);
128     vp3 = _mm256_mul_ps(vp3, vt3);
129     vt3 = _mm256_mul_ps(vt3, vs3);
130     vp4 = _mm256_mul_ps(vp4, vt4);
131     vt4 = _mm256_mul_ps(vt4, vs4);
132     vp5 = _mm256_mul_ps(vp5, vt5);
133     vt5 = _mm256_mul_ps(vt5, vs5);
134     vp6 = _mm256_mul_ps(vp6, vt6);
135     vt6 = _mm256_mul_ps(vt6, vs6);
136 
137     vs0 = _mm256_fmsub_ps(vs0, valpha, valpha);
138     vp0 = _mm256_fmadd_ps(vp0, vt0, vt0);
139     vs1 = _mm256_fmsub_ps(vs1, valpha, valpha);
140     vp1 = _mm256_fmadd_ps(vp1, vt1, vt1);
141     vs2 = _mm256_fmsub_ps(vs2, valpha, valpha);
142     vp2 = _mm256_fmadd_ps(vp2, vt2, vt2);
143     vs3 = _mm256_fmsub_ps(vs3, valpha, valpha);
144     vp3 = _mm256_fmadd_ps(vp3, vt3, vt3);
145     vs4 = _mm256_fmsub_ps(vs4, valpha, valpha);
146     vp4 = _mm256_fmadd_ps(vp4, vt4, vt4);
147     vs5 = _mm256_fmsub_ps(vs5, valpha, valpha);
148     vp5 = _mm256_fmadd_ps(vp5, vt5, vt5);
149     vs6 = _mm256_fmsub_ps(vs6, valpha, valpha);
150     vp6 = _mm256_fmadd_ps(vp6, vt6, vt6);
151 
152     const __m256 ve0 = _mm256_fmadd_ps(vp0, valpha, vs0);
153     vx0 = _mm256_mul_ps(vx0, vbeta);
154     const __m256 ve1 = _mm256_fmadd_ps(vp1, valpha, vs1);
155     vx1 = _mm256_mul_ps(vx1, vbeta);
156     const __m256 ve2 = _mm256_fmadd_ps(vp2, valpha, vs2);
157     vx2 = _mm256_mul_ps(vx2, vbeta);
158     const __m256 ve3 = _mm256_fmadd_ps(vp3, valpha, vs3);
159     vx3 = _mm256_mul_ps(vx3, vbeta);
160     const __m256 ve4 = _mm256_fmadd_ps(vp4, valpha, vs4);
161     vx4 = _mm256_mul_ps(vx4, vbeta);
162     const __m256 ve5 = _mm256_fmadd_ps(vp5, valpha, vs5);
163     vx5 = _mm256_mul_ps(vx5, vbeta);
164     const __m256 ve6 = _mm256_fmadd_ps(vp6, valpha, vs6);
165     vx6 = _mm256_mul_ps(vx6, vbeta);
166 
167     const __m256 vy0 = _mm256_blendv_ps(vx0, ve0, vx0);
168     const __m256 vy1 = _mm256_blendv_ps(vx1, ve1, vx1);
169     const __m256 vy2 = _mm256_blendv_ps(vx2, ve2, vx2);
170     const __m256 vy3 = _mm256_blendv_ps(vx3, ve3, vx3);
171     const __m256 vy4 = _mm256_blendv_ps(vx4, ve4, vx4);
172     const __m256 vy5 = _mm256_blendv_ps(vx5, ve5, vx5);
173     const __m256 vy6 = _mm256_blendv_ps(vx6, ve6, vx6);
174 
175     _mm256_storeu_ps(y, vy0);
176     _mm256_storeu_ps(y + 8, vy1);
177     _mm256_storeu_ps(y + 16, vy2);
178     _mm256_storeu_ps(y + 24, vy3);
179     _mm256_storeu_ps(y + 32, vy4);
180     _mm256_storeu_ps(y + 40, vy5);
181     _mm256_storeu_ps(y + 48, vy6);
182     y += 56;
183   }
184   for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) {
185     __m256 vx = _mm256_loadu_ps(x);
186     x += 8;
187 
188     const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
189 
190     __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
191     const __m256i ven = _mm256_slli_epi32(_mm256_castps_si256(vn), 21);
192     const __m256i vl = _mm256_castps_si256(_mm256_permutevar_ps(vtable, _mm256_castps_si256(vn)));
193     __m256 vs = _mm256_castsi256_ps(_mm256_add_epi32(vl, ven));
194     vn = _mm256_sub_ps(vn, vmagic_bias);
195 
196     __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
197 
198     __m256 vp = _mm256_fmadd_ps(vc4, vt, vc3);
199     vp = _mm256_fmadd_ps(vp, vt, vc2);
200     vp = _mm256_mul_ps(vp, vt);
201 
202     vt = _mm256_mul_ps(vt, vs);
203     vs = _mm256_fmsub_ps(vs, valpha, valpha);
204     vp = _mm256_fmadd_ps(vp, vt, vt);
205     const __m256 ve = _mm256_fmadd_ps(vp, valpha, vs);
206 
207     vx = _mm256_mul_ps(vx, vbeta);
208     const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
209 
210     _mm256_storeu_ps(y, vy);
211     y += 8;
212   }
213   if XNN_UNLIKELY(n != 0) {
214     assert(n >= 1 * sizeof(float));
215     assert(n <= 7 * sizeof(float));
216     __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &mask_table[7] - n));
217 
218     __m256 vx = _mm256_maskload_ps(x, vmask);
219 
220     const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
221 
222     __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
223     const __m256i ven = _mm256_slli_epi32(_mm256_castps_si256(vn), 21);
224     const __m256i vl = _mm256_castps_si256(_mm256_permutevar_ps(vtable, _mm256_castps_si256(vn)));
225     __m256 vs = _mm256_castsi256_ps(_mm256_add_epi32(vl, ven));
226     vn = _mm256_sub_ps(vn, vmagic_bias);
227 
228     __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
229 
230     __m256 vp = _mm256_fmadd_ps(vc4, vt, vc3);
231     vp = _mm256_fmadd_ps(vp, vt, vc2);
232     vp = _mm256_mul_ps(vp, vt);
233 
234     vt = _mm256_mul_ps(vt, vs);
235     vs = _mm256_fmsub_ps(vs, valpha, valpha);
236     vp = _mm256_fmadd_ps(vp, vt, vt);
237     const __m256 ve = _mm256_fmadd_ps(vp, valpha, vs);
238 
239     vx = _mm256_mul_ps(vx, vbeta);
240     const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
241 
242     // _mm256_maskstore_ps(y, vmask, vf) could be used here, but triggers msan failures (probably an msan bug).
243     __m128 vy_lo = _mm256_castps256_ps128(vy);
244     if (n & (4 * sizeof(float))) {
245       _mm_storeu_ps(y, vy_lo);
246       vy_lo = _mm256_extractf128_ps(vy, 1);
247       y += 4;
248     }
249     if (n & (2 * sizeof(float))) {
250       _mm_storel_pi((__m64*) y, vy_lo);
251       vy_lo = _mm_movehl_ps(vy_lo, vy_lo);
252       y += 2;
253     }
254     if (n & (1 * sizeof(float))) {
255       _mm_store_ss(y, vy_lo);
256     }
257   }
258 }
259