1 // Auto-generated file. Do not edit!
2 // Template: src/f32-velu/avx2-rr1-lut8-p4-perm.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16
17
18 static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
19
xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x48(size_t n,const float * x,float * y,const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x48(
21 size_t n,
22 const float* x,
23 float* y,
24 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)])
25 {
26 assert(n % sizeof(float) == 0);
27
28 const __m256 vprescale = _mm256_broadcast_ps((const __m128*) params->sse.prescale);
29 const __m256 valpha = _mm256_broadcast_ps((const __m128*) params->sse.alpha);
30 const __m256 vbeta = _mm256_broadcast_ps((const __m128*) params->sse.beta);
31
32 const __m256 vsat_cutoff = _mm256_set1_ps(-0x1.154246p+4f);
33 const __m256 vmagic_bias = _mm256_set1_ps(0x1.800000p20f);
34 const __m256 vlog2e = _mm256_set1_ps(0x1.715476p+0f);
35 const __m256i vtable = _mm256_set_epi32(
36 0x3F7AC0C7, 0x3F7744FD, 0x3F75672A, 0x3F7504F3, 0x3F75FED7, 0x3F7837F0, 0x3F7B95C2, 0x3F800000);
37 const __m256 vminus_ln2 = _mm256_set1_ps(-0x1.62E43p-1f);
38 const __m256 vc4 = _mm256_set1_ps(0x1.5558ECp-5f);
39 const __m256 vc3 = _mm256_set1_ps(0x1.555C20p-3f);
40 const __m256 vc2 = _mm256_set1_ps(0x1.000000p-1f);
41
42 for (; n >= 48 * sizeof(float); n -= 48 * sizeof(float)) {
43 __m256 vx0 = _mm256_loadu_ps(x);
44 __m256 vx1 = _mm256_loadu_ps(x + 8);
45 __m256 vx2 = _mm256_loadu_ps(x + 16);
46 __m256 vx3 = _mm256_loadu_ps(x + 24);
47 __m256 vx4 = _mm256_loadu_ps(x + 32);
48 __m256 vx5 = _mm256_loadu_ps(x + 40);
49 x += 48;
50
51 const __m256 vz0 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx0, vprescale));
52 const __m256 vz1 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx1, vprescale));
53 const __m256 vz2 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx2, vprescale));
54 const __m256 vz3 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx3, vprescale));
55 const __m256 vz4 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx4, vprescale));
56 const __m256 vz5 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx5, vprescale));
57
58 __m256 vn0 = _mm256_fmadd_ps(vz0, vlog2e, vmagic_bias);
59 __m256 vn1 = _mm256_fmadd_ps(vz1, vlog2e, vmagic_bias);
60 __m256 vn2 = _mm256_fmadd_ps(vz2, vlog2e, vmagic_bias);
61 __m256 vn3 = _mm256_fmadd_ps(vz3, vlog2e, vmagic_bias);
62 __m256 vn4 = _mm256_fmadd_ps(vz4, vlog2e, vmagic_bias);
63 __m256 vn5 = _mm256_fmadd_ps(vz5, vlog2e, vmagic_bias);
64
65 const __m256i ven0 = _mm256_slli_epi32(_mm256_castps_si256(vn0), 20);
66 const __m256i vl0 = _mm256_permutevar8x32_epi32(vtable, _mm256_castps_si256(vn0));
67 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
68 const __m256i ven1 = _mm256_slli_epi32(_mm256_castps_si256(vn1), 20);
69 const __m256i vl1 = _mm256_permutevar8x32_epi32(vtable, _mm256_castps_si256(vn1));
70 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
71 const __m256i ven2 = _mm256_slli_epi32(_mm256_castps_si256(vn2), 20);
72 const __m256i vl2 = _mm256_permutevar8x32_epi32(vtable, _mm256_castps_si256(vn2));
73 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
74 const __m256i ven3 = _mm256_slli_epi32(_mm256_castps_si256(vn3), 20);
75 const __m256i vl3 = _mm256_permutevar8x32_epi32(vtable, _mm256_castps_si256(vn3));
76 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
77 const __m256i ven4 = _mm256_slli_epi32(_mm256_castps_si256(vn4), 20);
78 const __m256i vl4 = _mm256_permutevar8x32_epi32(vtable, _mm256_castps_si256(vn4));
79 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
80 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 20);
81 const __m256i vl5 = _mm256_permutevar8x32_epi32(vtable, _mm256_castps_si256(vn5));
82 vn5 = _mm256_sub_ps(vn5, vmagic_bias);
83
84 __m256 vs0 = _mm256_castsi256_ps(_mm256_add_epi32(vl0, ven0));
85 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vz0);
86 __m256 vs1 = _mm256_castsi256_ps(_mm256_add_epi32(vl1, ven1));
87 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vz1);
88 __m256 vs2 = _mm256_castsi256_ps(_mm256_add_epi32(vl2, ven2));
89 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vz2);
90 __m256 vs3 = _mm256_castsi256_ps(_mm256_add_epi32(vl3, ven3));
91 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vz3);
92 __m256 vs4 = _mm256_castsi256_ps(_mm256_add_epi32(vl4, ven4));
93 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vz4);
94 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5));
95 __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2, vz5);
96
97 __m256 vp0 = _mm256_fmadd_ps(vc4, vt0, vc3);
98 __m256 vp1 = _mm256_fmadd_ps(vc4, vt1, vc3);
99 __m256 vp2 = _mm256_fmadd_ps(vc4, vt2, vc3);
100 __m256 vp3 = _mm256_fmadd_ps(vc4, vt3, vc3);
101 __m256 vp4 = _mm256_fmadd_ps(vc4, vt4, vc3);
102 __m256 vp5 = _mm256_fmadd_ps(vc4, vt5, vc3);
103
104 vp0 = _mm256_fmadd_ps(vp0, vt0, vc2);
105 vp1 = _mm256_fmadd_ps(vp1, vt1, vc2);
106 vp2 = _mm256_fmadd_ps(vp2, vt2, vc2);
107 vp3 = _mm256_fmadd_ps(vp3, vt3, vc2);
108 vp4 = _mm256_fmadd_ps(vp4, vt4, vc2);
109 vp5 = _mm256_fmadd_ps(vp5, vt5, vc2);
110
111 vp0 = _mm256_mul_ps(vp0, vt0);
112 vt0 = _mm256_mul_ps(vt0, vs0);
113 vp1 = _mm256_mul_ps(vp1, vt1);
114 vt1 = _mm256_mul_ps(vt1, vs1);
115 vp2 = _mm256_mul_ps(vp2, vt2);
116 vt2 = _mm256_mul_ps(vt2, vs2);
117 vp3 = _mm256_mul_ps(vp3, vt3);
118 vt3 = _mm256_mul_ps(vt3, vs3);
119 vp4 = _mm256_mul_ps(vp4, vt4);
120 vt4 = _mm256_mul_ps(vt4, vs4);
121 vp5 = _mm256_mul_ps(vp5, vt5);
122 vt5 = _mm256_mul_ps(vt5, vs5);
123
124 vs0 = _mm256_fmsub_ps(vs0, valpha, valpha);
125 vp0 = _mm256_fmadd_ps(vp0, vt0, vt0);
126 vs1 = _mm256_fmsub_ps(vs1, valpha, valpha);
127 vp1 = _mm256_fmadd_ps(vp1, vt1, vt1);
128 vs2 = _mm256_fmsub_ps(vs2, valpha, valpha);
129 vp2 = _mm256_fmadd_ps(vp2, vt2, vt2);
130 vs3 = _mm256_fmsub_ps(vs3, valpha, valpha);
131 vp3 = _mm256_fmadd_ps(vp3, vt3, vt3);
132 vs4 = _mm256_fmsub_ps(vs4, valpha, valpha);
133 vp4 = _mm256_fmadd_ps(vp4, vt4, vt4);
134 vs5 = _mm256_fmsub_ps(vs5, valpha, valpha);
135 vp5 = _mm256_fmadd_ps(vp5, vt5, vt5);
136
137 const __m256 ve0 = _mm256_fmadd_ps(vp0, valpha, vs0);
138 vx0 = _mm256_mul_ps(vx0, vbeta);
139 const __m256 ve1 = _mm256_fmadd_ps(vp1, valpha, vs1);
140 vx1 = _mm256_mul_ps(vx1, vbeta);
141 const __m256 ve2 = _mm256_fmadd_ps(vp2, valpha, vs2);
142 vx2 = _mm256_mul_ps(vx2, vbeta);
143 const __m256 ve3 = _mm256_fmadd_ps(vp3, valpha, vs3);
144 vx3 = _mm256_mul_ps(vx3, vbeta);
145 const __m256 ve4 = _mm256_fmadd_ps(vp4, valpha, vs4);
146 vx4 = _mm256_mul_ps(vx4, vbeta);
147 const __m256 ve5 = _mm256_fmadd_ps(vp5, valpha, vs5);
148 vx5 = _mm256_mul_ps(vx5, vbeta);
149
150 const __m256 vy0 = _mm256_blendv_ps(vx0, ve0, vx0);
151 const __m256 vy1 = _mm256_blendv_ps(vx1, ve1, vx1);
152 const __m256 vy2 = _mm256_blendv_ps(vx2, ve2, vx2);
153 const __m256 vy3 = _mm256_blendv_ps(vx3, ve3, vx3);
154 const __m256 vy4 = _mm256_blendv_ps(vx4, ve4, vx4);
155 const __m256 vy5 = _mm256_blendv_ps(vx5, ve5, vx5);
156
157 _mm256_storeu_ps(y, vy0);
158 _mm256_storeu_ps(y + 8, vy1);
159 _mm256_storeu_ps(y + 16, vy2);
160 _mm256_storeu_ps(y + 24, vy3);
161 _mm256_storeu_ps(y + 32, vy4);
162 _mm256_storeu_ps(y + 40, vy5);
163 y += 48;
164 }
165 for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) {
166 __m256 vx = _mm256_loadu_ps(x);
167 x += 8;
168
169 const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
170
171 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
172 const __m256i ven = _mm256_slli_epi32(_mm256_castps_si256(vn), 20);
173 const __m256i vl = _mm256_permutevar8x32_epi32(vtable, _mm256_castps_si256(vn));
174 __m256 vs = _mm256_castsi256_ps(_mm256_add_epi32(vl, ven));
175 vn = _mm256_sub_ps(vn, vmagic_bias);
176
177 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
178
179 __m256 vp = _mm256_fmadd_ps(vc4, vt, vc3);
180 vp = _mm256_fmadd_ps(vp, vt, vc2);
181 vp = _mm256_mul_ps(vp, vt);
182
183 vt = _mm256_mul_ps(vt, vs);
184 vs = _mm256_fmsub_ps(vs, valpha, valpha);
185 vp = _mm256_fmadd_ps(vp, vt, vt);
186 const __m256 ve = _mm256_fmadd_ps(vp, valpha, vs);
187
188 vx = _mm256_mul_ps(vx, vbeta);
189 const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
190
191 _mm256_storeu_ps(y, vy);
192 y += 8;
193 }
194 if XNN_UNLIKELY(n != 0) {
195 assert(n >= 1 * sizeof(float));
196 assert(n <= 7 * sizeof(float));
197 __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &mask_table[7] - n));
198
199 __m256 vx = _mm256_maskload_ps(x, vmask);
200
201 const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
202
203 __m256 vn = _mm256_fmadd_ps(vz, vlog2e, vmagic_bias);
204 const __m256i ven = _mm256_slli_epi32(_mm256_castps_si256(vn), 20);
205 const __m256i vl = _mm256_permutevar8x32_epi32(vtable, _mm256_castps_si256(vn));
206 __m256 vs = _mm256_castsi256_ps(_mm256_add_epi32(vl, ven));
207 vn = _mm256_sub_ps(vn, vmagic_bias);
208
209 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vz);
210
211 __m256 vp = _mm256_fmadd_ps(vc4, vt, vc3);
212 vp = _mm256_fmadd_ps(vp, vt, vc2);
213 vp = _mm256_mul_ps(vp, vt);
214
215 vt = _mm256_mul_ps(vt, vs);
216 vs = _mm256_fmsub_ps(vs, valpha, valpha);
217 vp = _mm256_fmadd_ps(vp, vt, vt);
218 const __m256 ve = _mm256_fmadd_ps(vp, valpha, vs);
219
220 vx = _mm256_mul_ps(vx, vbeta);
221 const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
222
223 // _mm256_maskstore_ps(y, vmask, vf) could be used here, but triggers msan failures (probably an msan bug).
224 __m128 vy_lo = _mm256_castps256_ps128(vy);
225 if (n & (4 * sizeof(float))) {
226 _mm_storeu_ps(y, vy_lo);
227 vy_lo = _mm256_extractf128_ps(vy, 1);
228 y += 4;
229 }
230 if (n & (2 * sizeof(float))) {
231 _mm_storel_pi((__m64*) y, vy_lo);
232 vy_lo = _mm_movehl_ps(vy_lo, vy_lo);
233 y += 2;
234 }
235 if (n & (1 * sizeof(float))) {
236 _mm_store_ss(y, vy_lo);
237 }
238 }
239 }
240