1 // Auto-generated file. Do not edit!
2 // Template: src/qs8-vadd/neon-ld64.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/vadd.h>
15
16
xnn_qs8_vadd_minmax_ukernel__neon_ld64_x32(size_t n,const int8_t * input_x,const int8_t * input_y,int8_t * output,const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_qs8_vadd_minmax_ukernel__neon_ld64_x32(
18 size_t n,
19 const int8_t* input_x,
20 const int8_t* input_y,
21 int8_t* output,
22 const union xnn_qs8_add_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
23 {
24 const int8x8_t vx_zero_point = vld1_dup_s8(¶ms->neon.x_zero_point);
25 const int8x8_t vy_zero_point = vld1_dup_s8(¶ms->neon.y_zero_point);
26 const int32x4_t vx_multiplier = vld1q_dup_s32(¶ms->neon.x_multiplier);
27 const int32x4_t vy_multiplier = vld1q_dup_s32(¶ms->neon.y_multiplier);
28 const int32x4_t vright_shift = vld1q_dup_s32(¶ms->neon.right_shift);
29 const int32x4_t vzero_shift_mask = vreinterpretq_s32_u32(vceqq_s32(vright_shift, vmovq_n_s32(0)));
30 const int16x8_t voutput_zero_point = vld1q_dup_s16(¶ms->neon.output_zero_point);
31 const int8x16_t voutput_min = vld1q_dup_s8(¶ms->neon.output_min);
32 const int8x16_t voutput_max = vld1q_dup_s8(¶ms->neon.output_max);
33
34 for (; n >= 32 * sizeof(int8_t); n -= 32 * sizeof(int8_t)) {
35 const int8x8_t vx01234567 = vld1_s8(input_x); input_x += 8;
36 const int8x8_t vy01234567 = vld1_s8(input_y); input_y += 8;
37 const int8x8_t vx89ABCDEF = vld1_s8(input_x); input_x += 8;
38 const int8x8_t vy89ABCDEF = vld1_s8(input_y); input_y += 8;
39 const int8x8_t vxGHIJKLMN = vld1_s8(input_x); input_x += 8;
40 const int8x8_t vyGHIJKLMN = vld1_s8(input_y); input_y += 8;
41 const int8x8_t vxOPQRSTUV = vld1_s8(input_x); input_x += 8;
42 const int8x8_t vyOPQRSTUV = vld1_s8(input_y); input_y += 8;
43
44 const int16x8_t vex01234567 = vsubl_s8(vx01234567, vx_zero_point);
45 const int16x8_t vey01234567 = vsubl_s8(vy01234567, vy_zero_point);
46 const int16x8_t vex89ABCDEF = vsubl_s8(vx89ABCDEF, vx_zero_point);
47 const int16x8_t vey89ABCDEF = vsubl_s8(vy89ABCDEF, vy_zero_point);
48 const int16x8_t vexGHIJKLMN = vsubl_s8(vxGHIJKLMN, vx_zero_point);
49 const int16x8_t veyGHIJKLMN = vsubl_s8(vyGHIJKLMN, vy_zero_point);
50 const int16x8_t vexOPQRSTUV = vsubl_s8(vxOPQRSTUV, vx_zero_point);
51 const int16x8_t veyOPQRSTUV = vsubl_s8(vyOPQRSTUV, vy_zero_point);
52
53 int32x4_t vacc0123 = vmulq_s32(vmovl_s16(vget_low_s16(vex01234567)), vx_multiplier);
54 int32x4_t vacc4567 = vmulq_s32(vmovl_s16(vget_high_s16(vex01234567)), vx_multiplier);
55 int32x4_t vacc89AB = vmulq_s32(vmovl_s16(vget_low_s16(vex89ABCDEF)), vx_multiplier);
56 int32x4_t vaccCDEF = vmulq_s32(vmovl_s16(vget_high_s16(vex89ABCDEF)), vx_multiplier);
57 int32x4_t vaccGHIJ = vmulq_s32(vmovl_s16(vget_low_s16(vexGHIJKLMN)), vx_multiplier);
58 int32x4_t vaccKLMN = vmulq_s32(vmovl_s16(vget_high_s16(vexGHIJKLMN)), vx_multiplier);
59 int32x4_t vaccOPQR = vmulq_s32(vmovl_s16(vget_low_s16(vexOPQRSTUV)), vx_multiplier);
60 int32x4_t vaccSTUV = vmulq_s32(vmovl_s16(vget_high_s16(vexOPQRSTUV)), vx_multiplier);
61
62 vacc0123 = vmlaq_s32(vacc0123, vmovl_s16(vget_low_s16(vey01234567)), vy_multiplier);
63 vacc4567 = vmlaq_s32(vacc4567, vmovl_s16(vget_high_s16(vey01234567)), vy_multiplier);
64 vacc89AB = vmlaq_s32(vacc89AB, vmovl_s16(vget_low_s16(vey89ABCDEF)), vy_multiplier);
65 vaccCDEF = vmlaq_s32(vaccCDEF, vmovl_s16(vget_high_s16(vey89ABCDEF)), vy_multiplier);
66 vaccGHIJ = vmlaq_s32(vaccGHIJ, vmovl_s16(vget_low_s16(veyGHIJKLMN)), vy_multiplier);
67 vaccKLMN = vmlaq_s32(vaccKLMN, vmovl_s16(vget_high_s16(veyGHIJKLMN)), vy_multiplier);
68 vaccOPQR = vmlaq_s32(vaccOPQR, vmovl_s16(vget_low_s16(veyOPQRSTUV)), vy_multiplier);
69 vaccSTUV = vmlaq_s32(vaccSTUV, vmovl_s16(vget_high_s16(veyOPQRSTUV)), vy_multiplier);
70
71 vacc0123 = vsraq_n_s32(vacc0123, vbicq_s32(vacc0123, vzero_shift_mask), 31);
72 vacc4567 = vsraq_n_s32(vacc4567, vbicq_s32(vacc4567, vzero_shift_mask), 31);
73 vacc89AB = vsraq_n_s32(vacc89AB, vbicq_s32(vacc89AB, vzero_shift_mask), 31);
74 vaccCDEF = vsraq_n_s32(vaccCDEF, vbicq_s32(vaccCDEF, vzero_shift_mask), 31);
75 vaccGHIJ = vsraq_n_s32(vaccGHIJ, vbicq_s32(vaccGHIJ, vzero_shift_mask), 31);
76 vaccKLMN = vsraq_n_s32(vaccKLMN, vbicq_s32(vaccKLMN, vzero_shift_mask), 31);
77 vaccOPQR = vsraq_n_s32(vaccOPQR, vbicq_s32(vaccOPQR, vzero_shift_mask), 31);
78 vaccSTUV = vsraq_n_s32(vaccSTUV, vbicq_s32(vaccSTUV, vzero_shift_mask), 31);
79
80 vacc0123 = vrshlq_s32(vacc0123, vright_shift);
81 vacc4567 = vrshlq_s32(vacc4567, vright_shift);
82 vacc89AB = vrshlq_s32(vacc89AB, vright_shift);
83 vaccCDEF = vrshlq_s32(vaccCDEF, vright_shift);
84 vaccGHIJ = vrshlq_s32(vaccGHIJ, vright_shift);
85 vaccKLMN = vrshlq_s32(vaccKLMN, vright_shift);
86 vaccOPQR = vrshlq_s32(vaccOPQR, vright_shift);
87 vaccSTUV = vrshlq_s32(vaccSTUV, vright_shift);
88
89 const int16x8_t vacc01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567)), voutput_zero_point);
90 const int16x8_t vacc89ABCDEF = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc89AB), vqmovn_s32(vaccCDEF)), voutput_zero_point);
91 const int16x8_t vaccGHIJKLMN = vqaddq_s16(vcombine_s16(vqmovn_s32(vaccGHIJ), vqmovn_s32(vaccKLMN)), voutput_zero_point);
92 const int16x8_t vaccOPQRSTUV = vqaddq_s16(vcombine_s16(vqmovn_s32(vaccOPQR), vqmovn_s32(vaccSTUV)), voutput_zero_point);
93
94 int8x16_t vout0123456789ABCDEF = vcombine_s8(vqmovn_s16(vacc01234567), vqmovn_s16(vacc89ABCDEF));
95 int8x16_t voutGHIJKLMNOPQRSTUV = vcombine_s8(vqmovn_s16(vaccGHIJKLMN), vqmovn_s16(vaccOPQRSTUV));
96
97 vout0123456789ABCDEF = vmaxq_s8(vout0123456789ABCDEF, voutput_min);
98 voutGHIJKLMNOPQRSTUV = vmaxq_s8(voutGHIJKLMNOPQRSTUV, voutput_min);
99
100 vout0123456789ABCDEF = vminq_s8(vout0123456789ABCDEF, voutput_max);
101 voutGHIJKLMNOPQRSTUV = vminq_s8(voutGHIJKLMNOPQRSTUV, voutput_max);
102
103 vst1q_s8(output, vout0123456789ABCDEF); output += 16;
104 vst1q_s8(output, voutGHIJKLMNOPQRSTUV); output += 16;
105 }
106 if XNN_UNLIKELY(n != 0) {
107 do {
108 const int8x8_t vx01234567 = vld1_s8(input_x); input_x += 8;
109 const int8x8_t vy01234567 = vld1_s8(input_y); input_y += 8;
110
111 const int16x8_t vex01234567 = vsubl_s8(vx01234567, vx_zero_point);
112 const int16x8_t vey01234567 = vsubl_s8(vy01234567, vy_zero_point);
113
114 int32x4_t vacc0123 = vmulq_s32(vmovl_s16(vget_low_s16(vex01234567)), vx_multiplier);
115 int32x4_t vacc4567 = vmulq_s32(vmovl_s16(vget_high_s16(vex01234567)), vx_multiplier);
116
117 vacc0123 = vmlaq_s32(vacc0123, vmovl_s16(vget_low_s16(vey01234567)), vy_multiplier);
118 vacc4567 = vmlaq_s32(vacc4567, vmovl_s16(vget_high_s16(vey01234567)), vy_multiplier);
119
120 vacc0123 = vsraq_n_s32(vacc0123, vbicq_s32(vacc0123, vzero_shift_mask), 31);
121 vacc4567 = vsraq_n_s32(vacc4567, vbicq_s32(vacc4567, vzero_shift_mask), 31);
122
123 vacc0123 = vrshlq_s32(vacc0123, vright_shift);
124 vacc4567 = vrshlq_s32(vacc4567, vright_shift);
125
126 const int16x8_t vacc01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0123), vqmovn_s32(vacc4567)), voutput_zero_point);
127
128 int8x8_t vout01234567 = vqmovn_s16(vacc01234567);
129 vout01234567 = vmax_s8(vout01234567, vget_low_s8(voutput_min));
130 vout01234567 = vmin_s8(vout01234567, vget_low_s8(voutput_max));
131
132 if XNN_LIKELY(n >= (8 * sizeof(int8_t))) {
133 vst1_s8(output, vout01234567); output += 8;
134 n -= 8 * sizeof(int8_t);
135 } else {
136 if (n & (4 * sizeof(int8_t))) {
137 vst1_lane_u32(__builtin_assume_aligned(output, 1), vreinterpret_u32_s8(vout01234567), 0); output += 4;
138 vout01234567 = vext_s8(vout01234567, vout01234567, 4);
139 }
140 if (n & (2 * sizeof(int8_t))) {
141 vst1_lane_u16(__builtin_assume_aligned(output, 1), vreinterpret_u16_s8(vout01234567), 0); output += 2;
142 vout01234567 = vext_s8(vout01234567, vout01234567, 2);
143 }
144 if (n & (1 * sizeof(int8_t))) {
145 vst1_lane_s8(output, vout01234567, 0);
146 }
147 n = 0;
148 }
149 } while (n != 0);
150 }
151 }
152