1 /*
2 * Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <stdint.h>
8
9 #include <common/debug.h>
10 #include <lib/mmio.h>
11
12 #if RCAR_LSI == RCAR_AUTO
13 #include "G2M/qos_init_g2m_v10.h"
14 #include "G2M/qos_init_g2m_v11.h"
15 #include "G2M/qos_init_g2m_v30.h"
16 #endif /* RCAR_LSI == RCAR_AUTO */
17 #if (RCAR_LSI == RZ_G2M)
18 #include "G2M/qos_init_g2m_v10.h"
19 #include "G2M/qos_init_g2m_v11.h"
20 #include "G2M/qos_init_g2m_v30.h"
21 #endif /* RCAR_LSI == RZ_G2M */
22 #include "qos_common.h"
23 #include "qos_init.h"
24 #include "qos_reg.h"
25 #include "rcar_def.h"
26
27 #define DRAM_CH_CNT 0x04U
28 uint32_t qos_init_ddr_ch;
29 uint8_t qos_init_ddr_phyvalid;
30
31 #define PRR_PRODUCT_ERR(reg) \
32 { \
33 ERROR("LSI Product ID(PRR=0x%x) QoS " \
34 "initialize not supported.\n", reg); \
35 panic(); \
36 }
37
38 #define PRR_CUT_ERR(reg) \
39 { \
40 ERROR("LSI Cut ID(PRR=0x%x) QoS " \
41 "initialize not supported.\n", reg); \
42 panic(); \
43 }
44
rzg_qos_init(void)45 void rzg_qos_init(void)
46 {
47 uint32_t reg;
48 uint32_t i;
49
50 qos_init_ddr_ch = 0U;
51 qos_init_ddr_phyvalid = rzg_get_boardcnf_phyvalid();
52 for (i = 0U; i < DRAM_CH_CNT; i++) {
53 if ((qos_init_ddr_phyvalid & (1U << i))) {
54 qos_init_ddr_ch++;
55 }
56 }
57
58 reg = mmio_read_32(PRR);
59 #if (RCAR_LSI == RCAR_AUTO) || RCAR_LSI_CUT_COMPAT
60 switch (reg & PRR_PRODUCT_MASK) {
61 case PRR_PRODUCT_M3:
62 #if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M)
63 switch (reg & PRR_CUT_MASK) {
64 case PRR_PRODUCT_10:
65 qos_init_g2m_v10();
66 break;
67 case PRR_PRODUCT_21: /* G2M Cut 13 */
68 qos_init_g2m_v11();
69 break;
70 case PRR_PRODUCT_30: /* G2M Cut 30 */
71 default:
72 qos_init_g2m_v30();
73 break;
74 }
75 #else /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M) */
76 PRR_PRODUCT_ERR(reg);
77 #endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M) */
78 break;
79 default:
80 PRR_PRODUCT_ERR(reg);
81 break;
82 }
83 #else /* RCAR_LSI == RCAR_AUTO || RCAR_LSI_CUT_COMPAT */
84 #if (RCAR_LSI == RZ_G2M)
85 #if RCAR_LSI_CUT == RCAR_CUT_10
86 /* G2M Cut 10 */
87 if ((PRR_PRODUCT_M3 | PRR_PRODUCT_10)
88 != (reg & (PRR_PRODUCT_MASK | PRR_CUT_MASK))) {
89 PRR_PRODUCT_ERR(reg);
90 }
91 qos_init_g2m_v10();
92 #elif RCAR_LSI_CUT == RCAR_CUT_11
93 /* G2M Cut 11 */
94 if ((PRR_PRODUCT_M3 | PRR_PRODUCT_20)
95 != (reg & (PRR_PRODUCT_MASK | PRR_CUT_MASK))) {
96 PRR_PRODUCT_ERR(reg);
97 }
98 qos_init_g2m_v11();
99 #elif RCAR_LSI_CUT == RCAR_CUT_13
100 /* G2M Cut 13 */
101 if ((PRR_PRODUCT_M3 | PRR_PRODUCT_21)
102 != (reg & (PRR_PRODUCT_MASK | PRR_CUT_MASK))) {
103 PRR_PRODUCT_ERR(reg);
104 }
105 qos_init_g2m_v11();
106 #else
107 /* G2M Cut 30 or later */
108 if ((PRR_PRODUCT_M3)
109 != (reg & (PRR_PRODUCT_MASK))) {
110 PRR_PRODUCT_ERR(reg);
111 }
112 qos_init_g2m_v30();
113 #endif /* RCAR_LSI_CUT == RCAR_CUT_10 */
114 #else /* (RCAR_LSI == RZ_G2M) */
115 #error "Don't have QoS initialize routine(Unknown chip)."
116 #endif /* (RCAR_LSI == RZ_G2M) */
117 #endif /* RCAR_LSI == RCAR_AUTO || RCAR_LSI_CUT_COMPAT */
118 }
119
get_refperiod(void)120 uint32_t get_refperiod(void)
121 {
122 uint32_t refperiod = QOSWT_WTSET0_CYCLE;
123
124 #if (RCAR_LSI == RCAR_AUTO) || RCAR_LSI_CUT_COMPAT
125 uint32_t reg;
126
127 reg = mmio_read_32(PRR);
128 switch (reg & PRR_PRODUCT_MASK) {
129 #if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M)
130 case PRR_PRODUCT_M3:
131 switch (reg & PRR_CUT_MASK) {
132 case PRR_PRODUCT_10:
133 break;
134 case PRR_PRODUCT_20: /* G2M Cut 11 */
135 case PRR_PRODUCT_21: /* G2M Cut 13 */
136 case PRR_PRODUCT_30: /* G2M Cut 30 */
137 default:
138 refperiod = REFPERIOD_CYCLE;
139 break;
140 }
141 break;
142 #endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M) */
143 default:
144 break;
145 }
146 #elif RCAR_LSI == RZ_G2M
147 #if RCAR_LSI_CUT == RCAR_CUT_10
148 /* G2M Cut 10 */
149 #else /* RCAR_LSI_CUT == RCAR_CUT_10 */
150 /* G2M Cut 11|13|30 or later */
151 refperiod = REFPERIOD_CYCLE;
152 #endif /* RCAR_LSI_CUT == RCAR_CUT_10 */
153 #endif /* RCAR_LSI == RCAR_AUTO || RCAR_LSI_CUT_COMPAT */
154 return refperiod;
155 }
156
rzg_qos_dbsc_setting(const struct rcar_gen3_dbsc_qos_settings * qos,unsigned int qos_size,bool dbsc_wren)157 void rzg_qos_dbsc_setting(const struct rcar_gen3_dbsc_qos_settings *qos,
158 unsigned int qos_size, bool dbsc_wren)
159 {
160 unsigned int i;
161
162 /* Register write enable */
163 if (dbsc_wren) {
164 mmio_write_32(DBSC_DBSYSCNT0, 0x00001234U);
165 }
166
167 for (i = 0; i < qos_size; i++) {
168 mmio_write_32(qos[i].reg, qos[i].val);
169 }
170
171 /* Register write protect */
172 if (dbsc_wren) {
173 mmio_write_32(DBSC_DBSYSCNT0, 0x00000000U);
174 }
175 }
176