1/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */ 2/* 3 * Copyright (C) 2020 STMicroelectronics - All Rights Reserved 4 * Copyright (C) 2020 Ahmad Fatoum, Pengutronix 5 */ 6 7#include "stm32mp15-pinctrl.dtsi" 8 9&i2c4 { 10 pinctrl-names = "default"; 11 pinctrl-0 = <&i2c4_pins_a>; 12 clock-frequency = <400000>; 13 i2c-scl-rising-time-ns = <185>; 14 i2c-scl-falling-time-ns = <20>; 15 status = "okay"; 16 17 pmic: stpmic@33 { 18 compatible = "st,stpmic1"; 19 reg = <0x33>; 20 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; 21 interrupt-controller; 22 #interrupt-cells = <2>; 23 24 regulators { 25 compatible = "st,stpmic1-regulators"; 26 27 ldo1-supply = <&v3v3>; 28 ldo6-supply = <&v3v3>; 29 pwr_sw1-supply = <&bst_out>; 30 31 vddcore: buck1 { 32 regulator-name = "vddcore"; 33 regulator-min-microvolt = <1200000>; 34 regulator-max-microvolt = <1350000>; 35 regulator-always-on; 36 regulator-initial-mode = <0>; 37 regulator-over-current-protection; 38 }; 39 40 vdd_ddr: buck2 { 41 regulator-name = "vdd_ddr"; 42 regulator-min-microvolt = <1350000>; 43 regulator-max-microvolt = <1350000>; 44 regulator-always-on; 45 regulator-initial-mode = <0>; 46 regulator-over-current-protection; 47 }; 48 49 vdd: buck3 { 50 regulator-name = "vdd"; 51 regulator-min-microvolt = <3300000>; 52 regulator-max-microvolt = <3300000>; 53 regulator-always-on; 54 st,mask-reset; 55 regulator-initial-mode = <0>; 56 regulator-over-current-protection; 57 }; 58 59 v3v3: buck4 { 60 regulator-name = "v3v3"; 61 regulator-min-microvolt = <3300000>; 62 regulator-max-microvolt = <3300000>; 63 regulator-always-on; 64 regulator-over-current-protection; 65 regulator-initial-mode = <0>; 66 }; 67 68 v1v8_audio: ldo1 { 69 regulator-name = "v1v8_audio"; 70 regulator-min-microvolt = <1800000>; 71 regulator-max-microvolt = <1800000>; 72 regulator-always-on; 73 }; 74 75 v3v3_hdmi: ldo2 { 76 regulator-name = "v3v3_hdmi"; 77 regulator-min-microvolt = <3300000>; 78 regulator-max-microvolt = <3300000>; 79 regulator-always-on; 80 }; 81 82 vtt_ddr: ldo3 { 83 regulator-name = "vtt_ddr"; 84 regulator-min-microvolt = <500000>; 85 regulator-max-microvolt = <750000>; 86 regulator-always-on; 87 regulator-over-current-protection; 88 }; 89 90 vdd_usb: ldo4 { 91 regulator-name = "vdd_usb"; 92 regulator-min-microvolt = <3300000>; 93 regulator-max-microvolt = <3300000>; 94 }; 95 96 vdda: ldo5 { 97 regulator-name = "vdda"; 98 regulator-min-microvolt = <2900000>; 99 regulator-max-microvolt = <2900000>; 100 regulator-boot-on; 101 }; 102 103 v1v2_hdmi: ldo6 { 104 regulator-name = "v1v2_hdmi"; 105 regulator-min-microvolt = <1200000>; 106 regulator-max-microvolt = <1200000>; 107 regulator-always-on; 108 }; 109 110 vref_ddr: vref_ddr { 111 regulator-name = "vref_ddr"; 112 regulator-always-on; 113 regulator-over-current-protection; 114 }; 115 116 bst_out: boost { 117 regulator-name = "bst_out"; 118 }; 119 120 vbus_otg: pwr_sw1 { 121 regulator-name = "vbus_otg"; 122 regulator-active-discharge; 123 }; 124 125 vbus_sw: pwr_sw2 { 126 regulator-name = "vbus_sw"; 127 regulator-active-discharge; 128 }; 129 }; 130 131 pmic_watchdog: watchdog { 132 compatible = "st,stpmic1-wdt"; 133 status = "disabled"; 134 }; 135 }; 136}; 137 138&rng1 { 139 status = "okay"; 140}; 141 142/* ATF Specific */ 143#include <dt-bindings/clock/stm32mp1-clksrc.h> 144 145/ { 146 aliases { 147 gpio0 = &gpioa; 148 gpio1 = &gpiob; 149 gpio2 = &gpioc; 150 gpio3 = &gpiod; 151 gpio4 = &gpioe; 152 gpio5 = &gpiof; 153 gpio6 = &gpiog; 154 gpio7 = &gpioh; 155 gpio8 = &gpioi; 156 gpio25 = &gpioz; 157 i2c3 = &i2c4; 158 }; 159}; 160 161&bsec { 162 board_id: board_id@ec { 163 reg = <0xec 0x4>; 164 st,non-secure-otp; 165 }; 166}; 167 168&clk_hse { 169 st,digbypass; 170}; 171 172&cpu0{ 173 cpu-supply = <&vddcore>; 174}; 175 176&cpu1{ 177 cpu-supply = <&vddcore>; 178}; 179 180&hash1 { 181 status = "okay"; 182}; 183 184/* CLOCK init */ 185&rcc { 186 secure-status = "disabled"; 187 st,clksrc = < 188 CLK_MPU_PLL1P 189 CLK_AXI_PLL2P 190 CLK_MCU_PLL3P 191 CLK_PLL12_HSE 192 CLK_PLL3_HSE 193 CLK_PLL4_HSE 194 CLK_RTC_LSE 195 CLK_MCO1_DISABLED 196 CLK_MCO2_DISABLED 197 >; 198 199 st,clkdiv = < 200 1 /*MPU*/ 201 0 /*AXI*/ 202 0 /*MCU*/ 203 1 /*APB1*/ 204 1 /*APB2*/ 205 1 /*APB3*/ 206 1 /*APB4*/ 207 2 /*APB5*/ 208 23 /*RTC*/ 209 0 /*MCO1*/ 210 0 /*MCO2*/ 211 >; 212 213 st,pkcs = < 214 CLK_CKPER_HSE 215 CLK_FMC_ACLK 216 CLK_QSPI_ACLK 217 CLK_ETH_PLL4P 218 CLK_SDMMC12_PLL4P 219 CLK_DSI_DSIPLL 220 CLK_STGEN_HSE 221 CLK_USBPHY_HSE 222 CLK_SPI2S1_PLL3Q 223 CLK_SPI2S23_PLL3Q 224 CLK_SPI45_HSI 225 CLK_SPI6_HSI 226 CLK_I2C46_HSI 227 CLK_SDMMC3_PLL4P 228 CLK_USBO_USBPHY 229 CLK_ADC_CKPER 230 CLK_CEC_LSE 231 CLK_I2C12_HSI 232 CLK_I2C35_HSI 233 CLK_UART1_HSI 234 CLK_UART24_HSI 235 CLK_UART35_HSI 236 CLK_UART6_HSI 237 CLK_UART78_HSI 238 CLK_SPDIF_PLL4P 239 CLK_FDCAN_PLL4R 240 CLK_SAI1_PLL3Q 241 CLK_SAI2_PLL3Q 242 CLK_SAI3_PLL3Q 243 CLK_SAI4_PLL3Q 244 CLK_RNG1_LSI 245 CLK_RNG2_LSI 246 CLK_LPTIM1_PCLK1 247 CLK_LPTIM23_PCLK3 248 CLK_LPTIM45_LSE 249 >; 250 251 /* VCO = 1300.0 MHz => P = 650 (CPU) */ 252 pll1: st,pll@0 { 253 compatible = "st,stm32mp1-pll"; 254 reg = <0>; 255 cfg = < 2 80 0 0 0 PQR(1,0,0) >; 256 frac = < 0x800 >; 257 }; 258 259 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */ 260 pll2: st,pll@1 { 261 compatible = "st,stm32mp1-pll"; 262 reg = <1>; 263 cfg = <2 65 1 0 0 PQR(1,1,1)>; 264 frac = <0x1400>; 265 }; 266 267 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ 268 pll3: st,pll@2 { 269 compatible = "st,stm32mp1-pll"; 270 reg = <2>; 271 cfg = <1 33 1 16 36 PQR(1,1,1)>; 272 frac = <0x1a04>; 273 }; 274 275 /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ 276 pll4: st,pll@3 { 277 compatible = "st,stm32mp1-pll"; 278 reg = <3>; 279 cfg = <3 98 5 7 7 PQR(1,1,1)>; 280 }; 281}; 282