1 /*
2  * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <lib/utils_def.h>
8 
9 #ifndef FPGA_DEF_H
10 #define FPGA_DEF_H
11 
12 /*
13  * These are set to large values to account for images describing systems with
14  * larger cluster configurations.
15  *
16  * For cases where the number of clusters, cores or threads is smaller than a
17  * maximum value below, this does not affect the PSCI functionality as any PEs
18  * that are present will still be indexed appropriately regardless of any empty
19  * entries in the array used to represent the topology.
20  */
21 
22 #define FPGA_MAX_CLUSTER_COUNT			4
23 #define FPGA_MAX_CPUS_PER_CLUSTER		8
24 #define FPGA_MAX_PE_PER_CPU			4
25 
26 #define FPGA_PRIMARY_CPU			0x0
27 /*******************************************************************************
28  * FPGA image memory map related constants
29  ******************************************************************************/
30 
31 /*
32  * UART base address, just for the crash console, as a fallback.
33  * The actual console UART address is taken from the DT.
34  */
35 #define PLAT_FPGA_CRASH_UART_BASE		0x7ff80000
36 
37 #define FPGA_DEFAULT_TIMER_FREQUENCY		10000000
38 
39 #endif
40