1 /*
2 * Copyright (c) 2019, Renesas Electronics Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8
9 #include <arch_helpers.h>
10 #include <drivers/console.h>
11 #include <lib/xlat_tables/xlat_mmu_helpers.h>
12 #include <plat/common/platform.h>
13
14 #include <lib/mmio.h>
15
16 #define CPG_BASE 0xE6150000
17 #define CPG_MSTPSR3 0x0048
18 #define MSTP318 (1 << 18)
19 #define MSTP319 (1 << 19)
20 #define PMSR 0x5c
21 #define PMSR_L1FAEG (1U << 31)
22 #define PMSR_PMEL1RX (1 << 23)
23 #define PMCTLR 0x60
24 #define PMSR_L1IATN (1U << 31)
25
rcar_pcie_fixup(unsigned int controller)26 static int rcar_pcie_fixup(unsigned int controller)
27 {
28 uint32_t rcar_pcie_base[] = { 0xfe011000, 0xee811000 };
29 uint32_t addr = rcar_pcie_base[controller];
30 uint32_t cpg, pmsr;
31 int ret = 0;
32
33 /* Test if PCIECx is enabled */
34 cpg = mmio_read_32(CPG_BASE + CPG_MSTPSR3);
35 if (cpg & (MSTP318 << !controller))
36 return ret;
37
38 pmsr = mmio_read_32(addr + PMSR);
39
40 if ((pmsr & PMSR_PMEL1RX) && ((pmsr & 0x70000) != 0x30000)) {
41 /* Fix applicable */
42 mmio_write_32(addr + PMCTLR, PMSR_L1IATN);
43 while (!(mmio_read_32(addr + PMSR) & PMSR_L1FAEG))
44 ;
45 mmio_write_32(addr + PMSR, PMSR_L1FAEG | PMSR_PMEL1RX);
46 ret = 1;
47 }
48
49 return ret;
50 }
51
52 /* RAS functions common to AArch64 ARM platforms */
plat_ea_handler(unsigned int ea_reason,uint64_t syndrome,void * cookie,void * handle,uint64_t flags)53 void plat_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie,
54 void *handle, uint64_t flags)
55 {
56 unsigned int fixed = 0;
57
58 fixed |= rcar_pcie_fixup(0);
59 fixed |= rcar_pcie_fixup(1);
60
61 if (fixed)
62 return;
63
64 ERROR("Unhandled External Abort received on 0x%lx at EL3!\n",
65 read_mpidr_el1());
66 ERROR(" exception reason=%u syndrome=0x%llx\n", ea_reason, syndrome);
67
68 panic();
69 }
70
71 #include <drivers/renesas/rcar/console/console.h>
72
73 static console_t rcar_boot_console;
74 static console_t rcar_runtime_console;
75
rcar_console_boot_init(void)76 void rcar_console_boot_init(void)
77 {
78 int ret;
79
80 ret = console_rcar_register(0, 0, 0, &rcar_boot_console);
81 if (!ret)
82 panic();
83
84 console_set_scope(&rcar_boot_console, CONSOLE_FLAG_BOOT);
85 }
86
rcar_console_boot_end(void)87 void rcar_console_boot_end(void)
88 {
89 }
90
rcar_console_runtime_init(void)91 void rcar_console_runtime_init(void)
92 {
93 int ret;
94
95 ret = console_rcar_register(1, 0, 0, &rcar_runtime_console);
96 if (!ret)
97 panic();
98
99 console_set_scope(&rcar_boot_console, CONSOLE_FLAG_RUNTIME);
100 }
101
rcar_console_runtime_end(void)102 void rcar_console_runtime_end(void)
103 {
104 }
105