1 /*
2 * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8 #include <plat_arm.h>
9 #include <plat_private.h>
10 #include <pm_common.h>
11 #include <common/debug.h>
12 #include <lib/mmio.h>
13 #include <lib/psci/psci.h>
14 #include <plat/common/platform.h>
15 #include <plat/arm/common/plat_arm.h>
16
17 #include "pm_api_sys.h"
18 #include "pm_client.h"
19
20 static uintptr_t versal_sec_entry;
21
versal_pwr_domain_on(u_register_t mpidr)22 static int versal_pwr_domain_on(u_register_t mpidr)
23 {
24 unsigned int cpu_id = plat_core_pos_by_mpidr(mpidr);
25 const struct pm_proc *proc;
26
27 VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr);
28
29 if (cpu_id == -1)
30 return PSCI_E_INTERN_FAIL;
31
32 proc = pm_get_proc(cpu_id);
33
34 /* Send request to PMC to wake up selected ACPU core */
35 pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFF) | 0x1,
36 versal_sec_entry >> 32, 0);
37
38 /* Clear power down request */
39 pm_client_wakeup(proc);
40
41 return PSCI_E_SUCCESS;
42 }
43
44 /**
45 * versal_pwr_domain_suspend() - This function sends request to PMC to suspend
46 * core.
47 *
48 * @target_state Targated state
49 */
versal_pwr_domain_suspend(const psci_power_state_t * target_state)50 static void versal_pwr_domain_suspend(const psci_power_state_t *target_state)
51 {
52 unsigned int state;
53 unsigned int cpu_id = plat_my_core_pos();
54 const struct pm_proc *proc = pm_get_proc(cpu_id);
55
56 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
57 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
58 __func__, i, target_state->pwr_domain_state[i]);
59
60 plat_versal_gic_cpuif_disable();
61
62 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
63 plat_versal_gic_save();
64 }
65
66 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ?
67 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE;
68
69 /* Send request to PMC to suspend this core */
70 pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_sec_entry);
71
72 /* APU is to be turned off */
73 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
74 /* disable coherency */
75 plat_arm_interconnect_exit_coherency();
76 }
77 }
78
79 /**
80 * versal_pwr_domain_suspend_finish() - This function performs actions to finish
81 * suspend procedure.
82 *
83 * @target_state Targated state
84 */
versal_pwr_domain_suspend_finish(const psci_power_state_t * target_state)85 static void versal_pwr_domain_suspend_finish(
86 const psci_power_state_t *target_state)
87 {
88 unsigned int cpu_id = plat_my_core_pos();
89 const struct pm_proc *proc = pm_get_proc(cpu_id);
90
91 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
92 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
93 __func__, i, target_state->pwr_domain_state[i]);
94
95 /* Clear the APU power control register for this cpu */
96 pm_client_wakeup(proc);
97
98 /* enable coherency */
99 plat_arm_interconnect_enter_coherency();
100
101 /* APU was turned off, so restore GIC context */
102 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
103 plat_versal_gic_resume();
104 }
105
106 plat_versal_gic_cpuif_enable();
107 }
108
versal_pwr_domain_on_finish(const psci_power_state_t * target_state)109 void versal_pwr_domain_on_finish(const psci_power_state_t *target_state)
110 {
111 /* Enable the gic cpu interface */
112 plat_versal_gic_pcpu_init();
113
114 /* Program the gic per-cpu distributor or re-distributor interface */
115 plat_versal_gic_cpuif_enable();
116 }
117
118 /**
119 * versal_system_off() - This function sends the system off request
120 * to firmware. This function does not return.
121 */
versal_system_off(void)122 static void __dead2 versal_system_off(void)
123 {
124 /* Send the power down request to the PMC */
125 pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN,
126 pm_get_shutdown_scope());
127
128 while (1)
129 wfi();
130 }
131
132 /**
133 * versal_system_reset() - This function sends the reset request
134 * to firmware for the system to reset. This function does not return.
135 */
versal_system_reset(void)136 static void __dead2 versal_system_reset(void)
137 {
138 /* Send the system reset request to the PMC */
139 pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET,
140 pm_get_shutdown_scope());
141
142 while (1)
143 wfi();
144 }
145
146 /**
147 * versal_pwr_domain_off() - This function performs actions to turn off core
148 *
149 * @target_state Targated state
150 */
versal_pwr_domain_off(const psci_power_state_t * target_state)151 static void versal_pwr_domain_off(const psci_power_state_t *target_state)
152 {
153 unsigned int cpu_id = plat_my_core_pos();
154 const struct pm_proc *proc = pm_get_proc(cpu_id);
155
156 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
157 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
158 __func__, i, target_state->pwr_domain_state[i]);
159
160 /* Prevent interrupts from spuriously waking up this cpu */
161 plat_versal_gic_cpuif_disable();
162
163 /*
164 * Send request to PMC to power down the appropriate APU CPU
165 * core.
166 * According to PSCI specification, CPU_off function does not
167 * have resume address and CPU core can only be woken up
168 * invoking CPU_on function, during which resume address will
169 * be set.
170 */
171 pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0);
172 }
173
174 /**
175 * versal_validate_power_state() - This function ensures that the power state
176 * parameter in request is valid.
177 *
178 * @power_state Power state of core
179 * @req_state Requested state
180 *
181 * @return Returns status, either success or reason
182 */
versal_validate_power_state(unsigned int power_state,psci_power_state_t * req_state)183 static int versal_validate_power_state(unsigned int power_state,
184 psci_power_state_t *req_state)
185 {
186 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
187
188 int pstate = psci_get_pstate_type(power_state);
189
190 assert(req_state);
191
192 /* Sanity check the requested state */
193 if (pstate == PSTATE_TYPE_STANDBY)
194 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE;
195 else
196 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE;
197
198 /* We expect the 'state id' to be zero */
199 if (psci_get_pstate_id(power_state))
200 return PSCI_E_INVALID_PARAMS;
201
202 return PSCI_E_SUCCESS;
203 }
204
205 /**
206 * versal_get_sys_suspend_power_state() - Get power state for system suspend
207 *
208 * @req_state Requested state
209 */
versal_get_sys_suspend_power_state(psci_power_state_t * req_state)210 static void versal_get_sys_suspend_power_state(psci_power_state_t *req_state)
211 {
212 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE;
213 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE;
214 }
215
216 static const struct plat_psci_ops versal_nopmc_psci_ops = {
217 .pwr_domain_on = versal_pwr_domain_on,
218 .pwr_domain_off = versal_pwr_domain_off,
219 .pwr_domain_on_finish = versal_pwr_domain_on_finish,
220 .pwr_domain_suspend = versal_pwr_domain_suspend,
221 .pwr_domain_suspend_finish = versal_pwr_domain_suspend_finish,
222 .system_off = versal_system_off,
223 .system_reset = versal_system_reset,
224 .validate_power_state = versal_validate_power_state,
225 .get_sys_suspend_power_state = versal_get_sys_suspend_power_state,
226 };
227
228 /*******************************************************************************
229 * Export the platform specific power ops.
230 ******************************************************************************/
plat_setup_psci_ops(uintptr_t sec_entrypoint,const struct plat_psci_ops ** psci_ops)231 int plat_setup_psci_ops(uintptr_t sec_entrypoint,
232 const struct plat_psci_ops **psci_ops)
233 {
234 versal_sec_entry = sec_entrypoint;
235
236 *psci_ops = &versal_nopmc_psci_ops;
237
238 return 0;
239 }
240