1 #include <gtest/gtest.h>
2 
3 #include <cpuinfo.h>
4 #include <cpuinfo-mock.h>
5 
6 
TEST(PROCESSORS,count)7 TEST(PROCESSORS, count) {
8 	ASSERT_EQ(8, cpuinfo_get_processors_count());
9 }
10 
TEST(PROCESSORS,non_null)11 TEST(PROCESSORS, non_null) {
12 	ASSERT_TRUE(cpuinfo_get_processors());
13 }
14 
TEST(PROCESSORS,smt_id)15 TEST(PROCESSORS, smt_id) {
16 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 		ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
18 	}
19 }
20 
TEST(PROCESSORS,core)21 TEST(PROCESSORS, core) {
22 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 		ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
24 	}
25 }
26 
TEST(PROCESSORS,cluster)27 TEST(PROCESSORS, cluster) {
28 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 		switch (i) {
30 			case 0:
31 			case 1:
32 			case 2:
33 			case 3:
34 				ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster);
35 				break;
36 			case 4:
37 			case 5:
38 			case 6:
39 			case 7:
40 				ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster);
41 				break;
42 		}
43 	}
44 }
45 
TEST(PROCESSORS,package)46 TEST(PROCESSORS, package) {
47 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
48 		ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
49 	}
50 }
51 
TEST(PROCESSORS,linux_id)52 TEST(PROCESSORS, linux_id) {
53 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
54 		switch (i) {
55 			case 0:
56 			case 1:
57 			case 2:
58 			case 3:
59 				ASSERT_EQ(i + 4, cpuinfo_get_processor(i)->linux_id);
60 				break;
61 			case 4:
62 			case 5:
63 			case 6:
64 			case 7:
65 				ASSERT_EQ(i - 4, cpuinfo_get_processor(i)->linux_id);
66 				break;
67 		}
68 	}
69 }
70 
TEST(PROCESSORS,l1i)71 TEST(PROCESSORS, l1i) {
72 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
73 		ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
74 	}
75 }
76 
TEST(PROCESSORS,l1d)77 TEST(PROCESSORS, l1d) {
78 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
79 		ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
80 	}
81 }
82 
TEST(PROCESSORS,l2)83 TEST(PROCESSORS, l2) {
84 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
85 		switch (i) {
86 			case 0:
87 			case 1:
88 			case 2:
89 			case 3:
90 				ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
91 				break;
92 			case 4:
93 			case 5:
94 			case 6:
95 			case 7:
96 				ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2);
97 				break;
98 		}
99 	}
100 }
101 
TEST(PROCESSORS,l3)102 TEST(PROCESSORS, l3) {
103 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
104 		ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
105 	}
106 }
107 
TEST(PROCESSORS,l4)108 TEST(PROCESSORS, l4) {
109 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
110 		ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
111 	}
112 }
113 
TEST(CORES,count)114 TEST(CORES, count) {
115 	ASSERT_EQ(8, cpuinfo_get_cores_count());
116 }
117 
TEST(CORES,non_null)118 TEST(CORES, non_null) {
119 	ASSERT_TRUE(cpuinfo_get_cores());
120 }
121 
TEST(CORES,processor_start)122 TEST(CORES, processor_start) {
123 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
124 		ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
125 	}
126 }
127 
TEST(CORES,processor_count)128 TEST(CORES, processor_count) {
129 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
130 		ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
131 	}
132 }
133 
TEST(CORES,core_id)134 TEST(CORES, core_id) {
135 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
136 		ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
137 	}
138 }
139 
TEST(CORES,cluster)140 TEST(CORES, cluster) {
141 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
142 		switch (i) {
143 			case 0:
144 			case 1:
145 			case 2:
146 			case 3:
147 				ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster);
148 				break;
149 			case 4:
150 			case 5:
151 			case 6:
152 			case 7:
153 				ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster);
154 				break;
155 		}
156 	}
157 }
158 
TEST(CORES,package)159 TEST(CORES, package) {
160 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
161 		ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
162 	}
163 }
164 
TEST(CORES,vendor)165 TEST(CORES, vendor) {
166 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
167 		ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
168 	}
169 }
170 
TEST(CORES,uarch)171 TEST(CORES, uarch) {
172 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
173 		ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch);
174 	}
175 }
176 
TEST(CORES,midr)177 TEST(CORES, midr) {
178 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
179 		ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_core(i)->midr);
180 	}
181 }
182 
TEST(CORES,DISABLED_frequency)183 TEST(CORES, DISABLED_frequency) {
184 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
185 		switch (i) {
186 			case 0:
187 			case 1:
188 			case 2:
189 			case 3:
190 				ASSERT_EQ(UINT64_C(2016000000), cpuinfo_get_core(i)->frequency);
191 				break;
192 			case 4:
193 			case 5:
194 			case 6:
195 			case 7:
196 				ASSERT_EQ(UINT64_C(1709000000), cpuinfo_get_core(i)->frequency);
197 				break;
198 		}
199 	}
200 }
201 
TEST(CLUSTERS,count)202 TEST(CLUSTERS, count) {
203 	ASSERT_EQ(2, cpuinfo_get_clusters_count());
204 }
205 
TEST(CLUSTERS,non_null)206 TEST(CLUSTERS, non_null) {
207 	ASSERT_TRUE(cpuinfo_get_clusters());
208 }
209 
TEST(CLUSTERS,processor_start)210 TEST(CLUSTERS, processor_start) {
211 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
212 		switch (i) {
213 			case 0:
214 				ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start);
215 				break;
216 			case 1:
217 				ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_start);
218 				break;
219 		}
220 	}
221 }
222 
TEST(CLUSTERS,processor_count)223 TEST(CLUSTERS, processor_count) {
224 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
225 		ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count);
226 	}
227 }
228 
TEST(CLUSTERS,core_start)229 TEST(CLUSTERS, core_start) {
230 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
231 		switch (i) {
232 			case 0:
233 				ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start);
234 				break;
235 			case 1:
236 				ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_start);
237 				break;
238 		}
239 	}
240 }
241 
TEST(CLUSTERS,core_count)242 TEST(CLUSTERS, core_count) {
243 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
244 		ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count);
245 	}
246 }
247 
TEST(CLUSTERS,cluster_id)248 TEST(CLUSTERS, cluster_id) {
249 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
250 		ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
251 	}
252 }
253 
TEST(CLUSTERS,package)254 TEST(CLUSTERS, package) {
255 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
256 		ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
257 	}
258 }
259 
TEST(CLUSTERS,vendor)260 TEST(CLUSTERS, vendor) {
261 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
262 		ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor);
263 	}
264 }
265 
TEST(CLUSTERS,uarch)266 TEST(CLUSTERS, uarch) {
267 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
268 		ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch);
269 	}
270 }
271 
TEST(CLUSTERS,midr)272 TEST(CLUSTERS, midr) {
273 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
274 		ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_cluster(i)->midr);
275 	}
276 }
277 
TEST(CLUSTERS,DISABLED_frequency)278 TEST(CLUSTERS, DISABLED_frequency) {
279 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
280 		switch (i) {
281 			case 0:
282 				ASSERT_EQ(UINT64_C(2016000000), cpuinfo_get_cluster(i)->frequency);
283 				break;
284 			case 1:
285 				ASSERT_EQ(UINT64_C(1709000000), cpuinfo_get_cluster(i)->frequency);
286 				break;
287 		}
288 	}
289 }
290 
TEST(PACKAGES,count)291 TEST(PACKAGES, count) {
292 	ASSERT_EQ(1, cpuinfo_get_packages_count());
293 }
294 
TEST(PACKAGES,name)295 TEST(PACKAGES, name) {
296 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
297 		ASSERT_EQ("HiSilicon Kirin 650",
298 			std::string(cpuinfo_get_package(i)->name,
299 				strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
300 	}
301 }
302 
TEST(PACKAGES,processor_start)303 TEST(PACKAGES, processor_start) {
304 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
305 		ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
306 	}
307 }
308 
TEST(PACKAGES,processor_count)309 TEST(PACKAGES, processor_count) {
310 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
311 		ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count);
312 	}
313 }
314 
TEST(PACKAGES,core_start)315 TEST(PACKAGES, core_start) {
316 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
317 		ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
318 	}
319 }
320 
TEST(PACKAGES,core_count)321 TEST(PACKAGES, core_count) {
322 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
323 		ASSERT_EQ(8, cpuinfo_get_package(i)->core_count);
324 	}
325 }
326 
TEST(PACKAGES,cluster_start)327 TEST(PACKAGES, cluster_start) {
328 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
329 		ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
330 	}
331 }
332 
TEST(PACKAGES,cluster_count)333 TEST(PACKAGES, cluster_count) {
334 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
335 		ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count);
336 	}
337 }
338 
TEST(ISA,thumb)339 TEST(ISA, thumb) {
340 	#if CPUINFO_ARCH_ARM
341 		ASSERT_TRUE(cpuinfo_has_arm_thumb());
342 	#elif CPUINFO_ARCH_ARM64
343 		ASSERT_FALSE(cpuinfo_has_arm_thumb());
344 	#endif
345 }
346 
TEST(ISA,thumb2)347 TEST(ISA, thumb2) {
348 	#if CPUINFO_ARCH_ARM
349 		ASSERT_TRUE(cpuinfo_has_arm_thumb2());
350 	#elif CPUINFO_ARCH_ARM64
351 		ASSERT_FALSE(cpuinfo_has_arm_thumb2());
352 	#endif
353 }
354 
TEST(ISA,armv5e)355 TEST(ISA, armv5e) {
356 	#if CPUINFO_ARCH_ARM
357 		ASSERT_TRUE(cpuinfo_has_arm_v5e());
358 	#elif CPUINFO_ARCH_ARM64
359 		ASSERT_FALSE(cpuinfo_has_arm_v5e());
360 	#endif
361 }
362 
TEST(ISA,armv6)363 TEST(ISA, armv6) {
364 	#if CPUINFO_ARCH_ARM
365 		ASSERT_TRUE(cpuinfo_has_arm_v6());
366 	#elif CPUINFO_ARCH_ARM64
367 		ASSERT_FALSE(cpuinfo_has_arm_v6());
368 	#endif
369 }
370 
TEST(ISA,armv6k)371 TEST(ISA, armv6k) {
372 	#if CPUINFO_ARCH_ARM
373 		ASSERT_TRUE(cpuinfo_has_arm_v6k());
374 	#elif CPUINFO_ARCH_ARM64
375 		ASSERT_FALSE(cpuinfo_has_arm_v6k());
376 	#endif
377 }
378 
TEST(ISA,armv7)379 TEST(ISA, armv7) {
380 	#if CPUINFO_ARCH_ARM
381 		ASSERT_TRUE(cpuinfo_has_arm_v7());
382 	#elif CPUINFO_ARCH_ARM64
383 		ASSERT_FALSE(cpuinfo_has_arm_v7());
384 	#endif
385 }
386 
TEST(ISA,armv7mp)387 TEST(ISA, armv7mp) {
388 	#if CPUINFO_ARCH_ARM
389 		ASSERT_TRUE(cpuinfo_has_arm_v7mp());
390 	#elif CPUINFO_ARCH_ARM64
391 		ASSERT_FALSE(cpuinfo_has_arm_v7mp());
392 	#endif
393 }
394 
TEST(ISA,idiv)395 TEST(ISA, idiv) {
396 	ASSERT_TRUE(cpuinfo_has_arm_idiv());
397 }
398 
TEST(ISA,vfpv2)399 TEST(ISA, vfpv2) {
400 	ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
401 }
402 
TEST(ISA,vfpv3)403 TEST(ISA, vfpv3) {
404 	ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
405 }
406 
TEST(ISA,vfpv3_d32)407 TEST(ISA, vfpv3_d32) {
408 	ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
409 }
410 
TEST(ISA,vfpv3_fp16)411 TEST(ISA, vfpv3_fp16) {
412 	ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
413 }
414 
TEST(ISA,vfpv3_fp16_d32)415 TEST(ISA, vfpv3_fp16_d32) {
416 	ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
417 }
418 
TEST(ISA,vfpv4)419 TEST(ISA, vfpv4) {
420 	ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
421 }
422 
TEST(ISA,vfpv4_d32)423 TEST(ISA, vfpv4_d32) {
424 	ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
425 }
426 
TEST(ISA,wmmx)427 TEST(ISA, wmmx) {
428 	ASSERT_FALSE(cpuinfo_has_arm_wmmx());
429 }
430 
TEST(ISA,wmmx2)431 TEST(ISA, wmmx2) {
432 	ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
433 }
434 
TEST(ISA,neon)435 TEST(ISA, neon) {
436 	ASSERT_TRUE(cpuinfo_has_arm_neon());
437 }
438 
TEST(ISA,neon_fp16)439 TEST(ISA, neon_fp16) {
440 	ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
441 }
442 
TEST(ISA,neon_fma)443 TEST(ISA, neon_fma) {
444 	ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
445 }
446 
TEST(ISA,atomics)447 TEST(ISA, atomics) {
448 	ASSERT_FALSE(cpuinfo_has_arm_atomics());
449 }
450 
TEST(ISA,neon_rdm)451 TEST(ISA, neon_rdm) {
452 	ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
453 }
454 
TEST(ISA,fp16_arith)455 TEST(ISA, fp16_arith) {
456 	ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
457 }
458 
TEST(ISA,neon_fp16_arith)459 TEST(ISA, neon_fp16_arith) {
460 	ASSERT_FALSE(cpuinfo_has_arm_neon_fp16_arith());
461 }
462 
TEST(ISA,neon_dot)463 TEST(ISA, neon_dot) {
464 	ASSERT_FALSE(cpuinfo_has_arm_neon_dot());
465 }
466 
TEST(ISA,jscvt)467 TEST(ISA, jscvt) {
468 	ASSERT_FALSE(cpuinfo_has_arm_jscvt());
469 }
470 
TEST(ISA,fcma)471 TEST(ISA, fcma) {
472 	ASSERT_FALSE(cpuinfo_has_arm_fcma());
473 }
474 
TEST(ISA,aes)475 TEST(ISA, aes) {
476 	ASSERT_TRUE(cpuinfo_has_arm_aes());
477 }
478 
TEST(ISA,sha1)479 TEST(ISA, sha1) {
480 	ASSERT_TRUE(cpuinfo_has_arm_sha1());
481 }
482 
TEST(ISA,sha2)483 TEST(ISA, sha2) {
484 	ASSERT_TRUE(cpuinfo_has_arm_sha2());
485 }
486 
TEST(ISA,pmull)487 TEST(ISA, pmull) {
488 	ASSERT_TRUE(cpuinfo_has_arm_pmull());
489 }
490 
TEST(ISA,crc32)491 TEST(ISA, crc32) {
492 	ASSERT_TRUE(cpuinfo_has_arm_crc32());
493 }
494 
TEST(L1I,count)495 TEST(L1I, count) {
496 	ASSERT_EQ(8, cpuinfo_get_l1i_caches_count());
497 }
498 
TEST(L1I,non_null)499 TEST(L1I, non_null) {
500 	ASSERT_TRUE(cpuinfo_get_l1i_caches());
501 }
502 
TEST(L1I,size)503 TEST(L1I, size) {
504 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
505 		ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
506 	}
507 }
508 
TEST(L1I,associativity)509 TEST(L1I, associativity) {
510 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
511 		ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity);
512 	}
513 }
514 
TEST(L1I,sets)515 TEST(L1I, sets) {
516 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
517 		ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size,
518 			cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
519 	}
520 }
521 
TEST(L1I,partitions)522 TEST(L1I, partitions) {
523 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
524 		ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
525 	}
526 }
527 
TEST(L1I,line_size)528 TEST(L1I, line_size) {
529 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
530 		ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
531 	}
532 }
533 
TEST(L1I,flags)534 TEST(L1I, flags) {
535 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
536 		ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
537 	}
538 }
539 
TEST(L1I,processors)540 TEST(L1I, processors) {
541 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
542 		ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
543 		ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
544 	}
545 }
546 
TEST(L1D,count)547 TEST(L1D, count) {
548 	ASSERT_EQ(8, cpuinfo_get_l1d_caches_count());
549 }
550 
TEST(L1D,non_null)551 TEST(L1D, non_null) {
552 	ASSERT_TRUE(cpuinfo_get_l1d_caches());
553 }
554 
TEST(L1D,size)555 TEST(L1D, size) {
556 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
557 		ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
558 	}
559 }
560 
TEST(L1D,associativity)561 TEST(L1D, associativity) {
562 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
563 		ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
564 	}
565 }
566 
TEST(L1D,sets)567 TEST(L1D, sets) {
568 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
569 		ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size,
570 			cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
571 	}
572 }
573 
TEST(L1D,partitions)574 TEST(L1D, partitions) {
575 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
576 		ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
577 	}
578 }
579 
TEST(L1D,line_size)580 TEST(L1D, line_size) {
581 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
582 		ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
583 	}
584 }
585 
TEST(L1D,flags)586 TEST(L1D, flags) {
587 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
588 		ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
589 	}
590 }
591 
TEST(L1D,processors)592 TEST(L1D, processors) {
593 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
594 		ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
595 		ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
596 	}
597 }
598 
TEST(L2,count)599 TEST(L2, count) {
600 	ASSERT_EQ(2, cpuinfo_get_l2_caches_count());
601 }
602 
TEST(L2,non_null)603 TEST(L2, non_null) {
604 	ASSERT_TRUE(cpuinfo_get_l2_caches());
605 }
606 
TEST(L2,size)607 TEST(L2, size) {
608 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
609 		ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size);
610 	}
611 }
612 
TEST(L2,associativity)613 TEST(L2, associativity) {
614 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
615 		ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
616 	}
617 }
618 
TEST(L2,sets)619 TEST(L2, sets) {
620 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
621 		ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
622 			cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
623 	}
624 }
625 
TEST(L2,partitions)626 TEST(L2, partitions) {
627 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
628 		ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
629 	}
630 }
631 
TEST(L2,line_size)632 TEST(L2, line_size) {
633 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
634 		ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
635 	}
636 }
637 
TEST(L2,flags)638 TEST(L2, flags) {
639 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
640 		ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
641 	}
642 }
643 
TEST(L2,processors)644 TEST(L2, processors) {
645 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
646 		switch (i) {
647 			case 0:
648 				ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
649 				ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
650 				break;
651 			case 1:
652 				ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_start);
653 				ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
654 				break;
655 		}
656 	}
657 }
658 
TEST(L3,none)659 TEST(L3, none) {
660 	ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
661 	ASSERT_FALSE(cpuinfo_get_l3_caches());
662 }
663 
TEST(L4,none)664 TEST(L4, none) {
665 	ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
666 	ASSERT_FALSE(cpuinfo_get_l4_caches());
667 }
668 
669 #include <huawei-p9-lite.h>
670 
main(int argc,char * argv[])671 int main(int argc, char* argv[]) {
672 #if CPUINFO_ARCH_ARM
673 	cpuinfo_set_hwcap(UINT32_C(0x0027B0D6));
674 	cpuinfo_set_hwcap2(UINT32_C(0x0000001F));
675 #elif CPUINFO_ARCH_ARM64
676 	cpuinfo_set_hwcap(UINT32_C(0x000000FF));
677 #endif
678 	cpuinfo_mock_filesystem(filesystem);
679 #ifdef __ANDROID__
680 	cpuinfo_mock_android_properties(properties);
681 #endif
682 	cpuinfo_initialize();
683 	::testing::InitGoogleTest(&argc, argv);
684 	return RUN_ALL_TESTS();
685 }