1 #include <gtest/gtest.h>
2 
3 #include <cpuinfo.h>
4 #include <cpuinfo-mock.h>
5 
6 
TEST(PROCESSORS,count)7 TEST(PROCESSORS, count) {
8 	ASSERT_EQ(8, cpuinfo_get_processors_count());
9 }
10 
TEST(PROCESSORS,non_null)11 TEST(PROCESSORS, non_null) {
12 	ASSERT_TRUE(cpuinfo_get_processors());
13 }
14 
TEST(PROCESSORS,smt_id)15 TEST(PROCESSORS, smt_id) {
16 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 		ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
18 	}
19 }
20 
TEST(PROCESSORS,core)21 TEST(PROCESSORS, core) {
22 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 		ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
24 	}
25 }
26 
TEST(PROCESSORS,cluster)27 TEST(PROCESSORS, cluster) {
28 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 		switch (i) {
30 			case 0:
31 			case 1:
32 			case 2:
33 			case 3:
34 				ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster);
35 				break;
36 			case 4:
37 			case 5:
38 			case 6:
39 			case 7:
40 				ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster);
41 				break;
42 		}
43 	}
44 }
45 
TEST(PROCESSORS,package)46 TEST(PROCESSORS, package) {
47 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
48 		ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
49 	}
50 }
51 
TEST(PROCESSORS,DISABLED_linux_id)52 TEST(PROCESSORS, DISABLED_linux_id) {
53 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
54 		switch (i) {
55 			case 0:
56 			case 1:
57 			case 2:
58 			case 3:
59 				ASSERT_EQ(i, cpuinfo_get_processor(i)->linux_id);
60 				break;
61 			case 4:
62 			case 5:
63 			case 6:
64 			case 7:
65 				ASSERT_EQ(i, cpuinfo_get_processor(i)->linux_id);
66 				break;
67 		}
68 	}
69 }
70 
TEST(PROCESSORS,l1i)71 TEST(PROCESSORS, l1i) {
72 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
73 		ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
74 	}
75 }
76 
TEST(PROCESSORS,l1d)77 TEST(PROCESSORS, l1d) {
78 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
79 		ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
80 	}
81 }
82 
TEST(PROCESSORS,l2)83 TEST(PROCESSORS, l2) {
84 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
85 		switch (i) {
86 			case 0:
87 			case 1:
88 			case 2:
89 			case 3:
90 				ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
91 				break;
92 			case 4:
93 			case 5:
94 			case 6:
95 			case 7:
96 				ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2);
97 				break;
98 		}
99 	}
100 }
101 
TEST(PROCESSORS,l3)102 TEST(PROCESSORS, l3) {
103 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
104 		ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
105 	}
106 }
107 
TEST(PROCESSORS,l4)108 TEST(PROCESSORS, l4) {
109 	for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
110 		ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
111 	}
112 }
113 
TEST(CORES,count)114 TEST(CORES, count) {
115 	ASSERT_EQ(8, cpuinfo_get_cores_count());
116 }
117 
TEST(CORES,non_null)118 TEST(CORES, non_null) {
119 	ASSERT_TRUE(cpuinfo_get_cores());
120 }
121 
TEST(CORES,processor_start)122 TEST(CORES, processor_start) {
123 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
124 		ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
125 	}
126 }
127 
TEST(CORES,processor_count)128 TEST(CORES, processor_count) {
129 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
130 		ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
131 	}
132 }
133 
TEST(CORES,core_id)134 TEST(CORES, core_id) {
135 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
136 		ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
137 	}
138 }
139 
TEST(CORES,cluster)140 TEST(CORES, cluster) {
141 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
142 		switch (i) {
143 			case 0:
144 			case 1:
145 			case 2:
146 			case 3:
147 				ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster);
148 				break;
149 			case 4:
150 			case 5:
151 			case 6:
152 			case 7:
153 				ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster);
154 				break;
155 		}
156 	}
157 }
158 
TEST(CORES,package)159 TEST(CORES, package) {
160 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
161 		ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
162 	}
163 }
164 
TEST(CORES,vendor)165 TEST(CORES, vendor) {
166 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
167 		ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
168 	}
169 }
170 
TEST(CORES,uarch)171 TEST(CORES, uarch) {
172 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
173 		ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch);
174 	}
175 }
176 
TEST(CORES,midr)177 TEST(CORES, midr) {
178 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
179 		ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_core(i)->midr);
180 	}
181 }
182 
TEST(CORES,DISABLED_frequency)183 TEST(CORES, DISABLED_frequency) {
184 	for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
185 		switch (i) {
186 			case 0:
187 			case 1:
188 			case 2:
189 			case 3:
190 				ASSERT_EQ(UINT64_C(1401000000), cpuinfo_get_core(i)->frequency);
191 				break;
192 			case 4:
193 			case 5:
194 			case 6:
195 			case 7:
196 				ASSERT_EQ(UINT64_C(1094400000), cpuinfo_get_core(i)->frequency);
197 				break;
198 		}
199 	}
200 }
201 
TEST(CLUSTERS,count)202 TEST(CLUSTERS, count) {
203 	ASSERT_EQ(2, cpuinfo_get_clusters_count());
204 }
205 
TEST(CLUSTERS,non_null)206 TEST(CLUSTERS, non_null) {
207 	ASSERT_TRUE(cpuinfo_get_clusters());
208 }
209 
TEST(CLUSTERS,processor_start)210 TEST(CLUSTERS, processor_start) {
211 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
212 		switch (i) {
213 			case 0:
214 				ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start);
215 				break;
216 			case 1:
217 				ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_start);
218 				break;
219 		}
220 	}
221 }
222 
TEST(CLUSTERS,processor_count)223 TEST(CLUSTERS, processor_count) {
224 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
225 		ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count);
226 	}
227 }
228 
TEST(CLUSTERS,core_start)229 TEST(CLUSTERS, core_start) {
230 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
231 		switch (i) {
232 			case 0:
233 				ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start);
234 				break;
235 			case 1:
236 				ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_start);
237 				break;
238 		}
239 	}
240 }
241 
TEST(CLUSTERS,core_count)242 TEST(CLUSTERS, core_count) {
243 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
244 		ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count);
245 	}
246 }
247 
TEST(CLUSTERS,cluster_id)248 TEST(CLUSTERS, cluster_id) {
249 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
250 		ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
251 	}
252 }
253 
TEST(CLUSTERS,package)254 TEST(CLUSTERS, package) {
255 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
256 		ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
257 	}
258 }
259 
TEST(CLUSTERS,vendor)260 TEST(CLUSTERS, vendor) {
261 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
262 		ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor);
263 	}
264 }
265 
TEST(CLUSTERS,uarch)266 TEST(CLUSTERS, uarch) {
267 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
268 		ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch);
269 	}
270 }
271 
TEST(CLUSTERS,midr)272 TEST(CLUSTERS, midr) {
273 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
274 		ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_cluster(i)->midr);
275 	}
276 }
277 
TEST(CLUSTERS,DISABLED_frequency)278 TEST(CLUSTERS, DISABLED_frequency) {
279 	for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
280 		ASSERT_EQ(UINT64_C(1516800000), cpuinfo_get_cluster(i)->frequency);
281 	}
282 }
283 
TEST(PACKAGES,count)284 TEST(PACKAGES, count) {
285 	ASSERT_EQ(1, cpuinfo_get_packages_count());
286 }
287 
TEST(PACKAGES,name)288 TEST(PACKAGES, name) {
289 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
290 		ASSERT_EQ("Qualcomm MSM8937",
291 			std::string(cpuinfo_get_package(i)->name,
292 				strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
293 	}
294 }
295 
TEST(PACKAGES,processor_start)296 TEST(PACKAGES, processor_start) {
297 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
298 		ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
299 	}
300 }
301 
TEST(PACKAGES,processor_count)302 TEST(PACKAGES, processor_count) {
303 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
304 		ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count);
305 	}
306 }
307 
TEST(PACKAGES,core_start)308 TEST(PACKAGES, core_start) {
309 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
310 		ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
311 	}
312 }
313 
TEST(PACKAGES,core_count)314 TEST(PACKAGES, core_count) {
315 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
316 		ASSERT_EQ(8, cpuinfo_get_package(i)->core_count);
317 	}
318 }
319 
TEST(PACKAGES,cluster_start)320 TEST(PACKAGES, cluster_start) {
321 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
322 		ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
323 	}
324 }
325 
TEST(PACKAGES,cluster_count)326 TEST(PACKAGES, cluster_count) {
327 	for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
328 		ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count);
329 	}
330 }
331 
TEST(ISA,thumb)332 TEST(ISA, thumb) {
333 	ASSERT_TRUE(cpuinfo_has_arm_thumb());
334 }
335 
TEST(ISA,thumb2)336 TEST(ISA, thumb2) {
337 	ASSERT_TRUE(cpuinfo_has_arm_thumb2());
338 }
339 
TEST(ISA,armv5e)340 TEST(ISA, armv5e) {
341 	ASSERT_TRUE(cpuinfo_has_arm_v5e());
342 }
343 
TEST(ISA,armv6)344 TEST(ISA, armv6) {
345 	ASSERT_TRUE(cpuinfo_has_arm_v6());
346 }
347 
TEST(ISA,armv6k)348 TEST(ISA, armv6k) {
349 	ASSERT_TRUE(cpuinfo_has_arm_v6k());
350 }
351 
TEST(ISA,armv7)352 TEST(ISA, armv7) {
353 	ASSERT_TRUE(cpuinfo_has_arm_v7());
354 }
355 
TEST(ISA,armv7mp)356 TEST(ISA, armv7mp) {
357 	ASSERT_TRUE(cpuinfo_has_arm_v7mp());
358 }
359 
TEST(ISA,idiv)360 TEST(ISA, idiv) {
361 	ASSERT_TRUE(cpuinfo_has_arm_idiv());
362 }
363 
TEST(ISA,vfpv2)364 TEST(ISA, vfpv2) {
365 	ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
366 }
367 
TEST(ISA,vfpv3)368 TEST(ISA, vfpv3) {
369 	ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
370 }
371 
TEST(ISA,vfpv3_d32)372 TEST(ISA, vfpv3_d32) {
373 	ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
374 }
375 
TEST(ISA,vfpv3_fp16)376 TEST(ISA, vfpv3_fp16) {
377 	ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
378 }
379 
TEST(ISA,vfpv3_fp16_d32)380 TEST(ISA, vfpv3_fp16_d32) {
381 	ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
382 }
383 
TEST(ISA,vfpv4)384 TEST(ISA, vfpv4) {
385 	ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
386 }
387 
TEST(ISA,vfpv4_d32)388 TEST(ISA, vfpv4_d32) {
389 	ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
390 }
391 
TEST(ISA,wmmx)392 TEST(ISA, wmmx) {
393 	ASSERT_FALSE(cpuinfo_has_arm_wmmx());
394 }
395 
TEST(ISA,wmmx2)396 TEST(ISA, wmmx2) {
397 	ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
398 }
399 
TEST(ISA,neon)400 TEST(ISA, neon) {
401 	ASSERT_TRUE(cpuinfo_has_arm_neon());
402 }
403 
TEST(ISA,neon_fp16)404 TEST(ISA, neon_fp16) {
405 	ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
406 }
407 
TEST(ISA,neon_fma)408 TEST(ISA, neon_fma) {
409 	ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
410 }
411 
TEST(ISA,atomics)412 TEST(ISA, atomics) {
413 	ASSERT_FALSE(cpuinfo_has_arm_atomics());
414 }
415 
TEST(ISA,neon_rdm)416 TEST(ISA, neon_rdm) {
417 	ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
418 }
419 
TEST(ISA,fp16_arith)420 TEST(ISA, fp16_arith) {
421 	ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
422 }
423 
TEST(ISA,neon_fp16_arith)424 TEST(ISA, neon_fp16_arith) {
425 	ASSERT_FALSE(cpuinfo_has_arm_neon_fp16_arith());
426 }
427 
TEST(ISA,neon_dot)428 TEST(ISA, neon_dot) {
429 	ASSERT_FALSE(cpuinfo_has_arm_neon_dot());
430 }
431 
TEST(ISA,jscvt)432 TEST(ISA, jscvt) {
433 	ASSERT_FALSE(cpuinfo_has_arm_jscvt());
434 }
435 
TEST(ISA,fcma)436 TEST(ISA, fcma) {
437 	ASSERT_FALSE(cpuinfo_has_arm_fcma());
438 }
439 
TEST(ISA,aes)440 TEST(ISA, aes) {
441 	ASSERT_TRUE(cpuinfo_has_arm_aes());
442 }
443 
TEST(ISA,sha1)444 TEST(ISA, sha1) {
445 	ASSERT_TRUE(cpuinfo_has_arm_sha1());
446 }
447 
TEST(ISA,sha2)448 TEST(ISA, sha2) {
449 	ASSERT_TRUE(cpuinfo_has_arm_sha2());
450 }
451 
TEST(ISA,pmull)452 TEST(ISA, pmull) {
453 	ASSERT_TRUE(cpuinfo_has_arm_pmull());
454 }
455 
TEST(ISA,crc32)456 TEST(ISA, crc32) {
457 	ASSERT_TRUE(cpuinfo_has_arm_crc32());
458 }
459 
TEST(L1I,count)460 TEST(L1I, count) {
461 	ASSERT_EQ(8, cpuinfo_get_l1i_caches_count());
462 }
463 
TEST(L1I,non_null)464 TEST(L1I, non_null) {
465 	ASSERT_TRUE(cpuinfo_get_l1i_caches());
466 }
467 
TEST(L1I,size)468 TEST(L1I, size) {
469 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
470 		ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
471 	}
472 }
473 
TEST(L1I,associativity)474 TEST(L1I, associativity) {
475 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
476 		ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity);
477 	}
478 }
479 
TEST(L1I,sets)480 TEST(L1I, sets) {
481 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
482 		ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size,
483 			cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
484 	}
485 }
486 
TEST(L1I,partitions)487 TEST(L1I, partitions) {
488 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
489 		ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
490 	}
491 }
492 
TEST(L1I,line_size)493 TEST(L1I, line_size) {
494 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
495 		ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
496 	}
497 }
498 
TEST(L1I,flags)499 TEST(L1I, flags) {
500 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
501 		ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
502 	}
503 }
504 
TEST(L1I,processors)505 TEST(L1I, processors) {
506 	for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
507 		ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
508 		ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
509 	}
510 }
511 
TEST(L1D,count)512 TEST(L1D, count) {
513 	ASSERT_EQ(8, cpuinfo_get_l1d_caches_count());
514 }
515 
TEST(L1D,non_null)516 TEST(L1D, non_null) {
517 	ASSERT_TRUE(cpuinfo_get_l1d_caches());
518 }
519 
TEST(L1D,size)520 TEST(L1D, size) {
521 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
522 		ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
523 	}
524 }
525 
TEST(L1D,associativity)526 TEST(L1D, associativity) {
527 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
528 		ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
529 	}
530 }
531 
TEST(L1D,sets)532 TEST(L1D, sets) {
533 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
534 		ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size,
535 			cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
536 	}
537 }
538 
TEST(L1D,partitions)539 TEST(L1D, partitions) {
540 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
541 		ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
542 	}
543 }
544 
TEST(L1D,line_size)545 TEST(L1D, line_size) {
546 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
547 		ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
548 	}
549 }
550 
TEST(L1D,flags)551 TEST(L1D, flags) {
552 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
553 		ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
554 	}
555 }
556 
TEST(L1D,processors)557 TEST(L1D, processors) {
558 	for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
559 		ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
560 		ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
561 	}
562 }
563 
TEST(L2,count)564 TEST(L2, count) {
565 	ASSERT_EQ(2, cpuinfo_get_l2_caches_count());
566 }
567 
TEST(L2,non_null)568 TEST(L2, non_null) {
569 	ASSERT_TRUE(cpuinfo_get_l2_caches());
570 }
571 
TEST(L2,size)572 TEST(L2, size) {
573 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
574 		switch (i) {
575 			case 0:
576 				ASSERT_EQ(1024 * 1024, cpuinfo_get_l2_cache(i)->size);
577 				break;
578 			case 1:
579 				ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size);
580 				break;
581 		}
582 	}
583 }
584 
TEST(L2,associativity)585 TEST(L2, associativity) {
586 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
587 		ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
588 	}
589 }
590 
TEST(L2,sets)591 TEST(L2, sets) {
592 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
593 		ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
594 			cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
595 	}
596 }
597 
TEST(L2,partitions)598 TEST(L2, partitions) {
599 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
600 		ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
601 	}
602 }
603 
TEST(L2,line_size)604 TEST(L2, line_size) {
605 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
606 		ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
607 	}
608 }
609 
TEST(L2,flags)610 TEST(L2, flags) {
611 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
612 		ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
613 	}
614 }
615 
TEST(L2,processors)616 TEST(L2, processors) {
617 	for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
618 		switch (i) {
619 			case 0:
620 				ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
621 				ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
622 				break;
623 			case 1:
624 				ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_start);
625 				ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
626 				break;
627 		}
628 	}
629 }
630 
TEST(L3,none)631 TEST(L3, none) {
632 	ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
633 	ASSERT_FALSE(cpuinfo_get_l3_caches());
634 }
635 
TEST(L4,none)636 TEST(L4, none) {
637 	ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
638 	ASSERT_FALSE(cpuinfo_get_l4_caches());
639 }
640 
641 #include <moto-g-gen5.h>
642 
main(int argc,char * argv[])643 int main(int argc, char* argv[]) {
644 #if CPUINFO_ARCH_ARM
645 	cpuinfo_set_hwcap(UINT32_C(0x003FB0D6));
646 	cpuinfo_set_hwcap2(UINT32_C(0x0000001F));
647 #endif
648 	cpuinfo_mock_filesystem(filesystem);
649 #ifdef __ANDROID__
650 	cpuinfo_mock_android_properties(properties);
651 #endif
652 	cpuinfo_initialize();
653 	::testing::InitGoogleTest(&argc, argv);
654 	return RUN_ALL_TESTS();
655 }
656