1 // Copyright (c) 2020 André Perez Maselco
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include "source/fuzz/fuzzer_pass_add_bit_instruction_synonyms.h"
16
17 #include "source/fuzz/fuzzer_util.h"
18 #include "source/fuzz/instruction_descriptor.h"
19 #include "source/fuzz/transformation_add_bit_instruction_synonym.h"
20
21 namespace spvtools {
22 namespace fuzz {
23
FuzzerPassAddBitInstructionSynonyms(opt::IRContext * ir_context,TransformationContext * transformation_context,FuzzerContext * fuzzer_context,protobufs::TransformationSequence * transformations)24 FuzzerPassAddBitInstructionSynonyms::FuzzerPassAddBitInstructionSynonyms(
25 opt::IRContext* ir_context, TransformationContext* transformation_context,
26 FuzzerContext* fuzzer_context,
27 protobufs::TransformationSequence* transformations)
28 : FuzzerPass(ir_context, transformation_context, fuzzer_context,
29 transformations) {}
30
31 FuzzerPassAddBitInstructionSynonyms::~FuzzerPassAddBitInstructionSynonyms() =
32 default;
33
Apply()34 void FuzzerPassAddBitInstructionSynonyms::Apply() {
35 for (auto& function : *GetIRContext()->module()) {
36 for (auto& block : function) {
37 for (auto& instruction : block) {
38 // This fuzzer pass can add a *lot* of ids. We bail out early if we hit
39 // the recommended id limit.
40 if (GetIRContext()->module()->id_bound() >=
41 GetFuzzerContext()->GetIdBoundLimit()) {
42 return;
43 }
44
45 // Randomly decides whether the transformation will be applied.
46 if (!GetFuzzerContext()->ChoosePercentage(
47 GetFuzzerContext()->GetChanceOfAddingBitInstructionSynonym())) {
48 continue;
49 }
50
51 // TODO(https://github.com/KhronosGroup/SPIRV-Tools/issues/3557):
52 // Right now we only support certain operations. When this issue is
53 // addressed the following conditional can use the function
54 // |spvOpcodeIsBit|.
55 if (instruction.opcode() != SpvOpBitwiseOr &&
56 instruction.opcode() != SpvOpBitwiseXor &&
57 instruction.opcode() != SpvOpBitwiseAnd &&
58 instruction.opcode() != SpvOpNot) {
59 continue;
60 }
61
62 // Right now, only integer operands are supported.
63 if (GetIRContext()
64 ->get_type_mgr()
65 ->GetType(instruction.type_id())
66 ->AsVector()) {
67 continue;
68 }
69
70 // Make sure all bit indexes are defined as 32-bit unsigned integers.
71 uint32_t width = GetIRContext()
72 ->get_type_mgr()
73 ->GetType(instruction.type_id())
74 ->AsInteger()
75 ->width();
76 for (uint32_t i = 0; i < width; i++) {
77 FindOrCreateIntegerConstant({i}, 32, false, false);
78 }
79
80 // Applies the add bit instruction synonym transformation.
81 ApplyTransformation(TransformationAddBitInstructionSynonym(
82 instruction.result_id(),
83 GetFuzzerContext()->GetFreshIds(
84 TransformationAddBitInstructionSynonym::GetRequiredFreshIdCount(
85 GetIRContext(), &instruction))));
86 }
87 }
88 }
89 }
90
91 } // namespace fuzz
92 } // namespace spvtools
93