1 /* 2 * Copyright © 2009 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #ifndef INTEL_GPU_TOOLS_H 29 #define INTEL_GPU_TOOLS_H 30 31 #include <stdint.h> 32 #include <pciaccess.h> 33 34 /* register access helpers from intel_mmio.c */ 35 extern void *igt_global_mmio; 36 void intel_mmio_use_pci_bar(struct pci_device *pci_dev); 37 void intel_mmio_use_dump_file(char *file); 38 39 int intel_register_access_init(struct pci_device *pci_dev, int safe, int fd); 40 void intel_register_access_fini(void); 41 uint32_t intel_register_read(uint32_t reg); 42 void intel_register_write(uint32_t reg, uint32_t val); 43 int intel_register_access_needs_fakewake(void); 44 45 uint32_t INREG(uint32_t reg); 46 uint16_t INREG16(uint32_t reg); 47 uint8_t INREG8(uint32_t reg); 48 void OUTREG(uint32_t reg, uint32_t val); 49 void OUTREG16(uint32_t reg, uint16_t val); 50 void OUTREG8(uint32_t reg, uint8_t val); 51 52 /* sideband access functions from intel_iosf.c */ 53 uint32_t intel_dpio_reg_read(uint32_t reg, int phy); 54 void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy); 55 uint32_t intel_flisdsi_reg_read(uint32_t reg); 56 void intel_flisdsi_reg_write(uint32_t reg, uint32_t val); 57 uint32_t intel_iosf_sb_read(uint32_t port, uint32_t reg); 58 void intel_iosf_sb_write(uint32_t port, uint32_t reg, uint32_t val); 59 60 int intel_punit_read(uint32_t addr, uint32_t *val); 61 int intel_punit_write(uint32_t addr, uint32_t val); 62 int intel_nc_read(uint32_t addr, uint32_t *val); 63 int intel_nc_write(uint32_t addr, uint32_t val); 64 65 /* register maps from intel_reg_map.c */ 66 #ifndef __GTK_DOC_IGNORE__ 67 68 #define INTEL_RANGE_RSVD (0<<0) /* Shouldn't be read or written */ 69 #define INTEL_RANGE_READ (1<<0) 70 #define INTEL_RANGE_WRITE (1<<1) 71 #define INTEL_RANGE_RW (INTEL_RANGE_READ | INTEL_RANGE_WRITE) 72 #define INTEL_RANGE_END (1<<31) 73 74 struct intel_register_range { 75 uint32_t base; 76 uint32_t size; 77 uint32_t flags; 78 }; 79 80 struct intel_register_map { 81 struct intel_register_range *map; 82 uint32_t top; 83 uint32_t alignment_mask; 84 }; 85 struct intel_register_map intel_get_register_map(uint32_t devid); 86 struct intel_register_range *intel_get_register_range(struct intel_register_map map, uint32_t offset, uint32_t mode); 87 #endif /* __GTK_DOC_IGNORE__ */ 88 89 #endif /* INTEL_GPU_TOOLS_H */ 90