1 /*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25 /** @file gem_exec_parallel.c
26 *
27 * Exercise using many, many writers into a buffer.
28 */
29
30 #include <pthread.h>
31
32 #include "igt.h"
33 #include "igt_gt.h"
34
35 #define LOCAL_I915_EXEC_NO_RELOC (1<<11)
36 #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
37
38 #define LOCAL_I915_EXEC_BSD_SHIFT (13)
39 #define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
40
41 #define ENGINE_MASK (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
42
43 #define VERIFY 0
44
check_bo(int fd,uint32_t handle,int pass)45 static void check_bo(int fd, uint32_t handle, int pass)
46 {
47 uint32_t *map;
48 int i;
49
50 igt_debug("Verifying result (pass=%d, handle=%d)\n", pass, handle);
51 map = gem_mmap__cpu(fd, handle, 0, 4096, PROT_READ);
52 gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, 0);
53 for (i = 0; i < 1024; i++)
54 igt_assert_eq(map[i], i);
55 munmap(map, 4096);
56 }
57
58 #define CONTEXTS 0x1
59 #define FDS 0x2
60
61 struct thread {
62 pthread_t thread;
63 pthread_mutex_t *mutex;
64 pthread_cond_t *cond;
65 unsigned flags;
66 uint32_t *scratch;
67 unsigned id;
68 unsigned engine;
69 int fd, gen, *go;
70 };
71
thread(void * data)72 static void *thread(void *data)
73 {
74 struct thread *t = data;
75 struct drm_i915_gem_exec_object2 obj[2];
76 struct drm_i915_gem_relocation_entry reloc;
77 struct drm_i915_gem_execbuffer2 execbuf;
78 uint32_t batch[16];
79 int fd, i;
80
81 pthread_mutex_lock(t->mutex);
82 while (*t->go == 0)
83 pthread_cond_wait(t->cond, t->mutex);
84 pthread_mutex_unlock(t->mutex);
85
86 if (t->flags & FDS)
87 fd = drm_open_driver(DRIVER_INTEL);
88 else
89 fd = t->fd;
90
91 i = 0;
92 batch[i] = MI_STORE_DWORD_IMM | (t->gen < 6 ? 1 << 22 : 0);
93 if (t->gen >= 8) {
94 batch[++i] = 4*t->id;
95 batch[++i] = 0;
96 } else if (t->gen >= 4) {
97 batch[++i] = 0;
98 batch[++i] = 4*t->id;
99 } else {
100 batch[i]--;
101 batch[++i] = 4*t->id;
102 }
103 batch[++i] = t->id;
104 batch[++i] = MI_BATCH_BUFFER_END;
105
106 memset(obj, 0, sizeof(obj));
107 obj[0].flags = EXEC_OBJECT_WRITE;
108
109 memset(&reloc, 0, sizeof(reloc));
110 reloc.offset = sizeof(uint32_t);
111 if (t->gen < 8 && t->gen >= 4)
112 reloc.offset += sizeof(uint32_t);
113 reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
114 reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
115 reloc.delta = 4*t->id;
116 obj[1].handle = gem_create(fd, 4096);
117 obj[1].relocs_ptr = to_user_pointer(&reloc);
118 obj[1].relocation_count = 1;
119 gem_write(fd, obj[1].handle, 0, batch, sizeof(batch));
120
121 memset(&execbuf, 0, sizeof(execbuf));
122 execbuf.buffers_ptr = to_user_pointer(obj);
123 execbuf.buffer_count = 2;
124 execbuf.flags = t->engine;
125 execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
126 execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
127 if (t->gen < 6)
128 execbuf.flags |= I915_EXEC_SECURE;
129 if (t->flags & CONTEXTS)
130 execbuf.rsvd1 = gem_context_create(fd);
131
132 for (i = 0; i < 16; i++) {
133 obj[0].handle = t->scratch[i];
134 if (t->flags & FDS)
135 obj[0].handle = gem_open(fd, obj[0].handle);
136
137 gem_execbuf(fd, &execbuf);
138
139 if (t->flags & FDS)
140 gem_close(fd, obj[0].handle);
141 }
142
143 if (t->flags & CONTEXTS)
144 gem_context_destroy(fd, execbuf.rsvd1);
145 gem_close(fd, obj[1].handle);
146 if (t->flags & FDS)
147 close(fd);
148
149 return NULL;
150 }
151
all(int fd,struct intel_execution_engine2 * engine,unsigned flags)152 static void all(int fd, struct intel_execution_engine2 *engine, unsigned flags)
153 {
154 const int gen = intel_gen(intel_get_drm_devid(fd));
155 pthread_mutex_t mutex;
156 pthread_cond_t cond;
157 struct thread *threads;
158 unsigned engines[16];
159 unsigned nengine;
160 uint32_t scratch[16], handle[16];
161 int go;
162 int i;
163
164 if (flags & CONTEXTS)
165 gem_require_contexts(fd);
166
167 if (flags & FDS) {
168 igt_require(gen > 5);
169 igt_require(igt_allow_unlimited_files());
170 }
171
172 nengine = 0;
173 if (!engine) {
174 struct intel_execution_engine2 *e;
175 __for_each_physical_engine(fd, e) {
176 if (gem_class_can_store_dword(fd, e->class))
177 engines[nengine++] = e->flags;
178 }
179 } else {
180 igt_require(gem_class_can_store_dword(fd, engine->class));
181 engines[nengine++] = engine->flags;
182 }
183 igt_require(nengine);
184
185 for (i = 0; i < 16; i++) {
186 scratch[i] = handle[i] = gem_create(fd, 4096);
187 if (flags & FDS)
188 scratch[i] = gem_flink(fd, handle[i]);
189 }
190
191 threads = calloc(1024, sizeof(struct thread));
192 igt_assert(threads);
193
194 intel_detect_and_clear_missed_interrupts(fd);
195 pthread_mutex_init(&mutex, 0);
196 pthread_cond_init(&cond, 0);
197 go = 0;
198
199 for (i = 0; i < 1024; i++) {
200 threads[i].id = i;
201 threads[i].fd = fd;
202 threads[i].gen = gen;
203 threads[i].engine = engines[i % nengine];
204 threads[i].flags = flags;
205 threads[i].scratch = scratch;
206 threads[i].mutex = &mutex;
207 threads[i].cond = &cond;
208 threads[i].go = &go;
209
210 pthread_create(&threads[i].thread, 0, thread, &threads[i]);
211 }
212
213 pthread_mutex_lock(&mutex);
214 go = 1024;
215 pthread_cond_broadcast(&cond);
216 pthread_mutex_unlock(&mutex);
217
218 for (i = 0; i < 1024; i++)
219 pthread_join(threads[i].thread, NULL);
220
221 for (i = 0; i < 16; i++) {
222 check_bo(fd, handle[i], i);
223 gem_close(fd, handle[i]);
224 }
225
226 igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
227 free(threads);
228 }
229
230 igt_main
231 {
232 struct intel_execution_engine2 *e;
233
234 const struct mode {
235 const char *name;
236 unsigned flags;
237 } modes[] = {
238 { "", 0 },
239 { "contexts", CONTEXTS },
240 { "fds", FDS },
241 { NULL }
242 };
243 int fd;
244
245 igt_fixture {
246 fd = drm_open_driver_master(DRIVER_INTEL);
247 igt_require_gem(fd);
248
249 igt_fork_hang_detector(fd);
250 }
251
252 for (const struct mode *m = modes; m->name; m++)
253 igt_subtest_f("%s", *m->name ? m->name : "basic")
254 /* NULL value means all engines */
255 all(fd, NULL, m->flags);
256
__for_each_physical_engine(fd,e)257 __for_each_physical_engine(fd, e) {
258 for (const struct mode *m = modes; m->name; m++)
259 igt_subtest_f("%s%s%s",
260 e->name,
261 *m->name ? "-" : "",
262 m->name)
263 all(fd, e, m->flags);
264 }
265
266 igt_fixture {
267 igt_stop_hang_detector();
268 close(fd);
269 }
270 }
271