1 /*
2 * Copyright © 2018 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23 #include "igt.h"
24 #include <stdbool.h>
25 #include <unistd.h>
26 #include <stdlib.h>
27 #include <sys/ioctl.h>
28 #include <stdio.h>
29 #include <string.h>
30 #include <fcntl.h>
31 #include <inttypes.h>
32 #include <errno.h>
33 #include <sys/stat.h>
34 #include <sys/time.h>
35 #include "drm.h"
36 #include "intel_bufmgr.h"
37
38 IGT_TEST_DESCRIPTION("A very simple workload for the VME media block.");
39
40 #define WIDTH 64
41 #define STRIDE (WIDTH)
42 #define HEIGHT 64
43
44 #define INPUT_SIZE (WIDTH * HEIGHT * sizeof(char) * 1.5)
45 #define OUTPUT_SIZE (56*sizeof(int))
46
47 static void
scratch_buf_init(drm_intel_bufmgr * bufmgr,struct igt_buf * buf,unsigned int size)48 scratch_buf_init(drm_intel_bufmgr *bufmgr,
49 struct igt_buf *buf,
50 unsigned int size)
51 {
52 drm_intel_bo *bo;
53
54 bo = drm_intel_bo_alloc(bufmgr, "", size, 4096);
55 igt_assert(bo);
56
57 memset(buf, 0, sizeof(*buf));
58
59 buf->bo = bo;
60 buf->tiling = I915_TILING_NONE;
61 buf->size = size;
62 }
63
scratch_buf_init_src(drm_intel_bufmgr * bufmgr,struct igt_buf * buf)64 static void scratch_buf_init_src(drm_intel_bufmgr *bufmgr, struct igt_buf *buf)
65 {
66 scratch_buf_init(bufmgr, buf, INPUT_SIZE);
67
68 /*
69 * Ideally we would read src surface from file "SourceFrameI.yu12".
70 * But even without it, we can still triger the rcs0 resetting
71 * with this vme kernel.
72 */
73
74 buf->stride = STRIDE;
75 }
76
scratch_buf_init_dst(drm_intel_bufmgr * bufmgr,struct igt_buf * buf)77 static void scratch_buf_init_dst(drm_intel_bufmgr *bufmgr, struct igt_buf *buf)
78 {
79 scratch_buf_init(bufmgr, buf, OUTPUT_SIZE);
80
81 buf->stride = 1;
82 }
83
switch_off_n_bits(uint64_t mask,unsigned int n)84 static uint64_t switch_off_n_bits(uint64_t mask, unsigned int n)
85 {
86 unsigned int i;
87
88 igt_assert(n > 0 && n <= (sizeof(mask) * 8));
89 igt_assert(n <= __builtin_popcount(mask));
90
91 for (i = 0; n && i < (sizeof(mask) * 8); i++) {
92 uint64_t bit = 1ULL << i;
93
94 if (bit & mask) {
95 mask &= ~bit;
96 n--;
97 }
98 }
99
100 return mask;
101 }
102
shut_non_vme_subslices(int drm_fd,uint32_t ctx)103 static void shut_non_vme_subslices(int drm_fd, uint32_t ctx)
104 {
105 struct drm_i915_gem_context_param_sseu sseu = { };
106 struct drm_i915_gem_context_param arg = {
107 .param = I915_CONTEXT_PARAM_SSEU,
108 .ctx_id = ctx,
109 .size = sizeof(sseu),
110 .value = to_user_pointer(&sseu),
111 };
112 int ret;
113
114 if (__gem_context_get_param(drm_fd, &arg))
115 return; /* no sseu support */
116
117 ret = __gem_context_set_param(drm_fd, &arg);
118 igt_assert(ret == 0 || ret == -ENODEV || ret == -EINVAL);
119 if (ret)
120 return; /* no sseu support */
121
122 /* shutdown half subslices */
123 sseu.subslice_mask =
124 switch_off_n_bits(sseu.subslice_mask,
125 __builtin_popcount(sseu.subslice_mask) / 2);
126
127 gem_context_set_param(drm_fd, &arg);
128 }
129
130 igt_simple_main
131 {
132 int drm_fd;
133 uint32_t devid;
134 drm_intel_bufmgr *bufmgr;
135 igt_vme_func_t media_vme;
136 struct intel_batchbuffer *batch;
137 struct igt_buf src, dst;
138
139 drm_fd = drm_open_driver(DRIVER_INTEL);
140 igt_require_gem(drm_fd);
141
142 devid = intel_get_drm_devid(drm_fd);
143
144 media_vme = igt_get_media_vme_func(devid);
145 igt_require_f(media_vme, "no media-vme function\n");
146
147 bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096);
148 igt_assert(bufmgr);
149
150 batch = intel_batchbuffer_alloc(bufmgr, devid);
151 igt_assert(batch);
152
153 scratch_buf_init_src(bufmgr, &src);
154 scratch_buf_init_dst(bufmgr, &dst);
155
156 batch->ctx = drm_intel_gem_context_create(bufmgr);
157 igt_assert(batch->ctx);
158
159 /* ICL hangs if non-VME enabled slices are enabled with a VME kernel. */
160 if (intel_gen(devid) == 11) {
161 uint32_t ctx_id;
162 int ret;
163
164 ret = drm_intel_gem_context_get_id(batch->ctx, &ctx_id);
165 igt_assert_eq(ret, 0);
166
167 shut_non_vme_subslices(drm_fd, ctx_id);
168 }
169
170 igt_fork_hang_detector(drm_fd);
171
172 media_vme(batch, &src, WIDTH, HEIGHT, &dst);
173
174 gem_sync(drm_fd, dst.bo->handle);
175
176 igt_stop_hang_detector();
177 }
178