1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25 #include "igt.h"
26 #include <unistd.h>
27 #include <stdlib.h>
28 #include <stdint.h>
29 #include <stdio.h>
30 #include <string.h>
31 #include <fcntl.h>
32 #include <inttypes.h>
33 #include <errno.h>
34 #include <sys/stat.h>
35 #include <sys/ioctl.h>
36 #include <sys/time.h>
37 #include "drm.h"
38
39 IGT_TEST_DESCRIPTION(
40 "pwrite to a snooped bo then make it uncached and check that the GPU sees the data.");
41
42 static int fd;
43 static uint32_t devid;
44 static drm_intel_bufmgr *bufmgr;
45
blit(drm_intel_bo * dst,drm_intel_bo * src,unsigned int width,unsigned int height,unsigned int dst_pitch,unsigned int src_pitch)46 static void blit(drm_intel_bo *dst, drm_intel_bo *src,
47 unsigned int width, unsigned int height,
48 unsigned int dst_pitch, unsigned int src_pitch)
49 {
50 struct intel_batchbuffer *batch;
51
52 batch = intel_batchbuffer_alloc(bufmgr, devid);
53 igt_assert(batch);
54
55 BLIT_COPY_BATCH_START(0);
56 OUT_BATCH((3 << 24) | /* 32 bits */
57 (0xcc << 16) | /* copy ROP */
58 dst_pitch);
59 OUT_BATCH(0 << 16 | 0);
60 OUT_BATCH(height << 16 | width);
61 OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
62 OUT_BATCH(0 << 16 | 0);
63 OUT_BATCH(src_pitch);
64 OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
65 ADVANCE_BATCH();
66
67 if (batch->gen >= 6) {
68 BEGIN_BATCH(3, 0);
69 OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
70 OUT_BATCH(0);
71 OUT_BATCH(0);
72 ADVANCE_BATCH();
73 }
74
75 intel_batchbuffer_flush(batch);
76 intel_batchbuffer_free(batch);
77 }
78
memchr_inv(const void * s,int c,size_t n)79 static void *memchr_inv(const void *s, int c, size_t n)
80 {
81 const uint8_t *us = s;
82 const uint8_t uc = c;
83
84 #pragma GCC diagnostic push
85 #pragma GCC diagnostic ignored "-Wcast-qual"
86 while (n--) {
87 if (*us != uc)
88 return (void *) us;
89 us++;
90 }
91 #pragma GCC diagnostic pop
92
93 return NULL;
94 }
95
test(int w,int h)96 static void test(int w, int h)
97 {
98 int object_size = w * h * 4;
99 drm_intel_bo *src, *dst;
100 void *buf;
101
102 src = drm_intel_bo_alloc(bufmgr, "src", object_size, 4096);
103 igt_assert(src);
104 dst = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096);
105 igt_assert(dst);
106
107 buf = malloc(object_size);
108 igt_assert(buf);
109 memset(buf, 0xff, object_size);
110
111 gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_GTT,
112 I915_GEM_DOMAIN_GTT);
113
114 gem_set_caching(fd, src->handle, I915_CACHING_CACHED);
115
116 gem_write(fd, src->handle, 0, buf, object_size);
117
118 gem_set_caching(fd, src->handle, I915_CACHING_NONE);
119
120 blit(dst, src, w, h, w * 4, h * 4);
121
122 memset(buf, 0x00, object_size);
123 gem_read(fd, dst->handle, 0, buf, object_size);
124
125 igt_assert(memchr_inv(buf, 0xff, object_size) == NULL);
126 }
127
128 igt_simple_main
129 {
130 igt_skip_on_simulation();
131
132 fd = drm_open_driver(DRIVER_INTEL);
133 igt_require_gem(fd);
134
135 devid = intel_get_drm_devid(fd);
136 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
137
138 test(256, 256);
139
140 drm_intel_bufmgr_destroy(bufmgr);
141 close(fd);
142 }
143