1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
4
5 #include <arm_mve.h>
6
7 // CHECK-LABEL: @test_vminaq_s8(
8 // CHECK-NEXT: entry:
9 // CHECK-NEXT: [[TMP0:%.*]] = icmp slt <16 x i8> [[B:%.*]], zeroinitializer
10 // CHECK-NEXT: [[TMP1:%.*]] = sub <16 x i8> zeroinitializer, [[B]]
11 // CHECK-NEXT: [[TMP2:%.*]] = select <16 x i1> [[TMP0]], <16 x i8> [[TMP1]], <16 x i8> [[B]]
12 // CHECK-NEXT: [[TMP3:%.*]] = icmp ule <16 x i8> [[A:%.*]], [[TMP2]]
13 // CHECK-NEXT: [[TMP4:%.*]] = select <16 x i1> [[TMP3]], <16 x i8> [[A]], <16 x i8> [[TMP2]]
14 // CHECK-NEXT: ret <16 x i8> [[TMP4]]
15 //
test_vminaq_s8(uint8x16_t a,int8x16_t b)16 uint8x16_t test_vminaq_s8(uint8x16_t a, int8x16_t b)
17 {
18 #ifdef POLYMORPHIC
19 return vminaq(a, b);
20 #else /* POLYMORPHIC */
21 return vminaq_s8(a, b);
22 #endif /* POLYMORPHIC */
23 }
24
25 // CHECK-LABEL: @test_vminaq_s16(
26 // CHECK-NEXT: entry:
27 // CHECK-NEXT: [[TMP0:%.*]] = icmp slt <8 x i16> [[B:%.*]], zeroinitializer
28 // CHECK-NEXT: [[TMP1:%.*]] = sub <8 x i16> zeroinitializer, [[B]]
29 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP0]], <8 x i16> [[TMP1]], <8 x i16> [[B]]
30 // CHECK-NEXT: [[TMP3:%.*]] = icmp ule <8 x i16> [[A:%.*]], [[TMP2]]
31 // CHECK-NEXT: [[TMP4:%.*]] = select <8 x i1> [[TMP3]], <8 x i16> [[A]], <8 x i16> [[TMP2]]
32 // CHECK-NEXT: ret <8 x i16> [[TMP4]]
33 //
test_vminaq_s16(uint16x8_t a,int16x8_t b)34 uint16x8_t test_vminaq_s16(uint16x8_t a, int16x8_t b)
35 {
36 #ifdef POLYMORPHIC
37 return vminaq(a, b);
38 #else /* POLYMORPHIC */
39 return vminaq_s16(a, b);
40 #endif /* POLYMORPHIC */
41 }
42
43 // CHECK-LABEL: @test_vminaq_s32(
44 // CHECK-NEXT: entry:
45 // CHECK-NEXT: [[TMP0:%.*]] = icmp slt <4 x i32> [[B:%.*]], zeroinitializer
46 // CHECK-NEXT: [[TMP1:%.*]] = sub <4 x i32> zeroinitializer, [[B]]
47 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP0]], <4 x i32> [[TMP1]], <4 x i32> [[B]]
48 // CHECK-NEXT: [[TMP3:%.*]] = icmp ule <4 x i32> [[A:%.*]], [[TMP2]]
49 // CHECK-NEXT: [[TMP4:%.*]] = select <4 x i1> [[TMP3]], <4 x i32> [[A]], <4 x i32> [[TMP2]]
50 // CHECK-NEXT: ret <4 x i32> [[TMP4]]
51 //
test_vminaq_s32(uint32x4_t a,int32x4_t b)52 uint32x4_t test_vminaq_s32(uint32x4_t a, int32x4_t b)
53 {
54 #ifdef POLYMORPHIC
55 return vminaq(a, b);
56 #else /* POLYMORPHIC */
57 return vminaq_s32(a, b);
58 #endif /* POLYMORPHIC */
59 }
60
61 // CHECK-LABEL: @test_vminaq_m_s8(
62 // CHECK-NEXT: entry:
63 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
64 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
65 // CHECK-NEXT: [[TMP2:%.*]] = call <16 x i8> @llvm.arm.mve.vmina.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i1> [[TMP1]])
66 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
67 //
test_vminaq_m_s8(uint8x16_t a,int8x16_t b,mve_pred16_t p)68 uint8x16_t test_vminaq_m_s8(uint8x16_t a, int8x16_t b, mve_pred16_t p)
69 {
70 #ifdef POLYMORPHIC
71 return vminaq_m(a, b, p);
72 #else /* POLYMORPHIC */
73 return vminaq_m_s8(a, b, p);
74 #endif /* POLYMORPHIC */
75 }
76
77 // CHECK-LABEL: @test_vminaq_m_s16(
78 // CHECK-NEXT: entry:
79 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
80 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
81 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.vmina.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[TMP1]])
82 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
83 //
test_vminaq_m_s16(uint16x8_t a,int16x8_t b,mve_pred16_t p)84 uint16x8_t test_vminaq_m_s16(uint16x8_t a, int16x8_t b, mve_pred16_t p)
85 {
86 #ifdef POLYMORPHIC
87 return vminaq_m(a, b, p);
88 #else /* POLYMORPHIC */
89 return vminaq_m_s16(a, b, p);
90 #endif /* POLYMORPHIC */
91 }
92
93 // CHECK-LABEL: @test_vminaq_m_s32(
94 // CHECK-NEXT: entry:
95 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
96 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
97 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.arm.mve.vmina.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i1> [[TMP1]])
98 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
99 //
test_vminaq_m_s32(uint32x4_t a,int32x4_t b,mve_pred16_t p)100 uint32x4_t test_vminaq_m_s32(uint32x4_t a, int32x4_t b, mve_pred16_t p)
101 {
102 #ifdef POLYMORPHIC
103 return vminaq_m(a, b, p);
104 #else /* POLYMORPHIC */
105 return vminaq_m_s32(a, b, p);
106 #endif /* POLYMORPHIC */
107 }
108