1 // REQUIRES: x86-registered-target
2 // REQUIRES: nvptx-registered-target
3
4 // RUN: %clang_cc1 -std=c++11 -fcuda-is-device -triple nvptx64-nvidia-cuda -emit-llvm -o - %s | FileCheck --check-prefix=DEVICE %s
5 // RUN: echo "GPU binary would be here" > %t
6 // RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-linux-gnu -target-sdk-version=8.0 -fcuda-include-gpubinary %t -emit-llvm -o - %s | FileCheck --check-prefix=HOST %s
7
8 struct surfaceReference {
9 int desc;
10 };
11
12 template <typename T, int dim = 1>
13 struct __attribute__((device_builtin_surface_type)) surface : public surfaceReference {
14 };
15
16 // Partial specialization over `void`.
17 template<int dim>
18 struct __attribute__((device_builtin_surface_type)) surface<void, dim> : public surfaceReference {
19 };
20
21 // On the device side, surface references are represented as `i64` handles.
22 // DEVICE: @surf = addrspace(1) global i64 undef, align 4
23 // On the host side, they remain in the original type.
24 // HOST: @surf = internal global %struct.surface
25 // HOST: @0 = private unnamed_addr constant [5 x i8] c"surf\00"
26 surface<void, 2> surf;
27
28 __attribute__((device)) int suld_2d_zero(surface<void, 2>, int, int) asm("llvm.nvvm.suld.2d.i32.zero");
29
30 // DEVICE-LABEL: i32 @_Z3fooii(i32 %x, i32 %y)
31 // DEVICE: call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @surf)
32 // DEVICE: call i32 @llvm.nvvm.suld.2d.i32.zero(i64 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
foo(int x,int y)33 __attribute__((device)) int foo(int x, int y) {
34 return suld_2d_zero(surf, x, y);
35 }
36
37 // HOST: define internal void @[[PREFIX:__cuda]]_register_globals
38 // Texture references need registering with correct arguments.
39 // HOST: call void @[[PREFIX]]RegisterSurface(i8** %0, i8*{{.*}}({{.*}}@surf{{.*}}), i8*{{.*}}({{.*}}@0{{.*}}), i8*{{.*}}({{.*}}@0{{.*}}), i32 2, i32 0)
40
41 // They also need annotating in metadata.
42 // DEVICE: !0 = !{i64 addrspace(1)* @surf, !"surface", i32 1}
43