1 // Test target codegen - host bc file has to be created first.
2 // RUN: %clang_cc1 -verify -fopenmp -x c -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
3 // RUN: %clang_cc1 -verify -fopenmp -x c -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
4 // RUN: %clang_cc1 -verify -fopenmp -x c -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
5 // RUN: %clang_cc1 -verify -fopenmp -x c -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
6 // expected-no-diagnostics
7 extern int printf(const char *, ...);
8
9 // CHECK-DAG: private unnamed_addr constant %struct.ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds
10
11 // Check a simple call to printf end-to-end.
12 // CHECK-DAG: [[SIMPLE_PRINTF_TY:%[a-zA-Z0-9_]+]] = type { i32, i64, double }
13 // CHECK-NOT: private unnamed_addr constant %struct.ident_t { i32 0, i32 2, {{1|2|3}}
CheckSimple()14 int CheckSimple() {
15 // CHECK: define {{.*}}void [[T1:@__omp_offloading_.+CheckSimple.+]]_worker()
16 #pragma omp target
17 {
18 // Entry point.
19 // CHECK: define {{.*}}void [[T1]]()
20 // Alloca in entry block.
21 // CHECK: [[BUF:%[a-zA-Z0-9_]+]] = alloca [[SIMPLE_PRINTF_TY]]
22
23 // CHECK: {{call|invoke}} void [[T1]]_worker()
24 // CHECK: br label {{%?}}[[EXIT:.+]]
25 //
26 // CHECK-DAG: [[CMTID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
27 // CHECK-DAG: [[CMNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
28 // CHECK-DAG: [[CMWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
29 // CHECK: [[IS_MASTER:%.+]] = icmp eq i32 [[CMTID]],
30 // CHECK: br i1 [[IS_MASTER]], label {{%?}}[[MASTER:.+]], label {{%?}}[[EXIT]]
31 //
32 // CHECK: [[MASTER]]
33 // CHECK-DAG: [[MNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
34 // CHECK-DAG: [[MWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
35 // CHECK: [[MTMP1:%.+]] = sub nuw i32 [[MNTH]], [[MWS]]
36 // CHECK: call void @__kmpc_kernel_init(i32 [[MTMP1]]
37
38 // printf in master-only basic block.
39 // CHECK: [[FMT:%[0-9]+]] = load{{.*}}%fmt
40 const char* fmt = "%d %lld %f";
41 // CHECK: [[PTR0:%[0-9]+]] = getelementptr inbounds [[SIMPLE_PRINTF_TY]], [[SIMPLE_PRINTF_TY]]* [[BUF]], i32 0, i32 0
42 // CHECK: store i32 1, i32* [[PTR0]], align 4
43 // CHECK: [[PTR1:%[0-9]+]] = getelementptr inbounds [[SIMPLE_PRINTF_TY]], [[SIMPLE_PRINTF_TY]]* [[BUF]], i32 0, i32 1
44 // CHECK: store i64 2, i64* [[PTR1]], align 8
45 // CHECK: [[PTR2:%[0-9]+]] = getelementptr inbounds [[SIMPLE_PRINTF_TY]], [[SIMPLE_PRINTF_TY]]* [[BUF]], i32 0, i32 2
46
47 // CHECK: store double 3.0{{[^,]*}}, double* [[PTR2]], align 8
48 // CHECK: [[BUF_CAST:%[0-9]+]] = bitcast [[SIMPLE_PRINTF_TY]]* [[BUF]] to i8*
49 // CHECK: [[RET:%[0-9]+]] = call i32 @vprintf(i8* [[FMT]], i8* [[BUF_CAST]])
50 printf(fmt, 1, 2ll, 3.0);
51 }
52
53 return 0;
54 }
55
CheckNoArgs()56 void CheckNoArgs() {
57 // CHECK: define {{.*}}void [[T2:@__omp_offloading_.+CheckNoArgs.+]]_worker()
58 #pragma omp target
59 {
60 // Entry point.
61 // CHECK: define {{.*}}void [[T2]]()
62
63 // CHECK: {{call|invoke}} void [[T2]]_worker()
64 // CHECK: br label {{%?}}[[EXIT:.+]]
65 //
66 // CHECK-DAG: [[CMTID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
67 // CHECK-DAG: [[CMNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
68 // CHECK-DAG: [[CMWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
69 // CHECK: [[IS_MASTER:%.+]] = icmp eq i32 [[CMTID]],
70 // CHECK: br i1 [[IS_MASTER]], label {{%?}}[[MASTER:.+]], label {{%?}}[[EXIT]]
71 //
72 // CHECK: [[MASTER]]
73 // CHECK-DAG: [[MNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
74 // CHECK-DAG: [[MWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
75 // CHECK: [[MTMP1:%.+]] = sub nuw i32 [[MNTH]], [[MWS]]
76 // CHECK: call void @__kmpc_kernel_init(i32 [[MTMP1]]
77
78 // printf in master-only basic block.
79 // CHECK: call i32 @vprintf({{.*}}, i8* null){{$}}
80 printf("hello, world!");
81 }
82 }
83
84 // Check that printf's alloca happens in the entry block, not inside the if
85 // statement.
86 int foo;
CheckAllocaIsInEntryBlock()87 void CheckAllocaIsInEntryBlock() {
88 // CHECK: define {{.*}}void [[T3:@__omp_offloading_.+CheckAllocaIsInEntryBlock.+]]_worker()
89 #pragma omp target
90 {
91 // Entry point.
92 // CHECK: define {{.*}}void [[T3]](
93 // Alloca in entry block.
94 // CHECK: alloca %printf_args
95
96 // CHECK: {{call|invoke}} void [[T3]]_worker()
97 // CHECK: br label {{%?}}[[EXIT:.+]]
98 //
99 // CHECK-DAG: [[CMTID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
100 // CHECK-DAG: [[CMNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
101 // CHECK-DAG: [[CMWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
102 // CHECK: [[IS_MASTER:%.+]] = icmp eq i32 [[CMTID]],
103 // CHECK: br i1 [[IS_MASTER]], label {{%?}}[[MASTER:.+]], label {{%?}}[[EXIT]]
104 //
105 // CHECK: [[MASTER]]
106 // CHECK-DAG: [[MNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
107 // CHECK-DAG: [[MWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
108 // CHECK: [[MTMP1:%.+]] = sub nuw i32 [[MNTH]], [[MWS]]
109 // CHECK: call void @__kmpc_kernel_init(i32 [[MTMP1]]
110
111 if (foo) {
112 printf("%d", 42);
113 }
114 }
115 }
116