1//===----------------------Hexagon builtin routine ------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9	.macro FUNCTION_BEGIN name
10	.text
11        .p2align 5
12	.globl \name
13	.type  \name, @function
14\name:
15	.endm
16
17	.macro FUNCTION_END name
18	.size  \name, . - \name
19	.endm
20
21
22FUNCTION_BEGIN __hexagon_divdi3
23	{
24		p2 = tstbit(r1,#31)
25		p3 = tstbit(r3,#31)
26	}
27	{
28		r1:0 = abs(r1:0)
29		r3:2 = abs(r3:2)
30	}
31	{
32		r6 = cl0(r1:0)              // count leading 0's of dividend (numerator)
33		r7 = cl0(r3:2)              // count leading 0's of divisor (denominator)
34		r5:4 = r3:2                 // divisor moved into working registers
35		r3:2 = r1:0                 // dividend is the initial remainder, r3:2 contains remainder
36	}
37	{
38		p3 = xor(p2,p3)
39		r10 = sub(r7,r6)            // left shift count for bit & divisor
40		r1:0 = #0                   // initialize quotient to 0
41		r15:14 = #1                 // initialize bit to 1
42	}
43	{
44		r11 = add(r10,#1)           // loop count is 1 more than shift count
45		r13:12 = lsl(r5:4,r10)      // shift divisor msb into same bit position as dividend msb
46		r15:14 = lsl(r15:14,r10)    // shift the bit left by same amount as divisor
47	}
48	{
49		p0 = cmp.gtu(r5:4,r3:2)     // check if divisor > dividend
50		loop0(1f,r11)               // register loop
51	}
52	{
53		if (p0) jump .hexagon_divdi3_return          // if divisor > dividend, we're done, so return
54	}
55	.falign
561:
57	{
58		p0 = cmp.gtu(r13:12,r3:2)   // set predicate reg if shifted divisor > current remainder
59	}
60	{
61		r7:6 = sub(r3:2, r13:12)    // subtract shifted divisor from current remainder
62		r9:8 = add(r1:0, r15:14)    // save current quotient to temp (r9:8)
63	}
64	{
65		r1:0 = vmux(p0, r1:0, r9:8) // choose either current quotient or new quotient (r9:8)
66		r3:2 = vmux(p0, r3:2, r7:6) // choose either current remainder or new remainder (r7:6)
67	}
68	{
69		r15:14 = lsr(r15:14, #1)    // shift bit right by 1 for next iteration
70		r13:12 = lsr(r13:12, #1)    // shift "shifted divisor" right by 1 for next iteration
71	}:endloop0
72
73.hexagon_divdi3_return:
74	{
75		r3:2 = neg(r1:0)
76	}
77	{
78		r1:0 = vmux(p3,r3:2,r1:0)
79		jumpr r31
80	}
81FUNCTION_END __hexagon_divdi3
82
83  .globl __qdsp_divdi3
84  .set   __qdsp_divdi3, __hexagon_divdi3
85