1// REQUIRES: arm 2// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t 3// RUN: echo "SECTIONS { \ 4// RUN: . = SIZEOF_HEADERS; \ 5// RUN: .R_ARM_JUMP24_callee_1 : { *(.R_ARM_JUMP24_callee_low) } \ 6// RUN: .R_ARM_THM_JUMP_callee_1 : { *(.R_ARM_THM_JUMP_callee_low)} \ 7// RUN: .text : { *(.text) } \ 8// RUN: .arm_caller : { *(.arm_caller) } \ 9// RUN: .thumb_caller : { *(.thumb_caller) } \ 10// RUN: .R_ARM_JUMP24_callee_2 : { *(.R_ARM_JUMP24_callee_high) } \ 11// RUN: .R_ARM_THM_JUMP_callee_2 : { *(.R_ARM_THM_JUMP_callee_high) } \ 12// RUN: .got.plt 0x18b4 : { } } " > %t.script 13// RUN: ld.lld --script %t.script %t -o %t2 14// RUN: llvm-objdump -d --triple=thumbv7a-none-linux-gnueabi %t2 | FileCheck --check-prefix=CHECK-THUMB --check-prefix=CHECK-ABS-THUMB %s 15// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi %t2 | FileCheck --check-prefix=CHECK-ARM --check-prefix=CHECK-ABS-ARM %s 16// RUN: ld.lld --script %t.script %t -pie -o %t3 17// RUN: ld.lld --script %t.script %t --shared -o %t4 18// RUN: llvm-objdump -d --triple=thumbv7a-none-linux-gnueabi %t3 | FileCheck --check-prefix=CHECK-THUMB --check-prefix=CHECK-PI-THUMB %s 19// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi %t3 | FileCheck --check-prefix=CHECK-ARM --check-prefix=CHECK-PI-ARM %s 20// RUN: llvm-objdump -d --triple=thumbv7a-none-linux-gnueabi %t4 | FileCheck --check-prefix=CHECK-THUMB --check-prefix=CHECK-PI-PLT-THUMB %s 21// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi %t4 | FileCheck --check-prefix=CHECK-ARM --check-prefix=CHECK-PI-PLT-ARM %s 22// RUN: llvm-readobj -S -r %t4 | FileCheck -check-prefix=CHECK-DSO-REL %s 23 24// Test ARM Thumb Interworking 25// The file is linked and checked 3 times to check the following contexts 26// - Absolute executables, absolute Thunks are used. 27// - Position independent executables, position independent Thunks are used. 28// - Shared object, position independent Thunks to PLT entries are used. 29 30 .syntax unified 31 32// Target Sections for thunks at a lower address than the callers. 33.section .R_ARM_JUMP24_callee_low, "ax", %progbits 34 .thumb 35 .balign 0x1000 36 .globl thumb_callee1 37 .type thumb_callee1, %function 38thumb_callee1: 39 bx lr 40 41// CHECK-THUMB: Disassembly of section .R_ARM_JUMP24_callee_1: 42// CHECK-THUMB-EMPTY: 43// CHECK-THUMB: <thumb_callee1>: 44// CHECK-THUMB: 1000: 70 47 bx 45 .section .R_ARM_THM_JUMP_callee_low, "ax", %progbits 46 .arm 47 .balign 0x100 48 .globl arm_callee1 49 .type arm_callee1, %function 50arm_callee1: 51 bx lr 52// Disassembly of section .R_ARM_THM_JUMP_callee_1: 53// CHECK-ARM: <arm_callee1>: 54// CHECK-ARM-NEXT: 1100: 1e ff 2f e1 bx lr 55 56 // Calling sections 57 // At present ARM and Thumb interworking thunks are always added to the calling 58 // section. 59 .section .arm_caller, "ax", %progbits 60 .arm 61 .balign 0x100 62 .globl arm_caller 63 .type arm_caller, %function 64arm_caller: 65 // If target supports BLX and target is in range we don't need an 66 // interworking thunk for a BL or BLX instruction. 67 bl thumb_callee1 68 blx thumb_callee1 69 // A B instruction can't be transformed into a BLX and needs an interworking 70 // thunk 71 b thumb_callee1 72 // As long as the thunk is in range it can be reused 73 b thumb_callee1 74 // There can be more than one thunk associated with a section 75 b thumb_callee2 76 b thumb_callee3 77 // In range ARM targets do not require interworking thunks 78 b arm_callee1 79 beq arm_callee2 80 bne arm_callee3 81 bx lr 82// CHECK-ARM-ABS-ARM: Disassembly of section .arm_caller: 83// CHECK-ARM-ABS-ARM-EMPTY: 84// CHECK-ARM-ABS-ARM-NEXT: arm_caller: 85// CHECK-ARM-ABS-ARM-NEXT: 1300: 3e ff ff fa blx #-776 <thumb_callee1> 86// CHECK-ARM-ABS-ARM-NEXT: 1304: 3d ff ff fa blx #-780 <thumb_callee1> 87// CHECK-ARM-ABS-ARM-NEXT: 1308: 06 00 00 ea b #24 <__ARMv7ABSLongThunk_thumb_callee1> 88// CHECK-ARM-ABS-ARM-NEXT: 130c: 05 00 00 ea b #20 <__ARMv7ABSLongThunk_thumb_callee1> 89// CHECK-ARM-ABS-ARM-NEXT: 1310: 07 00 00 ea b #28 <__ARMv7ABSLongThunk_thumb_callee2> 90// CHECK-ARM-ABS-ARM-NEXT: 1314: 09 00 00 ea b #36 <__ARMv7ABSLongThunk_thumb_callee3> 91// CHECK-ARM-ABS-ARM-NEXT: 1318: 78 ff ff ea b #-544 <arm_callee1> 92// CHECK-ARM-ABS-ARM-NEXT: 131c: b7 00 00 0a beq #732 <arm_callee2> 93// CHECK-ARM-ABS-ARM-NEXT: 1320: b7 00 00 1a bne #732 <arm_callee3> 94// CHECK-ARM-ABS-ARM-NEXT: 1324: 1e ff 2f e1 bx lr 95// CHECK-ARM-ABS-ARM: __ARMv7ABSLongThunk_thumb_callee1: 96// 0x1001 = thumb_callee1 97// CHECK-ARM-ABS-ARM-NEXT: 1328: 01 c0 01 e3 movw r12, #4097 98// CHECK-ARM-ABS-ARM-NEXT: 132c: 00 c0 40 e3 movt r12, #0 99// CHECK-ARM-ABS-ARM-NEXT: 1330: 1c ff 2f e1 bx r12 100// 0x1501 = thumb_callee2 101// CHECK-ARM-ABS-ARM: __ARMv7ABSLongThunk_thumb_callee2: 102// CHECK-ARM-ABS-ARM-NEXT: 1334: 01 c5 01 e3 movw r12, #5377 103// CHECK-ARM-ABS-ARM-NEXT: 1338: 00 c0 40 e3 movt r12, #0 104// CHECK-ARM-ABS-ARM-NEXT: 133c: 1c ff 2f e1 bx r12 105// 0x1503 = thumb_callee3 106// CHECK-ARM-ABS-ARM: __ARMv7ABSLongThunk_thumb_callee3: 107// CHECK-ARM-ABS-ARM-NEXT: 1340: 03 c5 01 e3 movw r12, #5379 108// CHECK-ARM-ABS-ARM-NEXT: 1344: 00 c0 40 e3 movt r12, #0 109// CHECK-ARM-ABS-ARM-NEXT: 1348: 1c ff 2f e1 bx r12 110 111// CHECK-PI-ARM: Disassembly of section .arm_caller: 112// CHECK-PI-ARM-EMPTY: 113// CHECK-PI-ARM-NEXT: <arm_caller>: 114// CHECK-PI-ARM-NEXT: 1300: 3e ff ff fa blx #-776 <thumb_callee1> 115// CHECK-PI-ARM-NEXT: 1304: 3d ff ff fa blx #-780 <thumb_callee1> 116// CHECK-PI-ARM-NEXT: 1308: 06 00 00 ea b #24 <__ARMV7PILongThunk_thumb_callee1> 117// CHECK-PI-ARM-NEXT: 130c: 05 00 00 ea b #20 <__ARMV7PILongThunk_thumb_callee1> 118// CHECK-PI-ARM-NEXT: 1310: 08 00 00 ea b #32 <__ARMV7PILongThunk_thumb_callee2> 119// CHECK-PI-ARM-NEXT: 1314: 0b 00 00 ea b #44 <__ARMV7PILongThunk_thumb_callee3> 120// CHECK-PI-ARM-NEXT: 1318: 78 ff ff ea b #-544 <arm_callee1> 121// CHECK-PI-ARM-NEXT: 131c: b7 00 00 0a beq #732 <arm_callee2> 122// CHECK-PI-ARM-NEXT: 1320: b7 00 00 1a bne #732 <arm_callee3> 123// CHECK-PI-ARM-NEXT: 1324: 1e ff 2f e1 bx lr 124// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee1>: 125// 0x1330 + 8 - 0x337 = 0x1001 = thumb_callee1 126// CHECK-PI-ARM-NEXT: 1328: c9 cc 0f e3 movw r12, #64713 127// CHECK-PI-ARM-NEXT: 132c: ff cf 4f e3 movt r12, #65535 128// CHECK-PI-ARM-NEXT: 1330: 0f c0 8c e0 add r12, r12, pc 129// CHECK-PI-ARM-NEXT: 1334: 1c ff 2f e1 bx r12 130// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee2>: 131 132// CHECK-PI-ARM-NEXT: 1338: b9 c1 00 e3 movw r12, #441 133// CHECK-PI-ARM-NEXT: 133c: 00 c0 40 e3 movt r12, #0 134// CHECK-PI-ARM-NEXT: 1340: 0f c0 8c e0 add r12, r12, pc 135// CHECK-PI-ARM-NEXT: 1344: 1c ff 2f e1 bx r12 136// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee3>: 137// 0x1340 + 8 + 0x1b9 = 0x1501 138// CHECK-PI-ARM-NEXT: 1348: ab c1 00 e3 movw r12, #427 139// CHECK-PI-ARM-NEXT: 134c: 00 c0 40 e3 movt r12, #0 140// CHECK-PI-ARM-NEXT: 1350: 0f c0 8c e0 add r12, r12, pc 141// CHECK-PI-ARM-NEXT: 1354: 1c ff 2f e1 bx r12 142// 1350 + 8 + 0x1ab = 0x1503 143 144// All PLT entries are ARM, no need for interworking thunks 145// CHECK-PI-ARM-PLT: Disassembly of section .arm_caller: 146// CHECK-PI-ARM-PLT-EMPTY: 147// CHECK-PI-ARM-PLT-NEXT: arm_caller: 148// 0x17e4 PLT(thumb_callee1) 149// CHECK-PI-ARM-PLT-NEXT: 1300: 37 01 00 eb bl #1244 150// 0x17e4 PLT(thumb_callee1) 151// CHECK-PI-ARM-PLT-NEXT: 1304: 36 01 00 eb bl #1240 152// 0x17e4 PLT(thumb_callee1) 153// CHECK-PI-ARM-PLT-NEXT: 1308: 35 01 00 ea b #1236 154// 0x17e4 PLT(thumb_callee1) 155// CHECK-PI-ARM-PLT-NEXT: 130c: 34 01 00 ea b #1232 156// 0x17f4 PLT(thumb_callee2) 157// CHECK-PI-ARM-PLT-NEXT: 1310: 37 01 00 ea b #1244 158// 0x1804 PLT(thumb_callee3) 159// CHECK-PI-ARM-PLT-NEXT: 1314: 3a 01 00 ea b #1256 160// 0x1814 PLT(arm_callee1) 161// CHECK-PI-ARM-PLT-NEXT: 1318: 3d 01 00 ea b #1268 162// 0x1824 PLT(arm_callee2) 163// CHECK-PI-ARM-PLT-NEXT: 131c: 40 01 00 0a beq #1280 164// 0x1834 PLT(arm_callee3) 165// CHECK-PI-ARM-PLT-NEXT: 1320: 43 01 00 1a bne #1292 166// CHECK-PI-ARM-PLT-NEXT: 1324: 1e ff 2f e1 bx lr 167 168 .section .thumb_caller, "ax", %progbits 169 .balign 0x100 170 .thumb 171 .globl thumb_caller 172 .type thumb_caller, %function 173thumb_caller: 174 // If target supports BLX and target is in range we don't need an 175 // interworking thunk for a BL or BLX instruction. 176 bl arm_callee1 177 blx arm_callee1 178 // A B instruction can't be transformed into a BLX and needs an interworking 179 // thunk 180 b.w arm_callee1 181 // As long as the thunk is in range it can be reused 182 b.w arm_callee2 183 // There can be more than one thunk associated with a section 184 b.w arm_callee3 185 // Conditional branches also require interworking thunks, they can use the 186 // same interworking thunks. 187 beq.w arm_callee1 188 beq.w arm_callee2 189 bne.w arm_callee3 190// CHECK-ABS-THUMB: Disassembly of section .thumb_caller: 191// CHECK-ABS-THUMB-EMPTY: 192// CHECK-ABS-THUMB-NEXT: <thumb_caller>: 193// CHECK-ABS-THUMB-NEXT: 1400: ff f7 7e ee blx #-772 194// CHECK-ABS-THUMB-NEXT: 1404: ff f7 7c ee blx #-776 195// CHECK-ABS-THUMB-NEXT: 1408: 00 f0 0a b8 b.w #20 <__Thumbv7ABSLongThunk_arm_callee1> 196// CHECK-ABS-THUMB-NEXT: 140c: 00 f0 0d b8 b.w #26 <__Thumbv7ABSLongThunk_arm_callee2> 197// CHECK-ABS-THUMB-NEXT: 1410: 00 f0 10 b8 b.w #32 <__Thumbv7ABSLongThunk_arm_callee3> 198// CHECK-ABS-THUMB-NEXT: 1414: 00 f0 04 80 beq.w #8 <__Thumbv7ABSLongThunk_arm_callee1> 199// CHECK-ABS-THUMB-NEXT: 1418: 00 f0 07 80 beq.w #14 <__Thumbv7ABSLongThunk_arm_callee2> 200// CHECK-ABS-THUMB-NEXT: 141c: 40 f0 0a 80 bne.w #20 <__Thumbv7ABSLongThunk_arm_callee3> 201// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee1>: 202// 0x1100 = arm_callee1 203// CHECK-ABS-THUMB-NEXT: 1420: 41 f2 00 1c movw r12, #4352 204// CHECK-ABS-THUMB-NEXT: 1424: c0 f2 00 0c movt r12, #0 205// CHECK-ABS-THUMB-NEXT: 1428: 60 47 bx r12 206// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee2>: 207// 0x1600 = arm_callee2 208// CHECK-ABS-THUMB-NEXT: 142a: 41 f2 00 6c movw r12, #5632 209// CHECK-ABS-THUMB-NEXT: 142e: c0 f2 00 0c movt r12, #0 210// CHECK-ABS-THUMB-NEXT: 1432: 60 47 bx r12 211// 0x1604 = arm_callee3 212// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee3>: 213// CHECK-ABS-THUMB-NEXT: 1434: 41 f2 04 6c movw r12, #5636 214// CHECK-ABS-THUMB-NEXT: 1438: c0 f2 00 0c movt r12, #0 215// CHECK-ABS-THUMB-NEXT: 143c: 60 47 bx r12 216 217// CHECK-PI-THUMB: Disassembly of section .thumb_caller: 218// CHECK-PI-THUMB-EMPTY: 219// CHECK-PI-THUMB-NEXT: <thumb_caller>: 220// CHECK-PI-THUMB-NEXT: 1400: ff f7 7e ee blx #-772 221// CHECK-PI-THUMB-NEXT: 1404: ff f7 7c ee blx #-776 222// CHECK-PI-THUMB-NEXT: 1408: 00 f0 0a b8 b.w #20 <__ThumbV7PILongThunk_arm_callee1> 223// CHECK-PI-THUMB-NEXT: 140c: 00 f0 0e b8 b.w #28 <__ThumbV7PILongThunk_arm_callee2> 224// CHECK-PI-THUMB-NEXT: 1410: 00 f0 12 b8 b.w #36 <__ThumbV7PILongThunk_arm_callee3> 225// CHECK-PI-THUMB-NEXT: 1414: 00 f0 04 80 beq.w #8 <__ThumbV7PILongThunk_arm_callee1> 226// CHECK-PI-THUMB-NEXT: 1418: 00 f0 08 80 beq.w #16 <__ThumbV7PILongThunk_arm_callee2> 227// CHECK-PI-THUMB-NEXT: 141c: 40 f0 0c 80 bne.w #24 <__ThumbV7PILongThunk_arm_callee3> 228// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee1>: 229// 0x1428 + 4 - 0x32c = 0x1100 = arm_callee1 230// CHECK-PI-THUMB-NEXT: 1420: 4f f6 d4 4c movw r12, #64724 231// CHECK-PI-THUMB-NEXT: 1424: cf f6 ff 7c movt r12, #65535 232// CHECK-PI-THUMB-NEXT: 1428: fc 44 add r12, pc 233// CHECK-PI-THUMB-NEXT: 142a: 60 47 bx r12 234// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee2>: 235// 0x1434 + 4 + 0x1c8 = 0x1600 = arm_callee2 236// CHECK-PI-THUMB-NEXT: 142c: 40 f2 c8 1c movw r12, #456 237// CHECK-PI-THUMB-NEXT: 1430: c0 f2 00 0c movt r12, #0 238// CHECK-PI-THUMB-NEXT: 1434: fc 44 add r12, pc 239// CHECK-PI-THUMB-NEXT: 1436: 60 47 bx r12 240// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee3>: 241// 0x1440 + 4 + 0x1c0 = 0x1604 = arm_callee3 242// CHECK-PI-THUMB-NEXT: 1438: 40 f2 c0 1c movw r12, #448 243// CHECK-PI-THUMB-NEXT: 143c: c0 f2 00 0c movt r12, #0 244// CHECK-PI-THUMB-NEXT: 1440: fc 44 add r12, pc 245// CHECK-PI-THUMB-NEXT: 1442: 60 47 bx r12 246 247// CHECK-PI-THUMB-PLT: Disassembly of section .arm_caller: 248// CHECK-PI-THUMB-PLT-EMPTY: 249// CHECK-PI-THUMB-PLT-NEXT: thumb_caller: 250// 0x1400 + 4 + 0x410 = 0x1814 = PLT(arm_callee1) 251// CHECK-PI-THUMB-PLT-NEXT: 1400: 00 f0 08 ea blx #1040 252// 0x1404 + 4 + 0x40c = 0x1814 = PLT(arm_callee1) 253// CHECK-PI-THUMB-PLT-NEXT: 1404: 00 f0 06 ea blx #1036 254// 0x1408 + 4 + 0x14 = 0x1420 = IWV(PLT(arm_callee1) 255// CHECK-PI-THUMB-PLT-NEXT: 1408: 00 f0 0a b8 b.w #20 256// 0x140c + 4 + 0x1c = 0x142c = IWV(PLT(arm_callee2) 257// CHECK-PI-THUMB-PLT-NEXT: 140c: 00 f0 0e b8 b.w #28 258// 0x1410 + 4 + 0x24 = 0x1438 = IWV(PLT(arm_callee3) 259// CHECK-PI-THUMB-PLT-NEXT: 1410: 00 f0 12 b8 b.w #36 260// 0x1414 + 4 + 8 = 0x1420 = IWV(PLT(arm_callee1) 261// CHECK-PI-THUMB-PLT-NEXT: 1414: 00 f0 04 80 beq.w #8 262// 0x1418 + 4 + 0x10 = 0x142c = IWV(PLT(arm_callee2) 263// CHECK-PI-THUMB-PLT-NEXT: 1418: 00 f0 08 80 beq.w #16 264// 0x141c + 4 + 0x18 = 0x1438 = IWV(PLT(arm_callee3) 265// CHECK-PI-THUMB-PLT-NEXT: 141c: 40 f0 0c 80 bne.w #24 266// 0x1428 + 4 + 0x3e8 = 0x1814 = PLT(arm_callee1) 267// CHECK-PI-THUMB-PLT-NEXT: 1420: 40 f2 e8 3c movw r12, #1000 268// CHECK-PI-THUMB-PLT-NEXT: 1424: c0 f2 00 0c movt r12, #0 269// CHECK-PI-THUMB-PLT-NEXT: 1428: fc 44 add r12, pc 270// CHECK-PI-THUMB-PLT-NEXT: 142a: 60 47 bx r12 271// 0x1434 + 4 + 0x3ec = 0x1824 = PLT(arm_callee2) 272// CHECK-PI-THUMB-PLT-NEXT: 142c: 40 f2 ec 3c movw r12, #1004 273// CHECK-PI-THUMB-PLT-NEXT: 1430: c0 f2 00 0c movt r12, #0 274// CHECK-PI-THUMB-PLT-NEXT: 1434: fc 44 add r12, pc 275// CHECK-PI-THUMB-PLT-NEXT: 1436: 60 47 bx r12 276// 0x1440 + 4 + 0x3f0 = 0x1834 = PLT(arm_callee3) 277// CHECK-PI-THUMB-PLT-NEXT: 1438: 40 f2 f0 3c movw r12, #1008 278// CHECK-PI-THUMB-PLT-NEXT: 143c: c0 f2 00 0c movt r12, #0 279// CHECK-PI-THUMB-PLT-NEXT: 1440: fc 44 add r12, pc 280// CHECK-PI-THUMB-PLT-NEXT: 1442: 60 47 bx r12 281 282// Target Sections for thunks at a higher address than the callers. 283.section .R_ARM_JUMP24_callee_high, "ax", %progbits 284 .thumb 285 .balign 0x100 286 .globl thumb_callee2 287 .type thumb_callee2, %function 288thumb_callee2: 289 bx lr 290 291 .globl thumb_callee3 292 .type thumb_callee3, %function 293thumb_callee3: 294 bx lr 295// CHECK-THUMB: Disassembly of section .R_ARM_JUMP24_callee_2: 296// CHECK-THUMB-EMPTY: 297// CHECK-THUMB-NEXT: <thumb_callee2>: 298// CHECK-THUMB-NEXT: 1500: 70 47 bx lr 299// CHECK-THUMB: <thumb_callee3>: 300// CHECK-THUMB-NEXT: 1502: 70 47 bx lr 301 302 .section .R_ARM_THM_JUMP_callee_high, "ax", %progbits 303 .arm 304 .balign 0x100 305 .globl arm_callee2 306 .type arm_callee2, %function 307arm_callee2: 308 bx lr 309 .globl arm_callee3 310 .type arm_callee3, %function 311arm_callee3: 312 bx lr 313// CHECK-ARM: Disassembly of section .R_ARM_THM_JUMP_callee_2: 314// CHECK-ARM-EMPTY: 315// CHECK-ARM-NEXT: <arm_callee2>: 316// CHECK-ARM-NEXT: 1600: 1e ff 2f e1 bx lr 317// CHECK-ARM: <arm_callee3>: 318// CHECK-ARM-NEXT: 1604: 1e ff 2f e1 bx lr 319 320// _start section just calls the arm and thumb calling sections 321 .text 322 .arm 323 .globl _start 324 .balign 0x100 325 .type _start, %function 326_start: 327 bl arm_caller 328 bl thumb_caller 329 bx lr 330 331 332// CHECK-PI-ARM-PLT: Disassembly of section .plt: 333// CHECK-PI-ARM-PLT-EMPTY: 334// CHECK-PI-ARM-PLT-NEXT: .plt: 335// CHECK-PI-ARM-PLT-NEXT: 17b0: 04 e0 2d e5 str lr, [sp, #-4]! 336// CHECK-PI-ARM-PLT-NEXT: 17b4: 04 e0 9f e5 ldr lr, [pc, #4] 337// CHECK-PI-ARM-PLT-NEXT: 17b8: 0e e0 8f e0 add lr, pc, lr 338// CHECK-PI-ARM-PLT-NEXT: 17bc: 08 f0 be e5 ldr pc, [lr, #8]! 339// CHECK-PI-ARM-PLT-NEXT: 17c0: d4 00 00 00 340// 0x17c8 + 8 + 0xd0 = 0x18a0 arm_caller 341// CHECK-PI-ARM-PLT-NEXT: 17c4: 04 c0 9f e5 ldr r12, [pc, #4] 342// CHECK-PI-ARM-PLT-NEXT: 17c8: 0f c0 8c e0 add r12, r12, pc 343// CHECK-PI-ARM-PLT-NEXT: 17cc: 00 f0 9c e5 ldr pc, [r12] 344// CHECK-PI-ARM-PLT-NEXT: 17d0: d0 00 00 00 345// 0x17d8 + 8 + 0xc4 = 0x18a4 thumb_caller 346// CHECK-PI-ARM-PLT-NEXT: 17d4: 04 c0 9f e5 ldr r12, [pc, #4] 347// CHECK-PI-ARM-PLT-NEXT: 17d8: 0f c0 8c e0 add r12, r12, pc 348// CHECK-PI-ARM-PLT-NEXT: 17dc: 00 f0 9c e5 ldr pc, [r12] 349// CHECK-PI-ARM-PLT-NEXT: 17e0: c4 00 00 00 350// 0x17e8 + 8 + 0xb8 = 0x18a8 thumb_callee1 351// CHECK-PI-ARM-PLT-NEXT: 17e4: 04 c0 9f e5 ldr r12, [pc, #4] 352// CHECK-PI-ARM-PLT-NEXT: 17e8: 0f c0 8c e0 add r12, r12, pc 353// CHECK-PI-ARM-PLT-NEXT: 17ec: 00 f0 9c e5 ldr pc, [r12] 354// CHECK-PI-ARM-PLT-NEXT: 17f0: b8 00 00 00 355// 0x17f8 + 8 + 0xac = 0x18ac thumb_callee2 356// CHECK-PI-ARM-PLT-NEXT: 17f4: 04 c0 9f e5 ldr r12, [pc, #4] 357// CHECK-PI-ARM-PLT-NEXT: 17f8: 0f c0 8c e0 add r12, r12, pc 358// CHECK-PI-ARM-PLT-NEXT: 17fc: 00 f0 9c e5 ldr pc, [r12] 359// CHECK-PI-ARM-PLT-NEXT: 1800: ac 00 00 00 360// 0x1808 + 8 + 0xa0 = 0x18b0 thumb_callee3 361// CHECK-PI-ARM-PLT-NEXT: 1804: 04 c0 9f e5 ldr r12, [pc, #4] 362// CHECK-PI-ARM-PLT-NEXT: 1808: 0f c0 8c e0 add r12, r12, pc 363// CHECK-PI-ARM-PLT-NEXT: 180c: 00 f0 9c e5 ldr pc, [r12] 364// CHECK-PI-ARM-PLT-NEXT: 1810: a0 00 00 00 365// 0x1818 + 8 + 0x94 = 0x18b4 arm_callee1 366// CHECK-PI-ARM-PLT-NEXT: 1814: 04 c0 9f e5 ldr r12, [pc, #4] 367// CHECK-PI-ARM-PLT-NEXT: 1818: 0f c0 8c e0 add r12, r12, pc 368// CHECK-PI-ARM-PLT-NEXT: 181c: 00 f0 9c e5 ldr pc, [r12] 369// CHECK-PI-ARM-PLT-NEXT: 1820: 94 00 00 00 370// 0x1828 + 8 + 0x88 = 0x18b8 arm_callee2 371// CHECK-PI-ARM-PLT-NEXT: 1824: 04 c0 9f e5 ldr r12, [pc, #4] 372// CHECK-PI-ARM-PLT-NEXT: 1828: 0f c0 8c e0 add r12, r12, pc 373// CHECK-PI-ARM-PLT-NEXT: 182c: 00 f0 9c e5 ldr pc, [r12] 374// CHECK-PI-ARM-PLT-NEXT: 1830: 88 00 00 00 375// 0x1838 + 8 + 0x7c = 0x18bc arm_callee3 376// CHECK-PI-ARM-PLT-NEXT: 1834: 04 c0 9f e5 ldr r12, [pc, #4] 377// CHECK-PI-ARM-PLT-NEXT: 1838: 0f c0 8c e0 add r12, r12, pc 378// CHECK-PI-ARM-PLT-NEXT: 183c: 00 f0 9c e5 ldr pc, [r12] 379// CHECK-PI-ARM-PLT-NEXT: 1840: 7c 00 00 00 380 381// CHECK-DSO-REL: 0x18C0 R_ARM_JUMP_SLOT arm_caller 382// CHECK-DSO-REL-NEXT: 0x18C4 R_ARM_JUMP_SLOT thumb_caller 383// CHECK-DSO-REL-NEXT: 0x18C8 R_ARM_JUMP_SLOT thumb_callee1 384// CHECK-DSO-REL-NEXT: 0x18CC R_ARM_JUMP_SLOT thumb_callee2 385// CHECK-DSO-REL-NEXT: 0x18D0 R_ARM_JUMP_SLOT thumb_callee3 386// CHECK-DSO-REL-NEXT: 0x18D4 R_ARM_JUMP_SLOT arm_callee1 387// CHECK-DSO-REL-NEXT: 0x18D8 R_ARM_JUMP_SLOT arm_callee2 388// CHECK-DSO-REL-NEXT: 0x18DC R_ARM_JUMP_SLOT arm_callee3 389