1""" 2Test the iteration protocol for frame registers. 3""" 4 5from __future__ import print_function 6 7 8import lldb 9from lldbsuite.test.decorators import * 10from lldbsuite.test.lldbtest import * 11from lldbsuite.test import lldbutil 12 13 14class RegistersIteratorTestCase(TestBase): 15 16 mydir = TestBase.compute_mydir(__file__) 17 18 def setUp(self): 19 # Call super's setUp(). 20 TestBase.setUp(self) 21 # Find the line number to break inside main(). 22 self.line1 = line_number( 23 'main.cpp', '// Set break point at this line.') 24 25 @add_test_categories(['pyapi']) 26 def test_iter_registers(self): 27 """Test iterator works correctly for lldbutil.iter_registers().""" 28 self.build() 29 exe = self.getBuildArtifact("a.out") 30 31 target = self.dbg.CreateTarget(exe) 32 self.assertTrue(target, VALID_TARGET) 33 34 breakpoint = target.BreakpointCreateByLocation("main.cpp", self.line1) 35 self.assertTrue(breakpoint, VALID_BREAKPOINT) 36 37 # Now launch the process, and do not stop at entry point. 38 process = target.LaunchSimple( 39 None, None, self.get_process_working_directory()) 40 41 if not process: 42 self.fail("SBTarget.LaunchProcess() failed") 43 44 import lldbsuite.test.lldbutil as lldbutil 45 for thread in process: 46 if thread.GetStopReason() == lldb.eStopReasonBreakpoint: 47 for frame in thread: 48 # Dump the registers of this frame using 49 # lldbutil.get_GPRs() and friends. 50 if self.TraceOn(): 51 print(frame) 52 53 REGs = lldbutil.get_GPRs(frame) 54 num = len(REGs) 55 if self.TraceOn(): 56 print( 57 "\nNumber of general purpose registers: %d" % 58 num) 59 for reg in REGs: 60 self.assertTrue(reg) 61 if self.TraceOn(): 62 print("%s => %s" % (reg.GetName(), reg.GetValue())) 63 64 REGs = lldbutil.get_FPRs(frame) 65 num = len(REGs) 66 if self.TraceOn(): 67 print("\nNumber of floating point registers: %d" % num) 68 for reg in REGs: 69 self.assertTrue(reg) 70 if self.TraceOn(): 71 print("%s => %s" % (reg.GetName(), reg.GetValue())) 72 73 REGs = lldbutil.get_ESRs(frame) 74 if self.platformIsDarwin(): 75 if self.getArchitecture() != 'armv7' and self.getArchitecture() != 'armv7k': 76 num = len(REGs) 77 if self.TraceOn(): 78 print( 79 "\nNumber of exception state registers: %d" % 80 num) 81 for reg in REGs: 82 self.assertTrue(reg) 83 if self.TraceOn(): 84 print( 85 "%s => %s" % 86 (reg.GetName(), reg.GetValue())) 87 else: 88 self.assertIsNone(REGs) 89 90 # And these should also work. 91 for kind in ["General Purpose Registers", 92 "Floating Point Registers"]: 93 REGs = lldbutil.get_registers(frame, kind) 94 self.assertTrue(REGs) 95 96 REGs = lldbutil.get_registers( 97 frame, "Exception State Registers") 98 if self.platformIsDarwin(): 99 if self.getArchitecture() != 'armv7' and self.getArchitecture() != 'armv7k': 100 self.assertIsNotNone(REGs) 101 else: 102 self.assertIsNone(REGs) 103 104 # We've finished dumping the registers for frame #0. 105 break 106