1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 /// \file 10 /// The AMDGPU TargetMachine interface definition for hw codgen targets. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H 15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H 16 17 #include "AMDGPUSubtarget.h" 18 #include "llvm/ADT/Optional.h" 19 #include "llvm/ADT/StringMap.h" 20 #include "llvm/ADT/StringRef.h" 21 #include "llvm/Analysis/TargetTransformInfo.h" 22 #include "llvm/Support/CodeGen.h" 23 #include "llvm/Target/TargetMachine.h" 24 #include <memory> 25 26 namespace llvm { 27 28 //===----------------------------------------------------------------------===// 29 // AMDGPU Target Machine (R600+) 30 //===----------------------------------------------------------------------===// 31 32 class AMDGPUTargetMachine : public LLVMTargetMachine { 33 protected: 34 std::unique_ptr<TargetLoweringObjectFile> TLOF; 35 36 StringRef getGPUName(const Function &F) const; 37 StringRef getFeatureString(const Function &F) const; 38 39 public: 40 static bool EnableLateStructurizeCFG; 41 static bool EnableFunctionCalls; 42 static bool EnableFixedFunctionABI; 43 44 AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 45 StringRef FS, TargetOptions Options, 46 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, 47 CodeGenOpt::Level OL); 48 ~AMDGPUTargetMachine() override; 49 50 const TargetSubtargetInfo *getSubtargetImpl() const; 51 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0; 52 getObjFileLowering()53 TargetLoweringObjectFile *getObjFileLowering() const override { 54 return TLOF.get(); 55 } 56 57 void adjustPassManager(PassManagerBuilder &) override; 58 59 /// Get the integer value of a null pointer in the given address space. getNullPointerValue(unsigned AddrSpace)60 static int64_t getNullPointerValue(unsigned AddrSpace) { 61 return (AddrSpace == AMDGPUAS::LOCAL_ADDRESS || 62 AddrSpace == AMDGPUAS::PRIVATE_ADDRESS || 63 AddrSpace == AMDGPUAS::REGION_ADDRESS) ? -1 : 0; 64 } 65 66 bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override; 67 68 unsigned getAssumedAddrSpace(const Value *V) const override; 69 }; 70 71 //===----------------------------------------------------------------------===// 72 // R600 Target Machine (R600 -> Cayman) 73 //===----------------------------------------------------------------------===// 74 75 class R600TargetMachine final : public AMDGPUTargetMachine { 76 private: 77 mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap; 78 79 public: 80 R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU, 81 StringRef FS, TargetOptions Options, 82 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, 83 CodeGenOpt::Level OL, bool JIT); 84 85 TargetPassConfig *createPassConfig(PassManagerBase &PM) override; 86 87 const R600Subtarget *getSubtargetImpl(const Function &) const override; 88 89 TargetTransformInfo getTargetTransformInfo(const Function &F) override; 90 isMachineVerifierClean()91 bool isMachineVerifierClean() const override { 92 return false; 93 } 94 }; 95 96 //===----------------------------------------------------------------------===// 97 // GCN Target Machine (SI+) 98 //===----------------------------------------------------------------------===// 99 100 class GCNTargetMachine final : public AMDGPUTargetMachine { 101 private: 102 mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap; 103 104 public: 105 GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 106 StringRef FS, TargetOptions Options, 107 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, 108 CodeGenOpt::Level OL, bool JIT); 109 110 TargetPassConfig *createPassConfig(PassManagerBase &PM) override; 111 112 const GCNSubtarget *getSubtargetImpl(const Function &) const override; 113 114 TargetTransformInfo getTargetTransformInfo(const Function &F) override; 115 useIPRA()116 bool useIPRA() const override { 117 return true; 118 } 119 120 yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override; 121 yaml::MachineFunctionInfo * 122 convertFuncInfoToYAML(const MachineFunction &MF) const override; 123 bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, 124 PerFunctionMIParsingState &PFS, 125 SMDiagnostic &Error, 126 SMRange &SourceRange) const override; 127 }; 128 129 } // end namespace llvm 130 131 #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H 132