1 //===-- PPCMachineFunctionInfo.h - Private data used for PowerPC --*- C++ -*-=//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the PowerPC specific subclass of MachineFunctionInfo.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H
14 #define LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H
15 
16 #include "llvm/ADT/SmallVector.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/TargetCallingConv.h"
19 
20 namespace llvm {
21 
22 /// PPCFunctionInfo - This class is derived from MachineFunction private
23 /// PowerPC target-specific information for each MachineFunction.
24 class PPCFunctionInfo : public MachineFunctionInfo {
25   virtual void anchor();
26 
27   /// FramePointerSaveIndex - Frame index of where the old frame pointer is
28   /// stored.  Also used as an anchor for instructions that need to be altered
29   /// when using frame pointers (dyna_add, dyna_sub.)
30   int FramePointerSaveIndex = 0;
31 
32   /// ReturnAddrSaveIndex - Frame index of where the return address is stored.
33   ///
34   int ReturnAddrSaveIndex = 0;
35 
36   /// Frame index where the old base pointer is stored.
37   int BasePointerSaveIndex = 0;
38 
39   /// Frame index where the old PIC base pointer is stored.
40   int PICBasePointerSaveIndex = 0;
41 
42   /// MustSaveLR - Indicates whether LR is defined (or clobbered) in the current
43   /// function.  This is only valid after the initial scan of the function by
44   /// PEI.
45   bool MustSaveLR = false;
46 
47   /// MustSaveTOC - Indicates that the TOC save needs to be performed in the
48   /// prologue of the function. This is typically the case when there are
49   /// indirect calls in the function and it is more profitable to save the
50   /// TOC pointer in the prologue than in the block(s) containing the call(s).
51   bool MustSaveTOC = false;
52 
53   /// Do we have to disable shrink-wrapping? This has to be set if we emit any
54   /// instructions that clobber LR in the entry block because discovering this
55   /// in PEI is too late (happens after shrink-wrapping);
56   bool ShrinkWrapDisabled = false;
57 
58   /// Does this function have any stack spills.
59   bool HasSpills = false;
60 
61   /// Does this function spill using instructions with only r+r (not r+i)
62   /// forms.
63   bool HasNonRISpills = false;
64 
65   /// SpillsCR - Indicates whether CR is spilled in the current function.
66   bool SpillsCR = false;
67 
68   /// DisableNonVolatileCR - Indicates whether non-volatile CR fields would be
69   /// disabled.
70   bool DisableNonVolatileCR = false;
71 
72   /// LRStoreRequired - The bool indicates whether there is some explicit use of
73   /// the LR/LR8 stack slot that is not obvious from scanning the code.  This
74   /// requires that the code generator produce a store of LR to the stack on
75   /// entry, even though LR may otherwise apparently not be used.
76   bool LRStoreRequired = false;
77 
78   /// This function makes use of the PPC64 ELF TOC base pointer (register r2).
79   bool UsesTOCBasePtr = false;
80 
81   /// MinReservedArea - This is the frame size that is at least reserved in a
82   /// potential caller (parameter+linkage area).
83   unsigned MinReservedArea = 0;
84 
85   /// TailCallSPDelta - Stack pointer delta used when tail calling. Maximum
86   /// amount the stack pointer is adjusted to make the frame bigger for tail
87   /// calls. Used for creating an area before the register spill area.
88   int TailCallSPDelta = 0;
89 
90   /// HasFastCall - Does this function contain a fast call. Used to determine
91   /// how the caller's stack pointer should be calculated (epilog/dynamicalloc).
92   bool HasFastCall = false;
93 
94   /// VarArgsFrameIndex - FrameIndex for start of varargs area.
95   int VarArgsFrameIndex = 0;
96 
97   /// VarArgsStackOffset - StackOffset for start of stack
98   /// arguments.
99 
100   int VarArgsStackOffset = 0;
101 
102   /// VarArgsNumGPR - Index of the first unused integer
103   /// register for parameter passing.
104   unsigned VarArgsNumGPR = 0;
105 
106   /// VarArgsNumFPR - Index of the first unused double
107   /// register for parameter passing.
108   unsigned VarArgsNumFPR = 0;
109 
110   /// CRSpillFrameIndex - FrameIndex for CR spill slot for 32-bit SVR4.
111   int CRSpillFrameIndex = 0;
112 
113   /// If any of CR[2-4] need to be saved in the prologue and restored in the
114   /// epilogue then they are added to this array. This is used for the
115   /// 64-bit SVR4 ABI.
116   SmallVector<Register, 3> MustSaveCRs;
117 
118   /// Whether this uses the PIC Base register or not.
119   bool UsesPICBase = false;
120 
121   /// We keep track attributes for each live-in virtual registers
122   /// to use SExt/ZExt flags in later optimization.
123   std::vector<std::pair<Register, ISD::ArgFlagsTy>> LiveInAttrs;
124 
125 public:
126   explicit PPCFunctionInfo(const MachineFunction &MF);
127 
getFramePointerSaveIndex()128   int getFramePointerSaveIndex() const { return FramePointerSaveIndex; }
setFramePointerSaveIndex(int Idx)129   void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = Idx; }
130 
getReturnAddrSaveIndex()131   int getReturnAddrSaveIndex() const { return ReturnAddrSaveIndex; }
setReturnAddrSaveIndex(int idx)132   void setReturnAddrSaveIndex(int idx) { ReturnAddrSaveIndex = idx; }
133 
getBasePointerSaveIndex()134   int getBasePointerSaveIndex() const { return BasePointerSaveIndex; }
setBasePointerSaveIndex(int Idx)135   void setBasePointerSaveIndex(int Idx) { BasePointerSaveIndex = Idx; }
136 
getPICBasePointerSaveIndex()137   int getPICBasePointerSaveIndex() const { return PICBasePointerSaveIndex; }
setPICBasePointerSaveIndex(int Idx)138   void setPICBasePointerSaveIndex(int Idx) { PICBasePointerSaveIndex = Idx; }
139 
getMinReservedArea()140   unsigned getMinReservedArea() const { return MinReservedArea; }
setMinReservedArea(unsigned size)141   void setMinReservedArea(unsigned size) { MinReservedArea = size; }
142 
getTailCallSPDelta()143   int getTailCallSPDelta() const { return TailCallSPDelta; }
setTailCallSPDelta(int size)144   void setTailCallSPDelta(int size) { TailCallSPDelta = size; }
145 
146   /// MustSaveLR - This is set when the prolog/epilog inserter does its initial
147   /// scan of the function. It is true if the LR/LR8 register is ever explicitly
148   /// defined/clobbered in the machine function (e.g. by calls and movpctolr,
149   /// which is used in PIC generation), or if the LR stack slot is explicitly
150   /// referenced by builtin_return_address.
setMustSaveLR(bool U)151   void setMustSaveLR(bool U) { MustSaveLR = U; }
mustSaveLR()152   bool mustSaveLR() const    { return MustSaveLR; }
153 
setMustSaveTOC(bool U)154   void setMustSaveTOC(bool U) { MustSaveTOC = U; }
mustSaveTOC()155   bool mustSaveTOC() const    { return MustSaveTOC; }
156 
157   /// We certainly don't want to shrink wrap functions if we've emitted a
158   /// MovePCtoLR8 as that has to go into the entry, so the prologue definitely
159   /// has to go into the entry block.
setShrinkWrapDisabled(bool U)160   void setShrinkWrapDisabled(bool U) { ShrinkWrapDisabled = U; }
shrinkWrapDisabled()161   bool shrinkWrapDisabled() const { return ShrinkWrapDisabled; }
162 
setHasSpills()163   void setHasSpills()      { HasSpills = true; }
hasSpills()164   bool hasSpills() const   { return HasSpills; }
165 
setHasNonRISpills()166   void setHasNonRISpills()    { HasNonRISpills = true; }
hasNonRISpills()167   bool hasNonRISpills() const { return HasNonRISpills; }
168 
setSpillsCR()169   void setSpillsCR()       { SpillsCR = true; }
isCRSpilled()170   bool isCRSpilled() const { return SpillsCR; }
171 
setDisableNonVolatileCR()172   void setDisableNonVolatileCR() { DisableNonVolatileCR = true; }
isNonVolatileCRDisabled()173   bool isNonVolatileCRDisabled() const { return DisableNonVolatileCR; }
174 
setLRStoreRequired()175   void setLRStoreRequired() { LRStoreRequired = true; }
isLRStoreRequired()176   bool isLRStoreRequired() const { return LRStoreRequired; }
177 
setUsesTOCBasePtr()178   void setUsesTOCBasePtr()    { UsesTOCBasePtr = true; }
usesTOCBasePtr()179   bool usesTOCBasePtr() const { return UsesTOCBasePtr; }
180 
setHasFastCall()181   void setHasFastCall() { HasFastCall = true; }
hasFastCall()182   bool hasFastCall() const { return HasFastCall;}
183 
getVarArgsFrameIndex()184   int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
setVarArgsFrameIndex(int Index)185   void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
186 
getVarArgsStackOffset()187   int getVarArgsStackOffset() const { return VarArgsStackOffset; }
setVarArgsStackOffset(int Offset)188   void setVarArgsStackOffset(int Offset) { VarArgsStackOffset = Offset; }
189 
getVarArgsNumGPR()190   unsigned getVarArgsNumGPR() const { return VarArgsNumGPR; }
setVarArgsNumGPR(unsigned Num)191   void setVarArgsNumGPR(unsigned Num) { VarArgsNumGPR = Num; }
192 
getVarArgsNumFPR()193   unsigned getVarArgsNumFPR() const { return VarArgsNumFPR; }
setVarArgsNumFPR(unsigned Num)194   void setVarArgsNumFPR(unsigned Num) { VarArgsNumFPR = Num; }
195 
196   /// This function associates attributes for each live-in virtual register.
addLiveInAttr(Register VReg,ISD::ArgFlagsTy Flags)197   void addLiveInAttr(Register VReg, ISD::ArgFlagsTy Flags) {
198     LiveInAttrs.push_back(std::make_pair(VReg, Flags));
199   }
200 
201   /// This function returns true if the specified vreg is
202   /// a live-in register and sign-extended.
203   bool isLiveInSExt(Register VReg) const;
204 
205   /// This function returns true if the specified vreg is
206   /// a live-in register and zero-extended.
207   bool isLiveInZExt(Register VReg) const;
208 
getCRSpillFrameIndex()209   int getCRSpillFrameIndex() const { return CRSpillFrameIndex; }
setCRSpillFrameIndex(int idx)210   void setCRSpillFrameIndex(int idx) { CRSpillFrameIndex = idx; }
211 
212   const SmallVectorImpl<Register> &
getMustSaveCRs()213     getMustSaveCRs() const { return MustSaveCRs; }
addMustSaveCR(Register Reg)214   void addMustSaveCR(Register Reg) { MustSaveCRs.push_back(Reg); }
215 
setUsesPICBase(bool uses)216   void setUsesPICBase(bool uses) { UsesPICBase = uses; }
usesPICBase()217   bool usesPICBase() const { return UsesPICBase; }
218 
219   MCSymbol *getPICOffsetSymbol(MachineFunction &MF) const;
220 
221   MCSymbol *getGlobalEPSymbol(MachineFunction &MF) const;
222   MCSymbol *getLocalEPSymbol(MachineFunction &MF) const;
223   MCSymbol *getTOCOffsetSymbol(MachineFunction &MF) const;
224 };
225 
226 } // end namespace llvm
227 
228 #endif // LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H
229