1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py 2; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=-lzcnt,+sse2 | FileCheck %s -check-prefixes=SSE2,NOLZCNT 3; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+lzcnt,+sse2 | FileCheck %s -check-prefixes=SSE2,LZCNT 4; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+lzcnt,+sse4.2 | FileCheck %s -check-prefixes=LZCNT,SSE42 5; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+lzcnt,+avx | FileCheck %s -check-prefixes=LZCNT,AVX1 6; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+lzcnt,+avx2 | FileCheck %s -check-prefixes=LZCNT,AVX2 7; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+lzcnt,+avx512f | FileCheck %s -check-prefixes=LZCNT,AVX512,AVX512F 8; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+lzcnt,+avx512vl,+avx512bw,+avx512dq | FileCheck %s -check-prefixes=LZCNT,AVX512,AVX512BW 9; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+lzcnt,+avx512vl,+avx512bw,+avx512dq,+avx512cd | FileCheck %s -check-prefixes=LZCNT,AVX512CD 10 11; Verify the cost of scalar leading zero count instructions. 12 13declare i64 @llvm.ctlz.i64(i64, i1) 14declare i32 @llvm.ctlz.i32(i32, i1) 15declare i16 @llvm.ctlz.i16(i16, i1) 16declare i8 @llvm.ctlz.i8(i8, i1) 17 18define i64 @var_ctlz_i64(i64 %a) { 19; NOLZCNT-LABEL: 'var_ctlz_i64' 20; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 false) 21; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i64 %ctlz 22; 23; LZCNT-LABEL: 'var_ctlz_i64' 24; LZCNT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 false) 25; LZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i64 %ctlz 26; 27 %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 0) 28 ret i64 %ctlz 29} 30 31define i64 @var_ctlz_i64u(i64 %a) { 32; NOLZCNT-LABEL: 'var_ctlz_i64u' 33; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 true) 34; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i64 %ctlz 35; 36; LZCNT-LABEL: 'var_ctlz_i64u' 37; LZCNT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 true) 38; LZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i64 %ctlz 39; 40 %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 1) 41 ret i64 %ctlz 42} 43 44define i32 @var_ctlz_i32(i32 %a) { 45; NOLZCNT-LABEL: 'var_ctlz_i32' 46; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 false) 47; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 %ctlz 48; 49; LZCNT-LABEL: 'var_ctlz_i32' 50; LZCNT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 false) 51; LZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 %ctlz 52; 53 %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 0) 54 ret i32 %ctlz 55} 56 57define i32 @var_ctlz_i32u(i32 %a) { 58; NOLZCNT-LABEL: 'var_ctlz_i32u' 59; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 true) 60; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 %ctlz 61; 62; LZCNT-LABEL: 'var_ctlz_i32u' 63; LZCNT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 true) 64; LZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 %ctlz 65; 66 %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 1) 67 ret i32 %ctlz 68} 69 70define i16 @var_ctlz_i16(i16 %a) { 71; NOLZCNT-LABEL: 'var_ctlz_i16' 72; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 false) 73; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i16 %ctlz 74; 75; LZCNT-LABEL: 'var_ctlz_i16' 76; LZCNT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 false) 77; LZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i16 %ctlz 78; 79 %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 0) 80 ret i16 %ctlz 81} 82 83define i16 @var_ctlz_i16u(i16 %a) { 84; NOLZCNT-LABEL: 'var_ctlz_i16u' 85; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 true) 86; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i16 %ctlz 87; 88; LZCNT-LABEL: 'var_ctlz_i16u' 89; LZCNT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 true) 90; LZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i16 %ctlz 91; 92 %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 1) 93 ret i16 %ctlz 94} 95 96define i8 @var_ctlz_i8(i8 %a) { 97; NOLZCNT-LABEL: 'var_ctlz_i8' 98; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 false) 99; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i8 %ctlz 100; 101; LZCNT-LABEL: 'var_ctlz_i8' 102; LZCNT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 false) 103; LZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i8 %ctlz 104; 105 %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 0) 106 ret i8 %ctlz 107} 108 109define i8 @var_ctlz_i8u(i8 %a) { 110; NOLZCNT-LABEL: 'var_ctlz_i8u' 111; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 true) 112; NOLZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i8 %ctlz 113; 114; LZCNT-LABEL: 'var_ctlz_i8u' 115; LZCNT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 true) 116; LZCNT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i8 %ctlz 117; 118 %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 1) 119 ret i8 %ctlz 120} 121 122; Verify the cost of vector leading zero count instructions. 123 124declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1) 125declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1) 126declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>, i1) 127declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>, i1) 128 129declare <4 x i64> @llvm.ctlz.v4i64(<4 x i64>, i1) 130declare <8 x i32> @llvm.ctlz.v8i32(<8 x i32>, i1) 131declare <16 x i16> @llvm.ctlz.v16i16(<16 x i16>, i1) 132declare <32 x i8> @llvm.ctlz.v32i8(<32 x i8>, i1) 133 134declare <8 x i64> @llvm.ctlz.v8i64(<8 x i64>, i1) 135declare <16 x i32> @llvm.ctlz.v16i32(<16 x i32>, i1) 136declare <32 x i16> @llvm.ctlz.v32i16(<32 x i16>, i1) 137declare <64 x i8> @llvm.ctlz.v64i8(<64 x i8>, i1) 138 139define <2 x i64> @var_ctlz_v2i64(<2 x i64> %a) { 140; SSE2-LABEL: 'var_ctlz_v2i64' 141; SSE2-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false) 142; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz 143; 144; SSE42-LABEL: 'var_ctlz_v2i64' 145; SSE42-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false) 146; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz 147; 148; AVX-LABEL: 'var_ctlz_v2i64' 149; AVX-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false) 150; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz 151; 152; AVX512-LABEL: 'var_ctlz_v2i64' 153; AVX512-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false) 154; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz 155; 156; AVX512CD-LABEL: 'var_ctlz_v2i64' 157; AVX512CD-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false) 158; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz 159; 160 %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 0) 161 ret <2 x i64> %ctlz 162} 163 164define <2 x i64> @var_ctlz_v2i64u(<2 x i64> %a) { 165; SSE2-LABEL: 'var_ctlz_v2i64u' 166; SSE2-NEXT: Cost Model: Found an estimated cost of 25 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true) 167; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz 168; 169; SSE42-LABEL: 'var_ctlz_v2i64u' 170; SSE42-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true) 171; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz 172; 173; AVX-LABEL: 'var_ctlz_v2i64u' 174; AVX-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true) 175; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz 176; 177; AVX512-LABEL: 'var_ctlz_v2i64u' 178; AVX512-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true) 179; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz 180; 181; AVX512CD-LABEL: 'var_ctlz_v2i64u' 182; AVX512CD-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true) 183; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz 184; 185 %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 1) 186 ret <2 x i64> %ctlz 187} 188 189define <4 x i64> @var_ctlz_v4i64(<4 x i64> %a) { 190; SSE2-LABEL: 'var_ctlz_v4i64' 191; SSE2-NEXT: Cost Model: Found an estimated cost of 50 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false) 192; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz 193; 194; SSE42-LABEL: 'var_ctlz_v4i64' 195; SSE42-NEXT: Cost Model: Found an estimated cost of 46 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false) 196; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz 197; 198; AVX1-LABEL: 'var_ctlz_v4i64' 199; AVX1-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false) 200; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz 201; 202; AVX2-LABEL: 'var_ctlz_v4i64' 203; AVX2-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false) 204; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz 205; 206; AVX512-LABEL: 'var_ctlz_v4i64' 207; AVX512-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false) 208; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz 209; 210; AVX512CD-LABEL: 'var_ctlz_v4i64' 211; AVX512CD-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false) 212; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz 213; 214 %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 0) 215 ret <4 x i64> %ctlz 216} 217 218define <4 x i64> @var_ctlz_v4i64u(<4 x i64> %a) { 219; SSE2-LABEL: 'var_ctlz_v4i64u' 220; SSE2-NEXT: Cost Model: Found an estimated cost of 50 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true) 221; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz 222; 223; SSE42-LABEL: 'var_ctlz_v4i64u' 224; SSE42-NEXT: Cost Model: Found an estimated cost of 46 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true) 225; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz 226; 227; AVX1-LABEL: 'var_ctlz_v4i64u' 228; AVX1-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true) 229; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz 230; 231; AVX2-LABEL: 'var_ctlz_v4i64u' 232; AVX2-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true) 233; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz 234; 235; AVX512-LABEL: 'var_ctlz_v4i64u' 236; AVX512-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true) 237; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz 238; 239; AVX512CD-LABEL: 'var_ctlz_v4i64u' 240; AVX512CD-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true) 241; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz 242; 243 %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 1) 244 ret <4 x i64> %ctlz 245} 246 247define <8 x i64> @var_ctlz_v8i64(<8 x i64> %a) { 248; SSE2-LABEL: 'var_ctlz_v8i64' 249; SSE2-NEXT: Cost Model: Found an estimated cost of 100 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false) 250; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 251; 252; SSE42-LABEL: 'var_ctlz_v8i64' 253; SSE42-NEXT: Cost Model: Found an estimated cost of 92 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false) 254; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 255; 256; AVX1-LABEL: 'var_ctlz_v8i64' 257; AVX1-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false) 258; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 259; 260; AVX2-LABEL: 'var_ctlz_v8i64' 261; AVX2-NEXT: Cost Model: Found an estimated cost of 46 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false) 262; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 263; 264; AVX512F-LABEL: 'var_ctlz_v8i64' 265; AVX512F-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false) 266; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 267; 268; AVX512BW-LABEL: 'var_ctlz_v8i64' 269; AVX512BW-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false) 270; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 271; 272; AVX512CD-LABEL: 'var_ctlz_v8i64' 273; AVX512CD-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false) 274; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 275; 276 %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 0) 277 ret <8 x i64> %ctlz 278} 279 280define <8 x i64> @var_ctlz_v8i64u(<8 x i64> %a) { 281; SSE2-LABEL: 'var_ctlz_v8i64u' 282; SSE2-NEXT: Cost Model: Found an estimated cost of 100 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true) 283; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 284; 285; SSE42-LABEL: 'var_ctlz_v8i64u' 286; SSE42-NEXT: Cost Model: Found an estimated cost of 92 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true) 287; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 288; 289; AVX1-LABEL: 'var_ctlz_v8i64u' 290; AVX1-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true) 291; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 292; 293; AVX2-LABEL: 'var_ctlz_v8i64u' 294; AVX2-NEXT: Cost Model: Found an estimated cost of 46 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true) 295; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 296; 297; AVX512F-LABEL: 'var_ctlz_v8i64u' 298; AVX512F-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true) 299; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 300; 301; AVX512BW-LABEL: 'var_ctlz_v8i64u' 302; AVX512BW-NEXT: Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true) 303; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 304; 305; AVX512CD-LABEL: 'var_ctlz_v8i64u' 306; AVX512CD-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true) 307; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz 308; 309 %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 1) 310 ret <8 x i64> %ctlz 311} 312 313define <4 x i32> @var_ctlz_v4i32(<4 x i32> %a) { 314; SSE2-LABEL: 'var_ctlz_v4i32' 315; SSE2-NEXT: Cost Model: Found an estimated cost of 26 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false) 316; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz 317; 318; SSE42-LABEL: 'var_ctlz_v4i32' 319; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false) 320; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz 321; 322; AVX-LABEL: 'var_ctlz_v4i32' 323; AVX-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false) 324; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz 325; 326; AVX512-LABEL: 'var_ctlz_v4i32' 327; AVX512-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false) 328; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz 329; 330; AVX512CD-LABEL: 'var_ctlz_v4i32' 331; AVX512CD-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false) 332; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz 333; 334 %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 0) 335 ret <4 x i32> %ctlz 336} 337 338define <4 x i32> @var_ctlz_v4i32u(<4 x i32> %a) { 339; SSE2-LABEL: 'var_ctlz_v4i32u' 340; SSE2-NEXT: Cost Model: Found an estimated cost of 26 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true) 341; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz 342; 343; SSE42-LABEL: 'var_ctlz_v4i32u' 344; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true) 345; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz 346; 347; AVX-LABEL: 'var_ctlz_v4i32u' 348; AVX-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true) 349; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz 350; 351; AVX512-LABEL: 'var_ctlz_v4i32u' 352; AVX512-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true) 353; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz 354; 355; AVX512CD-LABEL: 'var_ctlz_v4i32u' 356; AVX512CD-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true) 357; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz 358; 359 %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 1) 360 ret <4 x i32> %ctlz 361} 362 363define <8 x i32> @var_ctlz_v8i32(<8 x i32> %a) { 364; SSE2-LABEL: 'var_ctlz_v8i32' 365; SSE2-NEXT: Cost Model: Found an estimated cost of 52 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false) 366; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz 367; 368; SSE42-LABEL: 'var_ctlz_v8i32' 369; SSE42-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false) 370; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz 371; 372; AVX1-LABEL: 'var_ctlz_v8i32' 373; AVX1-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false) 374; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz 375; 376; AVX2-LABEL: 'var_ctlz_v8i32' 377; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false) 378; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz 379; 380; AVX512-LABEL: 'var_ctlz_v8i32' 381; AVX512-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false) 382; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz 383; 384; AVX512CD-LABEL: 'var_ctlz_v8i32' 385; AVX512CD-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false) 386; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz 387; 388 %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 0) 389 ret <8 x i32> %ctlz 390} 391 392define <8 x i32> @var_ctlz_v8i32u(<8 x i32> %a) { 393; SSE2-LABEL: 'var_ctlz_v8i32u' 394; SSE2-NEXT: Cost Model: Found an estimated cost of 52 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true) 395; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz 396; 397; SSE42-LABEL: 'var_ctlz_v8i32u' 398; SSE42-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true) 399; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz 400; 401; AVX1-LABEL: 'var_ctlz_v8i32u' 402; AVX1-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true) 403; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz 404; 405; AVX2-LABEL: 'var_ctlz_v8i32u' 406; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true) 407; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz 408; 409; AVX512-LABEL: 'var_ctlz_v8i32u' 410; AVX512-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true) 411; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz 412; 413; AVX512CD-LABEL: 'var_ctlz_v8i32u' 414; AVX512CD-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true) 415; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz 416; 417 %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 1) 418 ret <8 x i32> %ctlz 419} 420 421define <16 x i32> @var_ctlz_v16i32(<16 x i32> %a) { 422; SSE2-LABEL: 'var_ctlz_v16i32' 423; SSE2-NEXT: Cost Model: Found an estimated cost of 104 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false) 424; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 425; 426; SSE42-LABEL: 'var_ctlz_v16i32' 427; SSE42-NEXT: Cost Model: Found an estimated cost of 72 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false) 428; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 429; 430; AVX1-LABEL: 'var_ctlz_v16i32' 431; AVX1-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false) 432; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 433; 434; AVX2-LABEL: 'var_ctlz_v16i32' 435; AVX2-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false) 436; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 437; 438; AVX512F-LABEL: 'var_ctlz_v16i32' 439; AVX512F-NEXT: Cost Model: Found an estimated cost of 35 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false) 440; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 441; 442; AVX512BW-LABEL: 'var_ctlz_v16i32' 443; AVX512BW-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false) 444; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 445; 446; AVX512CD-LABEL: 'var_ctlz_v16i32' 447; AVX512CD-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false) 448; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 449; 450 %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 0) 451 ret <16 x i32> %ctlz 452} 453 454define <16 x i32> @var_ctlz_v16i32u(<16 x i32> %a) { 455; SSE2-LABEL: 'var_ctlz_v16i32u' 456; SSE2-NEXT: Cost Model: Found an estimated cost of 104 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true) 457; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 458; 459; SSE42-LABEL: 'var_ctlz_v16i32u' 460; SSE42-NEXT: Cost Model: Found an estimated cost of 72 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true) 461; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 462; 463; AVX1-LABEL: 'var_ctlz_v16i32u' 464; AVX1-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true) 465; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 466; 467; AVX2-LABEL: 'var_ctlz_v16i32u' 468; AVX2-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true) 469; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 470; 471; AVX512F-LABEL: 'var_ctlz_v16i32u' 472; AVX512F-NEXT: Cost Model: Found an estimated cost of 35 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true) 473; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 474; 475; AVX512BW-LABEL: 'var_ctlz_v16i32u' 476; AVX512BW-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true) 477; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 478; 479; AVX512CD-LABEL: 'var_ctlz_v16i32u' 480; AVX512CD-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true) 481; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz 482; 483 %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 1) 484 ret <16 x i32> %ctlz 485} 486 487define <8 x i16> @var_ctlz_v8i16(<8 x i16> %a) { 488; SSE2-LABEL: 'var_ctlz_v8i16' 489; SSE2-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false) 490; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz 491; 492; SSE42-LABEL: 'var_ctlz_v8i16' 493; SSE42-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false) 494; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz 495; 496; AVX-LABEL: 'var_ctlz_v8i16' 497; AVX-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false) 498; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz 499; 500; AVX512-LABEL: 'var_ctlz_v8i16' 501; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false) 502; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz 503; 504; AVX512CD-LABEL: 'var_ctlz_v8i16' 505; AVX512CD-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false) 506; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz 507; 508 %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 0) 509 ret <8 x i16> %ctlz 510} 511 512define <8 x i16> @var_ctlz_v8i16u(<8 x i16> %a) { 513; SSE2-LABEL: 'var_ctlz_v8i16u' 514; SSE2-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true) 515; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz 516; 517; SSE42-LABEL: 'var_ctlz_v8i16u' 518; SSE42-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true) 519; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz 520; 521; AVX-LABEL: 'var_ctlz_v8i16u' 522; AVX-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true) 523; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz 524; 525; AVX512-LABEL: 'var_ctlz_v8i16u' 526; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true) 527; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz 528; 529; AVX512CD-LABEL: 'var_ctlz_v8i16u' 530; AVX512CD-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true) 531; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz 532; 533 %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 1) 534 ret <8 x i16> %ctlz 535} 536 537define <16 x i16> @var_ctlz_v16i16(<16 x i16> %a) { 538; SSE2-LABEL: 'var_ctlz_v16i16' 539; SSE2-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false) 540; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz 541; 542; SSE42-LABEL: 'var_ctlz_v16i16' 543; SSE42-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false) 544; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz 545; 546; AVX1-LABEL: 'var_ctlz_v16i16' 547; AVX1-NEXT: Cost Model: Found an estimated cost of 30 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false) 548; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz 549; 550; AVX2-LABEL: 'var_ctlz_v16i16' 551; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false) 552; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz 553; 554; AVX512-LABEL: 'var_ctlz_v16i16' 555; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false) 556; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz 557; 558; AVX512CD-LABEL: 'var_ctlz_v16i16' 559; AVX512CD-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false) 560; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz 561; 562 %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 0) 563 ret <16 x i16> %ctlz 564} 565 566define <16 x i16> @var_ctlz_v16i16u(<16 x i16> %a) { 567; SSE2-LABEL: 'var_ctlz_v16i16u' 568; SSE2-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true) 569; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz 570; 571; SSE42-LABEL: 'var_ctlz_v16i16u' 572; SSE42-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true) 573; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz 574; 575; AVX1-LABEL: 'var_ctlz_v16i16u' 576; AVX1-NEXT: Cost Model: Found an estimated cost of 30 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true) 577; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz 578; 579; AVX2-LABEL: 'var_ctlz_v16i16u' 580; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true) 581; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz 582; 583; AVX512-LABEL: 'var_ctlz_v16i16u' 584; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true) 585; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz 586; 587; AVX512CD-LABEL: 'var_ctlz_v16i16u' 588; AVX512CD-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true) 589; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz 590; 591 %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 1) 592 ret <16 x i16> %ctlz 593} 594 595define <32 x i16> @var_ctlz_v32i16(<32 x i16> %a) { 596; SSE2-LABEL: 'var_ctlz_v32i16' 597; SSE2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false) 598; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 599; 600; SSE42-LABEL: 'var_ctlz_v32i16' 601; SSE42-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false) 602; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 603; 604; AVX1-LABEL: 'var_ctlz_v32i16' 605; AVX1-NEXT: Cost Model: Found an estimated cost of 60 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false) 606; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 607; 608; AVX2-LABEL: 'var_ctlz_v32i16' 609; AVX2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false) 610; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 611; 612; AVX512F-LABEL: 'var_ctlz_v32i16' 613; AVX512F-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false) 614; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 615; 616; AVX512BW-LABEL: 'var_ctlz_v32i16' 617; AVX512BW-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false) 618; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 619; 620; AVX512CD-LABEL: 'var_ctlz_v32i16' 621; AVX512CD-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false) 622; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 623; 624 %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 0) 625 ret <32 x i16> %ctlz 626} 627 628define <32 x i16> @var_ctlz_v32i16u(<32 x i16> %a) { 629; SSE2-LABEL: 'var_ctlz_v32i16u' 630; SSE2-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true) 631; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 632; 633; SSE42-LABEL: 'var_ctlz_v32i16u' 634; SSE42-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true) 635; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 636; 637; AVX1-LABEL: 'var_ctlz_v32i16u' 638; AVX1-NEXT: Cost Model: Found an estimated cost of 60 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true) 639; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 640; 641; AVX2-LABEL: 'var_ctlz_v32i16u' 642; AVX2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true) 643; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 644; 645; AVX512F-LABEL: 'var_ctlz_v32i16u' 646; AVX512F-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true) 647; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 648; 649; AVX512BW-LABEL: 'var_ctlz_v32i16u' 650; AVX512BW-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true) 651; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 652; 653; AVX512CD-LABEL: 'var_ctlz_v32i16u' 654; AVX512CD-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true) 655; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz 656; 657 %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 1) 658 ret <32 x i16> %ctlz 659} 660 661define <16 x i8> @var_ctlz_v16i8(<16 x i8> %a) { 662; SSE2-LABEL: 'var_ctlz_v16i8' 663; SSE2-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false) 664; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz 665; 666; SSE42-LABEL: 'var_ctlz_v16i8' 667; SSE42-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false) 668; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz 669; 670; AVX-LABEL: 'var_ctlz_v16i8' 671; AVX-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false) 672; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz 673; 674; AVX512-LABEL: 'var_ctlz_v16i8' 675; AVX512-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false) 676; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz 677; 678; AVX512CD-LABEL: 'var_ctlz_v16i8' 679; AVX512CD-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false) 680; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz 681; 682 %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 0) 683 ret <16 x i8> %ctlz 684} 685 686define <16 x i8> @var_ctlz_v16i8u(<16 x i8> %a) { 687; SSE2-LABEL: 'var_ctlz_v16i8u' 688; SSE2-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true) 689; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz 690; 691; SSE42-LABEL: 'var_ctlz_v16i8u' 692; SSE42-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true) 693; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz 694; 695; AVX-LABEL: 'var_ctlz_v16i8u' 696; AVX-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true) 697; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz 698; 699; AVX512-LABEL: 'var_ctlz_v16i8u' 700; AVX512-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true) 701; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz 702; 703; AVX512CD-LABEL: 'var_ctlz_v16i8u' 704; AVX512CD-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true) 705; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz 706; 707 %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 1) 708 ret <16 x i8> %ctlz 709} 710 711define <32 x i8> @var_ctlz_v32i8(<32 x i8> %a) { 712; SSE2-LABEL: 'var_ctlz_v32i8' 713; SSE2-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false) 714; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz 715; 716; SSE42-LABEL: 'var_ctlz_v32i8' 717; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false) 718; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz 719; 720; AVX1-LABEL: 'var_ctlz_v32i8' 721; AVX1-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false) 722; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz 723; 724; AVX2-LABEL: 'var_ctlz_v32i8' 725; AVX2-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false) 726; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz 727; 728; AVX512-LABEL: 'var_ctlz_v32i8' 729; AVX512-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false) 730; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz 731; 732; AVX512CD-LABEL: 'var_ctlz_v32i8' 733; AVX512CD-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false) 734; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz 735; 736 %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 0) 737 ret <32 x i8> %ctlz 738} 739 740define <32 x i8> @var_ctlz_v32i8u(<32 x i8> %a) { 741; SSE2-LABEL: 'var_ctlz_v32i8u' 742; SSE2-NEXT: Cost Model: Found an estimated cost of 34 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true) 743; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz 744; 745; SSE42-LABEL: 'var_ctlz_v32i8u' 746; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true) 747; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz 748; 749; AVX1-LABEL: 'var_ctlz_v32i8u' 750; AVX1-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true) 751; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz 752; 753; AVX2-LABEL: 'var_ctlz_v32i8u' 754; AVX2-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true) 755; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz 756; 757; AVX512-LABEL: 'var_ctlz_v32i8u' 758; AVX512-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true) 759; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz 760; 761; AVX512CD-LABEL: 'var_ctlz_v32i8u' 762; AVX512CD-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true) 763; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz 764; 765 %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 1) 766 ret <32 x i8> %ctlz 767} 768 769define <64 x i8> @var_ctlz_v64i8(<64 x i8> %a) { 770; SSE2-LABEL: 'var_ctlz_v64i8' 771; SSE2-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false) 772; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 773; 774; SSE42-LABEL: 'var_ctlz_v64i8' 775; SSE42-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false) 776; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 777; 778; AVX1-LABEL: 'var_ctlz_v64i8' 779; AVX1-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false) 780; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 781; 782; AVX2-LABEL: 'var_ctlz_v64i8' 783; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false) 784; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 785; 786; AVX512F-LABEL: 'var_ctlz_v64i8' 787; AVX512F-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false) 788; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 789; 790; AVX512BW-LABEL: 'var_ctlz_v64i8' 791; AVX512BW-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false) 792; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 793; 794; AVX512CD-LABEL: 'var_ctlz_v64i8' 795; AVX512CD-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false) 796; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 797; 798 %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 0) 799 ret <64 x i8> %ctlz 800} 801 802define <64 x i8> @var_ctlz_v64i8u(<64 x i8> %a) { 803; SSE2-LABEL: 'var_ctlz_v64i8u' 804; SSE2-NEXT: Cost Model: Found an estimated cost of 68 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true) 805; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 806; 807; SSE42-LABEL: 'var_ctlz_v64i8u' 808; SSE42-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true) 809; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 810; 811; AVX1-LABEL: 'var_ctlz_v64i8u' 812; AVX1-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true) 813; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 814; 815; AVX2-LABEL: 'var_ctlz_v64i8u' 816; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true) 817; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 818; 819; AVX512F-LABEL: 'var_ctlz_v64i8u' 820; AVX512F-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true) 821; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 822; 823; AVX512BW-LABEL: 'var_ctlz_v64i8u' 824; AVX512BW-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true) 825; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 826; 827; AVX512CD-LABEL: 'var_ctlz_v64i8u' 828; AVX512CD-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true) 829; AVX512CD-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz 830; 831 %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 1) 832 ret <64 x i8> %ctlz 833} 834