1; RUN: opt -mtriple=amdgcn-- -analyze -divergence -use-gpu-divergence-analysis %s | FileCheck %s
2
3; CHECK: DIVERGENT: %orig = atomicrmw xchg i32* %ptr, i32 %val seq_cst
4define i32 @test1(i32* %ptr, i32 %val) #0 {
5  %orig = atomicrmw xchg i32* %ptr, i32 %val seq_cst
6  ret i32 %orig
7}
8
9; CHECK: DIVERGENT: %orig = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
10define {i32, i1} @test2(i32* %ptr, i32 %cmp, i32 %new) {
11  %orig = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
12  ret {i32, i1} %orig
13}
14
15; CHECK: DIVERGENT: %ret = call i32 @llvm.amdgcn.atomic.inc.i32.p1i32(i32 addrspace(1)* %ptr, i32 %val, i32 0, i32 0, i1 false)
16define i32 @test_atomic_inc_i32(i32 addrspace(1)* %ptr, i32 %val) #0 {
17  %ret = call i32 @llvm.amdgcn.atomic.inc.i32.p1i32(i32 addrspace(1)* %ptr, i32 %val, i32 0, i32 0, i1 false)
18  ret i32 %ret
19}
20
21; CHECK: DIVERGENT: %ret = call i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* %ptr, i64 %val, i32 0, i32 0, i1 false)
22define i64 @test_atomic_inc_i64(i64 addrspace(1)* %ptr, i64 %val) #0 {
23  %ret = call i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* %ptr, i64 %val, i32 0, i32 0, i1 false)
24  ret i64 %ret
25}
26
27; CHECK: DIVERGENT: %ret = call i32 @llvm.amdgcn.atomic.dec.i32.p1i32(i32 addrspace(1)* %ptr, i32 %val, i32 0, i32 0, i1 false)
28define i32 @test_atomic_dec_i32(i32 addrspace(1)* %ptr, i32 %val) #0 {
29  %ret = call i32 @llvm.amdgcn.atomic.dec.i32.p1i32(i32 addrspace(1)* %ptr, i32 %val, i32 0, i32 0, i1 false)
30  ret i32 %ret
31}
32
33; CHECK: DIVERGENT: %ret = call i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* %ptr, i64 %val, i32 0, i32 0, i1 false)
34define i64 @test_atomic_dec_i64(i64 addrspace(1)* %ptr, i64 %val) #0 {
35  %ret = call i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* %ptr, i64 %val, i32 0, i32 0, i1 false)
36  ret i64 %ret
37}
38
39declare i32 @llvm.amdgcn.atomic.inc.i32.p1i32(i32 addrspace(1)* nocapture, i32, i32, i32, i1) #1
40declare i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* nocapture, i64, i32, i32, i1) #1
41declare i32 @llvm.amdgcn.atomic.dec.i32.p1i32(i32 addrspace(1)* nocapture, i32, i32, i32, i1) #1
42declare i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* nocapture, i64, i32, i32, i1) #1
43
44attributes #0 = { nounwind }
45attributes #1 = { nounwind argmemonly }
46