1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=arm64-unknown-unknown -global-isel -global-isel-abort=1 -O0 -run-pass=legalizer %s -o - | FileCheck %s
3--- |
4  target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5  target triple = "aarch64"
6
7  define i8* @test_simple_alloca(i32 %numelts) {
8    %addr = alloca i8, i32 %numelts
9    ret i8* %addr
10  }
11
12  define i8* @test_aligned_alloca(i32 %numelts) {
13    %addr = alloca i8, i32 %numelts, align 32
14    ret i8* %addr
15  }
16
17  define i128* @test_natural_alloca(i32 %numelts) {
18    %addr = alloca i128, i32 %numelts
19    ret i128* %addr
20  }
21
22...
23---
24name:            test_simple_alloca
25alignment:       4
26tracksRegLiveness: true
27liveins:
28  - { reg: '$w0' }
29frameInfo:
30  maxAlignment:    1
31stack:
32  - { id: 0, name: addr, type: variable-sized, alignment: 1 }
33machineFunctionInfo: {}
34body:             |
35  bb.1 (%ir-block.0):
36    liveins: $w0
37
38    ; CHECK-LABEL: name: test_simple_alloca
39    ; CHECK: liveins: $w0
40    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
41    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
42    ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32)
43    ; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[ZEXT]], [[C]]
44    ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 15
45    ; CHECK: [[ADD:%[0-9]+]]:_(s64) = nuw G_ADD [[MUL]], [[C1]]
46    ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -16
47    ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[ADD]], [[C2]]
48    ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $sp
49    ; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p0)
50    ; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[PTRTOINT]], [[AND]]
51    ; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[SUB]](s64)
52    ; CHECK: $sp = COPY [[INTTOPTR]](p0)
53    ; CHECK: [[COPY2:%[0-9]+]]:_(p0) = COPY [[INTTOPTR]](p0)
54    ; CHECK: $x0 = COPY [[COPY2]](p0)
55    ; CHECK: RET_ReallyLR implicit $x0
56    %0:_(s32) = COPY $w0
57    %3:_(s64) = G_CONSTANT i64 1
58    %1:_(s64) = G_ZEXT %0(s32)
59    %2:_(s64) = G_MUL %1, %3
60    %4:_(s64) = G_CONSTANT i64 15
61    %5:_(s64) = nuw G_ADD %2, %4
62    %6:_(s64) = G_CONSTANT i64 -16
63    %7:_(s64) = G_AND %5, %6
64    %8:_(p0) = G_DYN_STACKALLOC %7(s64), 0
65    $x0 = COPY %8(p0)
66    RET_ReallyLR implicit $x0
67
68...
69---
70name:            test_aligned_alloca
71alignment:       4
72tracksRegLiveness: true
73liveins:
74  - { reg: '$w0' }
75frameInfo:
76  maxAlignment:    32
77stack:
78  - { id: 0, name: addr, type: variable-sized, alignment: 32 }
79machineFunctionInfo: {}
80body:             |
81  bb.1 (%ir-block.0):
82    liveins: $w0
83
84    ; CHECK-LABEL: name: test_aligned_alloca
85    ; CHECK: liveins: $w0
86    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
87    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
88    ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32)
89    ; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[ZEXT]], [[C]]
90    ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 15
91    ; CHECK: [[ADD:%[0-9]+]]:_(s64) = nuw G_ADD [[MUL]], [[C1]]
92    ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -16
93    ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[ADD]], [[C2]]
94    ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $sp
95    ; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p0)
96    ; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[PTRTOINT]], [[AND]]
97    ; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 -32
98    ; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SUB]], [[C3]]
99    ; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[AND1]](s64)
100    ; CHECK: $sp = COPY [[INTTOPTR]](p0)
101    ; CHECK: [[COPY2:%[0-9]+]]:_(p0) = COPY [[INTTOPTR]](p0)
102    ; CHECK: $x0 = COPY [[COPY2]](p0)
103    ; CHECK: RET_ReallyLR implicit $x0
104    %0:_(s32) = COPY $w0
105    %3:_(s64) = G_CONSTANT i64 1
106    %1:_(s64) = G_ZEXT %0(s32)
107    %2:_(s64) = G_MUL %1, %3
108    %4:_(s64) = G_CONSTANT i64 15
109    %5:_(s64) = nuw G_ADD %2, %4
110    %6:_(s64) = G_CONSTANT i64 -16
111    %7:_(s64) = G_AND %5, %6
112    %8:_(p0) = G_DYN_STACKALLOC %7(s64), 32
113    $x0 = COPY %8(p0)
114    RET_ReallyLR implicit $x0
115
116...
117---
118name:            test_natural_alloca
119alignment:       4
120tracksRegLiveness: true
121liveins:
122  - { reg: '$w0' }
123frameInfo:
124  maxAlignment:    1
125stack:
126  - { id: 0, name: addr, type: variable-sized, alignment: 1 }
127machineFunctionInfo: {}
128body:             |
129  bb.1 (%ir-block.0):
130    liveins: $w0
131
132    ; CHECK-LABEL: name: test_natural_alloca
133    ; CHECK: liveins: $w0
134    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
135    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
136    ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32)
137    ; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[ZEXT]], [[C]]
138    ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 15
139    ; CHECK: [[ADD:%[0-9]+]]:_(s64) = nuw G_ADD [[MUL]], [[C1]]
140    ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -16
141    ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[ADD]], [[C2]]
142    ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $sp
143    ; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p0)
144    ; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[PTRTOINT]], [[AND]]
145    ; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[SUB]](s64)
146    ; CHECK: $sp = COPY [[INTTOPTR]](p0)
147    ; CHECK: [[COPY2:%[0-9]+]]:_(p0) = COPY [[INTTOPTR]](p0)
148    ; CHECK: $x0 = COPY [[COPY2]](p0)
149    ; CHECK: RET_ReallyLR implicit $x0
150    %0:_(s32) = COPY $w0
151    %3:_(s64) = G_CONSTANT i64 16
152    %1:_(s64) = G_ZEXT %0(s32)
153    %2:_(s64) = G_MUL %1, %3
154    %4:_(s64) = G_CONSTANT i64 15
155    %5:_(s64) = nuw G_ADD %2, %4
156    %6:_(s64) = G_CONSTANT i64 -16
157    %7:_(s64) = G_AND %5, %6
158    %8:_(p0) = G_DYN_STACKALLOC %7(s64), 0
159    $x0 = COPY %8(p0)
160    RET_ReallyLR implicit $x0
161
162...
163