1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=aarch64-apple-ios -run-pass=localizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK 3 4# Test the localizer. 5 6--- | 7 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" 8 9 define void @local_use() { ret void } 10 define void @non_local_1use() { ret void } 11 define void @non_local_2uses() { ret void } 12 define void @non_local_phi_use() { ret void } 13 define void @non_local_phi_use_followed_by_use() { ret void } 14 define void @non_local_phi_use_followed_by_use_fi() { ret void } 15 define void @float_non_local_phi_use_followed_by_use_fi() { ret void } 16 define void @non_local_phi() { ret void } 17 define void @non_local_label() { ret void } 18 19 @var1 = common global i32 0, align 4 20 @var2 = common global i32 0, align 4 21 @var3 = common global i32 0, align 4 22 @var4 = common global i32 0, align 4 23 24 define i32 @intrablock_with_globalvalue() { 25 entry: 26 %0 = load i32, i32* @var1, align 4 27 %cmp = icmp eq i32 %0, 1 28 br i1 %cmp, label %if.then, label %if.end 29 30 if.then: 31 store i32 2, i32* @var2, align 4 32 store i32 3, i32* @var1, align 4 33 store i32 2, i32* @var3, align 4 34 store i32 3, i32* @var1, align 4 35 br label %if.end 36 37 if.end: 38 ret i32 0 39 } 40 define i32 @adrp_add() { 41 entry: 42 %0 = load i32, i32* @var1, align 4 43 %cmp = icmp eq i32 %0, 1 44 br i1 %cmp, label %if.then, label %if.end 45 46 if.then: 47 store i32 2, i32* @var2, align 4 48 store i32 3, i32* @var1, align 4 49 store i32 2, i32* @var3, align 4 50 store i32 3, i32* @var1, align 4 51 br label %if.end 52 53 if.end: 54 ret i32 0 55 } 56 57 define void @test_inttoptr() { ret void } 58 define void @many_local_use_intra_block() { ret void } 59 60... 61 62--- 63name: local_use 64legalized: true 65regBankSelected: true 66body: | 67 bb.0: 68 ; CHECK-LABEL: name: local_use 69 ; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 70 ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]] 71 %0:gpr(s32) = G_CONSTANT i32 1 72 %1:gpr(s32) = G_ADD %0, %0 73... 74 75--- 76name: non_local_1use 77legalized: true 78regBankSelected: true 79body: | 80 ; CHECK-LABEL: name: non_local_1use 81 ; CHECK: bb.0: 82 ; CHECK: successors: %bb.1(0x80000000) 83 ; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 84 ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]] 85 ; CHECK: bb.1: 86 ; CHECK: [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 87 ; CHECK: [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[C1]], [[ADD]] 88 89 ; Existing registers should be left untouched 90 ; The newly created reg should be on the same regbank/regclass as its origin. 91 92 bb.0: 93 successors: %bb.1 94 95 %0:gpr(s32) = G_CONSTANT i32 1 96 %1:gpr(s32) = G_ADD %0, %0 97 98 bb.1: 99 %2:gpr(s32) = G_ADD %0, %1 100... 101 102--- 103name: non_local_2uses 104legalized: true 105regBankSelected: true 106body: | 107 ; CHECK-LABEL: name: non_local_2uses 108 ; CHECK: bb.0: 109 ; CHECK: successors: %bb.1(0x80000000) 110 ; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 111 ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]] 112 ; CHECK: bb.1: 113 ; CHECK: [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 114 ; CHECK: [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[C1]], [[C1]] 115 116 ; Existing registers should be left untouched 117 ; The newly created reg should be on the same regbank/regclass as its origin. 118 119 bb.0: 120 successors: %bb.1 121 122 %0:gpr(s32) = G_CONSTANT i32 1 123 %1:gpr(s32) = G_ADD %0, %0 124 125 bb.1: 126 %2:gpr(s32) = G_ADD %0, %0 127... 128 129--- 130name: non_local_phi_use 131legalized: true 132regBankSelected: true 133tracksRegLiveness: true 134body: | 135 ; CHECK-LABEL: name: non_local_phi_use 136 ; CHECK: bb.0: 137 ; CHECK: successors: %bb.1(0x80000000) 138 ; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 139 ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]] 140 ; CHECK: bb.1: 141 ; CHECK: successors: %bb.2(0x80000000) 142 ; CHECK: [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 143 ; CHECK: bb.2: 144 ; CHECK: [[PHI:%[0-9]+]]:gpr(s32) = PHI [[C1]](s32), %bb.1 145 ; CHECK: [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[PHI]], [[PHI]] 146 147 ; Existing registers should be left untouched 148 ; The newly created reg should be on the same regbank/regclass as its origin. 149 150 bb.0: 151 successors: %bb.1 152 153 %0:gpr(s32) = G_CONSTANT i32 1 154 %1:gpr(s32) = G_ADD %0, %0 155 156 bb.1: 157 successors: %bb.2 158 159 bb.2: 160 %3:gpr(s32) = PHI %0(s32), %bb.1 161 %2:gpr(s32) = G_ADD %3, %3 162... 163 164--- 165name: non_local_phi_use_followed_by_use 166legalized: true 167regBankSelected: true 168tracksRegLiveness: true 169body: | 170 ; CHECK-LABEL: name: non_local_phi_use_followed_by_use 171 ; CHECK: bb.0: 172 ; CHECK: successors: %bb.1(0x80000000) 173 ; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 174 ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]] 175 ; CHECK: bb.1: 176 ; CHECK: successors: %bb.2(0x80000000) 177 ; CHECK: [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 178 ; CHECK: bb.2: 179 ; CHECK: [[PHI:%[0-9]+]]:gpr(s32) = PHI [[C1]](s32), %bb.1 180 ; CHECK: [[C2:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 181 ; CHECK: [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[PHI]], [[C2]] 182 183 ; Existing registers should be left untouched 184 ; The newly created reg should be on the same regbank/regclass as its origin. 185 186 bb.0: 187 successors: %bb.1 188 189 %0:gpr(s32) = G_CONSTANT i32 1 190 %1:gpr(s32) = G_ADD %0, %0 191 192 bb.1: 193 successors: %bb.2 194 195 bb.2: 196 %3:gpr(s32) = PHI %0(s32), %bb.1 197 %2:gpr(s32) = G_ADD %3, %0 198... 199 200--- 201name: non_local_phi_use_followed_by_use_fi 202legalized: true 203regBankSelected: true 204tracksRegLiveness: true 205body: | 206 ; CHECK-LABEL: name: non_local_phi_use_followed_by_use_fi 207 ; CHECK: bb.0: 208 ; CHECK: successors: %bb.1(0x80000000) 209 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:gpr(s32) = G_FRAME_INDEX 1 210 ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[FRAME_INDEX]], [[FRAME_INDEX]] 211 ; CHECK: bb.1: 212 ; CHECK: successors: %bb.2(0x80000000) 213 ; CHECK: [[FRAME_INDEX1:%[0-9]+]]:gpr(s32) = G_FRAME_INDEX 1 214 ; CHECK: bb.2: 215 ; CHECK: [[PHI:%[0-9]+]]:gpr(s32) = PHI [[FRAME_INDEX1]](s32), %bb.1 216 ; CHECK: [[FRAME_INDEX2:%[0-9]+]]:gpr(s32) = G_FRAME_INDEX 1 217 ; CHECK: [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[PHI]], [[FRAME_INDEX2]] 218 219 ; Existing registers should be left untouched 220 ; The newly created reg should be on the same regbank/regclass as its origin. 221 222 bb.0: 223 successors: %bb.1 224 225 %0:gpr(s32) = G_FRAME_INDEX 1 226 %1:gpr(s32) = G_ADD %0, %0 227 228 bb.1: 229 successors: %bb.2 230 231 bb.2: 232 %3:gpr(s32) = PHI %0(s32), %bb.1 233 %2:gpr(s32) = G_ADD %3, %0 234... 235 236--- 237name: float_non_local_phi_use_followed_by_use_fi 238legalized: true 239regBankSelected: true 240tracksRegLiveness: true 241body: | 242 ; CHECK-LABEL: name: float_non_local_phi_use_followed_by_use_fi 243 ; CHECK: bb.0: 244 ; CHECK: successors: %bb.1(0x80000000) 245 ; CHECK: [[C:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 246 ; CHECK: [[FADD:%[0-9]+]]:fpr(s32) = G_FADD [[C]], [[C]] 247 ; CHECK: bb.1: 248 ; CHECK: successors: %bb.2(0x80000000) 249 ; CHECK: [[C1:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 250 ; CHECK: bb.2: 251 ; CHECK: [[PHI:%[0-9]+]]:fpr(s32) = PHI [[C1]](s32), %bb.1 252 ; CHECK: [[C2:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 253 ; CHECK: [[FADD1:%[0-9]+]]:fpr(s32) = G_FADD [[PHI]], [[C2]] 254 255 ; Existing registers should be left untouched 256 ; The newly created reg should be on the same regbank/regclass as its origin. 257 258 bb.0: 259 successors: %bb.1 260 261 %0:fpr(s32) = G_FCONSTANT float 1.0 262 %1:fpr(s32) = G_FADD %0, %0 263 264 bb.1: 265 successors: %bb.2 266 267 bb.2: 268 %3:fpr(s32) = PHI %0(s32), %bb.1 269 %2:fpr(s32) = G_FADD %3, %0 270... 271 272--- 273# Make sure we don't insert a constant before PHIs. 274# This used to happen for loops of one basic block. 275name: non_local_phi 276legalized: true 277regBankSelected: true 278tracksRegLiveness: true 279body: | 280 ; CHECK-LABEL: name: non_local_phi 281 ; CHECK: bb.0: 282 ; CHECK: successors: %bb.1(0x80000000) 283 ; CHECK: [[C:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 284 ; CHECK: [[FADD:%[0-9]+]]:fpr(s32) = G_FADD [[C]], [[C]] 285 ; CHECK: bb.1: 286 ; CHECK: successors: %bb.1(0x80000000) 287 ; CHECK: [[PHI:%[0-9]+]]:fpr(s32) = PHI [[FADD]](s32), %bb.0, %4(s32), %bb.1 288 ; CHECK: [[C1:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 289 ; CHECK: [[FADD1:%[0-9]+]]:fpr(s32) = G_FADD [[PHI]], [[FADD]] 290 ; CHECK: G_BR %bb.1 291 292 ; Existing registers should be left untouched 293 ; The newly created reg should be on the same regbank/regclass as its origin. 294 295 bb.0: 296 successors: %bb.1 297 298 %0:fpr(s32) = G_FCONSTANT float 1.0 299 %1:fpr(s32) = G_FADD %0, %0 300 301 bb.1: 302 successors: %bb.1 303 304 %3:fpr(s32) = PHI %1(s32), %bb.0, %0(s32), %bb.1 305 %2:fpr(s32) = G_FADD %3, %1 306 G_BR %bb.1 307... 308 309--- 310# Make sure we don't insert a constant before EH_LABELs. 311name: non_local_label 312legalized: true 313regBankSelected: true 314tracksRegLiveness: true 315body: | 316 ; CHECK-LABEL: name: non_local_label 317 ; CHECK: bb.0: 318 ; CHECK: successors: %bb.1(0x80000000) 319 ; CHECK: liveins: $s0 320 ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 321 ; CHECK: [[C:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 322 ; CHECK: bb.1: 323 ; CHECK: successors: %bb.1(0x80000000) 324 ; CHECK: EH_LABEL 1 325 ; CHECK: [[C1:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 326 ; CHECK: [[FADD:%[0-9]+]]:fpr(s32) = G_FADD [[COPY]], [[C1]] 327 ; CHECK: G_BR %bb.1 328 329 ; Existing registers should be left untouched 330 ; The newly created reg should be on the same regbank/regclass as its origin. 331 332 bb.0: 333 liveins: $s0 334 successors: %bb.1 335 336 %0:fpr(s32) = COPY $s0 337 %1:fpr(s32) = G_FCONSTANT float 1.0 338 339 bb.1: 340 successors: %bb.1 341 342 EH_LABEL 1 343 %2:fpr(s32) = G_FADD %0, %1 344 G_BR %bb.1 345... 346--- 347name: intrablock_with_globalvalue 348legalized: true 349regBankSelected: true 350tracksRegLiveness: true 351body: | 352 ; CHECK-LABEL: name: intrablock_with_globalvalue 353 ; CHECK: bb.0.entry: 354 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 355 ; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 2 356 ; CHECK: [[GV:%[0-9]+]]:gpr(p0) = G_GLOBAL_VALUE @var2 357 ; CHECK: [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 3 358 ; CHECK: [[GV1:%[0-9]+]]:gpr(p0) = G_GLOBAL_VALUE @var3 359 ; CHECK: [[C2:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0 360 ; CHECK: [[GV2:%[0-9]+]]:gpr(p0) = G_GLOBAL_VALUE @var1 361 ; CHECK: [[LOAD:%[0-9]+]]:gpr(s32) = G_LOAD [[GV2]](p0) :: (load 4 from @var1) 362 ; CHECK: [[C3:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 363 ; CHECK: [[ICMP:%[0-9]+]]:gpr(s32) = G_ICMP intpred(eq), [[LOAD]](s32), [[C3]] 364 ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[ICMP]](s32) 365 ; CHECK: G_BRCOND [[TRUNC]](s1), %bb.1 366 ; CHECK: G_BR %bb.2 367 ; CHECK: bb.1.if.then: 368 ; CHECK: successors: %bb.2(0x80000000) 369 ; CHECK: [[GV3:%[0-9]+]]:gpr(p0) = G_GLOBAL_VALUE @var2 370 ; CHECK: [[C4:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 2 371 ; CHECK: G_STORE [[C4]](s32), [[GV3]](p0) :: (store 4 into @var2) 372 ; CHECK: [[C5:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 3 373 ; CHECK: [[GV4:%[0-9]+]]:gpr(p0) = G_GLOBAL_VALUE @var1 374 ; CHECK: G_STORE [[C5]](s32), [[GV4]](p0) :: (store 4 into @var1) 375 ; CHECK: [[GV5:%[0-9]+]]:gpr(p0) = G_GLOBAL_VALUE @var3 376 ; CHECK: G_STORE [[C4]](s32), [[GV5]](p0) :: (store 4 into @var3) 377 ; CHECK: G_STORE [[C5]](s32), [[GV4]](p0) :: (store 4 into @var1) 378 ; CHECK: bb.2.if.end: 379 ; CHECK: [[C6:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0 380 ; CHECK: $w0 = COPY [[C6]](s32) 381 ; CHECK: RET_ReallyLR implicit $w0 382 383 ; Some of these instructions are dead. We're checking that the other instructions are 384 ; sunk immediately before their first user in the if.then block or as close as possible. 385 bb.1.entry: 386 %1:gpr(p0) = G_GLOBAL_VALUE @var1 387 %2:gpr(s32) = G_CONSTANT i32 1 388 %4:gpr(s32) = G_CONSTANT i32 2 389 %5:gpr(p0) = G_GLOBAL_VALUE @var2 390 %6:gpr(s32) = G_CONSTANT i32 3 391 %7:gpr(p0) = G_GLOBAL_VALUE @var3 392 %8:gpr(s32) = G_CONSTANT i32 0 393 %0:gpr(s32) = G_LOAD %1(p0) :: (load 4 from @var1) 394 %9:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2 395 %3:gpr(s1) = G_TRUNC %9(s32) 396 G_BRCOND %3(s1), %bb.2 397 G_BR %bb.3 398 399 bb.2.if.then: 400 G_STORE %4(s32), %5(p0) :: (store 4 into @var2) 401 G_STORE %6(s32), %1(p0) :: (store 4 into @var1) 402 G_STORE %4(s32), %7(p0) :: (store 4 into @var3) 403 G_STORE %6(s32), %1(p0) :: (store 4 into @var1) 404 405 bb.3.if.end: 406 $w0 = COPY %8(s32) 407 RET_ReallyLR implicit $w0 408 409... 410--- 411name: adrp_add 412legalized: true 413regBankSelected: true 414tracksRegLiveness: true 415body: | 416 ; CHECK-LABEL: name: adrp_add 417 ; CHECK: bb.0.entry: 418 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 419 ; CHECK: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var1 420 ; CHECK: %addlow1:gpr(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var1 421 ; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 2 422 ; CHECK: [[ADRP1:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var2 423 ; CHECK: %addlow2:gpr(p0) = G_ADD_LOW [[ADRP1]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var2 424 ; CHECK: [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 3 425 ; CHECK: [[ADRP2:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var3 426 ; CHECK: %addlow3:gpr(p0) = G_ADD_LOW [[ADRP2]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var3 427 ; CHECK: [[C2:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0 428 ; CHECK: [[LOAD:%[0-9]+]]:gpr(s32) = G_LOAD [[ADRP]](p0) :: (load 4 from @var1) 429 ; CHECK: [[C3:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 430 ; CHECK: [[ICMP:%[0-9]+]]:gpr(s32) = G_ICMP intpred(eq), [[LOAD]](s32), [[C3]] 431 ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[ICMP]](s32) 432 ; CHECK: G_BRCOND [[TRUNC]](s1), %bb.1 433 ; CHECK: G_BR %bb.2 434 ; CHECK: bb.1.if.then: 435 ; CHECK: successors: %bb.2(0x80000000) 436 ; CHECK: [[ADRP3:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var2 437 ; CHECK: [[ADD_LOW:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP3]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var2 438 ; CHECK: [[C4:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 2 439 ; CHECK: G_STORE [[C4]](s32), [[ADD_LOW]](p0) :: (store 4 into @var2) 440 ; CHECK: [[C5:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 3 441 ; CHECK: [[ADRP4:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var1 442 ; CHECK: [[ADD_LOW1:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP4]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var1 443 ; CHECK: G_STORE [[C5]](s32), [[ADD_LOW1]](p0) :: (store 4 into @var1) 444 ; CHECK: [[ADRP5:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var3 445 ; CHECK: [[ADD_LOW2:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP5]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var3 446 ; CHECK: G_STORE [[C4]](s32), [[ADD_LOW2]](p0) :: (store 4 into @var3) 447 ; CHECK: G_STORE [[C5]](s32), [[ADD_LOW1]](p0) :: (store 4 into @var1) 448 ; CHECK: bb.2.if.end: 449 ; CHECK: [[C6:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0 450 ; CHECK: $w0 = COPY [[C6]](s32) 451 ; CHECK: RET_ReallyLR implicit $w0 452 453 ; Some of these instructions are dead. 454 bb.1.entry: 455 %1:gpr64(p0) = ADRP target-flags(aarch64-page) @var1 456 %addlow1:gpr(p0) = G_ADD_LOW %1(p0), target-flags(aarch64-pageoff, aarch64-nc) @var1 457 %2:gpr(s32) = G_CONSTANT i32 1 458 %4:gpr(s32) = G_CONSTANT i32 2 459 %5:gpr64(p0) = ADRP target-flags(aarch64-page) @var2 460 %addlow2:gpr(p0) = G_ADD_LOW %5(p0), target-flags(aarch64-pageoff, aarch64-nc) @var2 461 %6:gpr(s32) = G_CONSTANT i32 3 462 %7:gpr64(p0) = ADRP target-flags(aarch64-page) @var3 463 %addlow3:gpr(p0) = G_ADD_LOW %7(p0), target-flags(aarch64-pageoff, aarch64-nc) @var3 464 %8:gpr(s32) = G_CONSTANT i32 0 465 %0:gpr(s32) = G_LOAD %1(p0) :: (load 4 from @var1) 466 %9:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2 467 %3:gpr(s1) = G_TRUNC %9(s32) 468 G_BRCOND %3(s1), %bb.2 469 G_BR %bb.3 470 471 bb.2.if.then: 472 G_STORE %4(s32), %addlow2(p0) :: (store 4 into @var2) 473 G_STORE %6(s32), %addlow1(p0) :: (store 4 into @var1) 474 G_STORE %4(s32), %addlow3(p0) :: (store 4 into @var3) 475 G_STORE %6(s32), %addlow1(p0) :: (store 4 into @var1) 476 477 bb.3.if.end: 478 $w0 = COPY %8(s32) 479 RET_ReallyLR implicit $w0 480 481... 482--- 483name: test_inttoptr 484alignment: 4 485legalized: true 486regBankSelected: true 487tracksRegLiveness: true 488body: | 489 ; CHECK-LABEL: name: test_inttoptr 490 ; CHECK: bb.0: 491 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 492 ; CHECK: liveins: $w0, $x1 493 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 494 ; CHECK: [[COPY1:%[0-9]+]]:gpr(p0) = COPY $x1 495 ; CHECK: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 0 496 ; CHECK: [[INTTOPTR:%[0-9]+]]:gpr(p0) = G_INTTOPTR [[C]](s64) 497 ; CHECK: [[C1:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 128 498 ; CHECK: [[INTTOPTR1:%[0-9]+]]:gpr(p0) = G_INTTOPTR [[C1]](s64) 499 ; CHECK: [[C2:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0 500 ; CHECK: [[ICMP:%[0-9]+]]:gpr(s32) = G_ICMP intpred(eq), [[COPY]](s32), [[C2]] 501 ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[ICMP]](s32) 502 ; CHECK: G_BRCOND [[TRUNC]](s1), %bb.1 503 ; CHECK: G_BR %bb.2 504 ; CHECK: bb.1: 505 ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[COPY]], [[COPY]] 506 ; CHECK: G_STORE [[ADD]](s32), [[COPY1]](p0) :: (store 4) 507 ; CHECK: [[C3:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 128 508 ; CHECK: [[INTTOPTR2:%[0-9]+]]:gpr(p0) = G_INTTOPTR [[C3]](s64) 509 ; CHECK: $x0 = COPY [[INTTOPTR2]](p0) 510 ; CHECK: RET_ReallyLR implicit $x0 511 ; CHECK: bb.2: 512 ; CHECK: [[C4:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 0 513 ; CHECK: [[INTTOPTR3:%[0-9]+]]:gpr(p0) = G_INTTOPTR [[C4]](s64) 514 ; CHECK: $x0 = COPY [[INTTOPTR3]](p0) 515 ; CHECK: RET_ReallyLR implicit $x0 516 bb.1: 517 liveins: $w0, $x1 518 519 %0:gpr(s32) = COPY $w0 520 %1:gpr(p0) = COPY $x1 521 %2:gpr(s64) = G_CONSTANT i64 128 522 %4:gpr(s32) = G_CONSTANT i32 0 523 %7:gpr(s64) = G_CONSTANT i64 0 524 %6:gpr(p0) = G_INTTOPTR %7(s64) 525 %3:gpr(p0) = G_INTTOPTR %2(s64) 526 %9:gpr(s32) = G_ICMP intpred(eq), %0(s32), %4 527 %5:gpr(s1) = G_TRUNC %9(s32) 528 G_BRCOND %5(s1), %bb.2 529 G_BR %bb.3 530 531 bb.2: 532 %8:gpr(s32) = G_ADD %0, %0 533 G_STORE %8(s32), %1(p0) :: (store 4) 534 $x0 = COPY %3(p0) 535 RET_ReallyLR implicit $x0 536 537 bb.3: 538 $x0 = COPY %6(p0) 539 RET_ReallyLR implicit $x0 540 541... 542 543--- 544name: many_local_use_intra_block 545legalized: true 546regBankSelected: true 547body: | 548 bb.0: 549 ; CHECK-LABEL: name: many_local_use_intra_block 550 ; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1 551 ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]] 552 ; CHECK: [[ADD1:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]] 553 ; CHECK: [[ADD2:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]] 554 ; CHECK: [[ADD3:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]] 555 ; CHECK: [[ADD4:%[0-9]+]]:gpr(s32) = G_ADD [[C]], [[C]] 556 ; CHECK: [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 2 557 ; CHECK: [[ADD5:%[0-9]+]]:gpr(s32) = G_ADD [[C1]], [[C1]] 558 %0:gpr(s32) = G_CONSTANT i32 1 559 %1:gpr(s32) = G_CONSTANT i32 2 560 %2:gpr(s32) = G_ADD %0, %0 561 %3:gpr(s32) = G_ADD %0, %0 562 %4:gpr(s32) = G_ADD %0, %0 563 %5:gpr(s32) = G_ADD %0, %0 564 %6:gpr(s32) = G_ADD %0, %0 565 %7:gpr(s32) = G_ADD %1, %1 566... 567