1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3
4---
5name:            add_shl_s64_rhs
6legalized:       true
7regBankSelected: true
8tracksRegLiveness: true
9body:             |
10  bb.0:
11    liveins: $x0
12    ; CHECK-LABEL: name: add_shl_s64_rhs
13    ; CHECK: liveins: $x0
14    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
15    ; CHECK: [[ADDXrs:%[0-9]+]]:gpr64 = ADDXrs [[COPY]], [[COPY]], 8
16    ; CHECK: $x0 = COPY [[ADDXrs]]
17    ; CHECK: RET_ReallyLR implicit $x0
18    %0:gpr(s64) = COPY $x0
19    %1:gpr(s64) = G_CONSTANT i64 8
20    %2:gpr(s64) = G_SHL %0, %1:gpr(s64)
21    %3:gpr(s64) = G_ADD %0, %2:gpr(s64)
22    $x0 = COPY %3:gpr(s64)
23    RET_ReallyLR implicit $x0
24
25...
26---
27name:            add_shl_s64_lhs
28legalized:       true
29regBankSelected: true
30tracksRegLiveness: true
31body:             |
32  bb.0:
33    liveins: $x0, $x1
34    ; CHECK-LABEL: name: add_shl_s64_lhs
35    ; CHECK: liveins: $x0, $x1
36    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
37    ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
38    ; CHECK: [[ADDXrs:%[0-9]+]]:gpr64 = ADDXrs [[COPY1]], [[COPY]], 8
39    ; CHECK: $x0 = COPY [[ADDXrs]]
40    ; CHECK: RET_ReallyLR implicit $x0
41    %0:gpr(s64) = COPY $x0
42    %4:gpr(s64) = COPY $x1
43    %1:gpr(s64) = G_CONSTANT i64 8
44    %2:gpr(s64) = G_SHL %0, %1:gpr(s64)
45    %3:gpr(s64) = G_ADD %2, %4:gpr(s64)
46    $x0 = COPY %3:gpr(s64)
47    RET_ReallyLR implicit $x0
48
49...
50---
51name:            sub_shl_s64_rhs
52legalized:       true
53regBankSelected: true
54tracksRegLiveness: true
55body:             |
56  bb.0:
57    liveins: $x0
58    ; CHECK-LABEL: name: sub_shl_s64_rhs
59    ; CHECK: liveins: $x0
60    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
61    ; CHECK: [[SUBSXrs:%[0-9]+]]:gpr64 = SUBSXrs [[COPY]], [[COPY]], 8, implicit-def $nzcv
62    ; CHECK: $x0 = COPY [[SUBSXrs]]
63    ; CHECK: RET_ReallyLR implicit $x0
64    %0:gpr(s64) = COPY $x0
65    %1:gpr(s64) = G_CONSTANT i64 8
66    %2:gpr(s64) = G_SHL %0, %1:gpr(s64)
67    %3:gpr(s64) = G_SUB %0, %2:gpr(s64)
68    $x0 = COPY %3:gpr(s64)
69    RET_ReallyLR implicit $x0
70
71---
72name:            add_lshr_s64_rhs
73legalized:       true
74regBankSelected: true
75tracksRegLiveness: true
76body:             |
77  bb.0:
78    liveins: $x0
79    %0:gpr(s64) = COPY $x0
80    %1:gpr(s64) = G_CONSTANT i64 8
81    %2:gpr(s64) = G_LSHR %0, %1:gpr(s64)
82    %3:gpr(s64) = G_ADD %0, %2:gpr(s64)
83    $x0 = COPY %3:gpr(s64)
84    RET_ReallyLR implicit $x0
85
86...
87---
88name:            add_lshr_s64_lhs
89legalized:       true
90regBankSelected: true
91tracksRegLiveness: true
92body:             |
93  bb.0:
94    liveins: $x0, $x1
95    ; CHECK-LABEL: name: add_lshr_s64_lhs
96    ; CHECK: liveins: $x0, $x1
97    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
98    ; CHECK: %param2:gpr64 = COPY $x1
99    ; CHECK: [[ADDXrs:%[0-9]+]]:gpr64 = ADDXrs %param2, [[COPY]], 72
100    ; CHECK: $x0 = COPY [[ADDXrs]]
101    ; CHECK: RET_ReallyLR implicit $x0
102    %0:gpr(s64) = COPY $x0
103    %param2:gpr(s64) = COPY $x1
104    %1:gpr(s64) = G_CONSTANT i64 8
105    %2:gpr(s64) = G_LSHR %0, %1:gpr(s64)
106    %3:gpr(s64) = G_ADD %2, %param2:gpr(s64)
107    $x0 = COPY %3:gpr(s64)
108    RET_ReallyLR implicit $x0
109
110...
111---
112name:            sub_lshr_s64_rhs
113legalized:       true
114regBankSelected: true
115tracksRegLiveness: true
116body:             |
117  bb.0:
118    liveins: $x0
119    ; CHECK-LABEL: name: sub_lshr_s64_rhs
120    ; CHECK: liveins: $x0
121    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
122    ; CHECK: [[SUBSXrs:%[0-9]+]]:gpr64 = SUBSXrs [[COPY]], [[COPY]], 72, implicit-def $nzcv
123    ; CHECK: $x0 = COPY [[SUBSXrs]]
124    ; CHECK: RET_ReallyLR implicit $x0
125    %0:gpr(s64) = COPY $x0
126    %1:gpr(s64) = G_CONSTANT i64 8
127    %2:gpr(s64) = G_LSHR %0, %1:gpr(s64)
128    %3:gpr(s64) = G_SUB %0, %2:gpr(s64)
129    $x0 = COPY %3:gpr(s64)
130    RET_ReallyLR implicit $x0
131
132...
133---
134name:            add_ashr_s64_rhs
135legalized:       true
136regBankSelected: true
137tracksRegLiveness: true
138body:             |
139  bb.0:
140    liveins: $x0
141    ; CHECK-LABEL: name: add_ashr_s64_rhs
142    ; CHECK: liveins: $x0
143    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
144    ; CHECK: [[ADDXrs:%[0-9]+]]:gpr64 = ADDXrs [[COPY]], [[COPY]], 136
145    ; CHECK: $x0 = COPY [[ADDXrs]]
146    ; CHECK: RET_ReallyLR implicit $x0
147    %0:gpr(s64) = COPY $x0
148    %1:gpr(s64) = G_CONSTANT i64 8
149    %2:gpr(s64) = G_ASHR %0, %1:gpr(s64)
150    %3:gpr(s64) = G_ADD %0, %2:gpr(s64)
151    $x0 = COPY %3:gpr(s64)
152    RET_ReallyLR implicit $x0
153
154...
155---
156name:            add_ashr_s64_lhs
157legalized:       true
158regBankSelected: true
159tracksRegLiveness: true
160body:             |
161  bb.0:
162    liveins: $x0, $x1
163    ; CHECK-LABEL: name: add_ashr_s64_lhs
164    ; CHECK: liveins: $x0, $x1
165    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
166    ; CHECK: %param2:gpr64 = COPY $x1
167    ; CHECK: [[ADDXrs:%[0-9]+]]:gpr64 = ADDXrs %param2, [[COPY]], 136
168    ; CHECK: $x0 = COPY [[ADDXrs]]
169    ; CHECK: RET_ReallyLR implicit $x0
170    %0:gpr(s64) = COPY $x0
171    %param2:gpr(s64) = COPY $x1
172    %1:gpr(s64) = G_CONSTANT i64 8
173    %2:gpr(s64) = G_ASHR %0, %1:gpr(s64)
174    %3:gpr(s64) = G_ADD %2, %param2:gpr(s64)
175    $x0 = COPY %3:gpr(s64)
176    RET_ReallyLR implicit $x0
177
178...
179---
180name:            sub_ashr_s64_rhs
181legalized:       true
182regBankSelected: true
183tracksRegLiveness: true
184body:             |
185  bb.0:
186    liveins: $x0
187    ; CHECK-LABEL: name: sub_ashr_s64_rhs
188    ; CHECK: liveins: $x0
189    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
190    ; CHECK: [[SUBSXrs:%[0-9]+]]:gpr64 = SUBSXrs [[COPY]], [[COPY]], 136, implicit-def $nzcv
191    ; CHECK: $x0 = COPY [[SUBSXrs]]
192    ; CHECK: RET_ReallyLR implicit $x0
193    %0:gpr(s64) = COPY $x0
194    %1:gpr(s64) = G_CONSTANT i64 8
195    %2:gpr(s64) = G_ASHR %0, %1:gpr(s64)
196    %3:gpr(s64) = G_SUB %0, %2:gpr(s64)
197    $x0 = COPY %3:gpr(s64)
198    RET_ReallyLR implicit $x0
199
200---
201name:            add_shl_s32_rhs
202legalized:       true
203regBankSelected: true
204tracksRegLiveness: true
205body:             |
206  bb.0:
207    liveins: $w0
208    %0:gpr(s32) = COPY $w0
209    %1:gpr(s32) = G_CONSTANT i32 8
210    %2:gpr(s32) = G_SHL %0, %1:gpr(s32)
211    %3:gpr(s32) = G_ADD %0, %2:gpr(s32)
212    $w0 = COPY %3:gpr(s32)
213    RET_ReallyLR implicit $w0
214
215...
216---
217name:            add_shl_s32_lhs
218legalized:       true
219regBankSelected: true
220tracksRegLiveness: true
221body:             |
222  bb.0:
223    liveins: $w0, $w1
224    ; CHECK-LABEL: name: add_shl_s32_lhs
225    ; CHECK: liveins: $w0, $w1
226    ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
227    ; CHECK: %param2:gpr32 = COPY $w1
228    ; CHECK: [[ADDWrs:%[0-9]+]]:gpr32 = ADDWrs %param2, [[COPY]], 8
229    ; CHECK: $w0 = COPY [[ADDWrs]]
230    ; CHECK: RET_ReallyLR implicit $w0
231    %0:gpr(s32) = COPY $w0
232    %param2:gpr(s32) = COPY $w1
233    %1:gpr(s32) = G_CONSTANT i32 8
234    %2:gpr(s32) = G_SHL %0, %1:gpr(s32)
235    %3:gpr(s32) = G_ADD %2, %param2:gpr(s32)
236    $w0 = COPY %3:gpr(s32)
237    RET_ReallyLR implicit $w0
238
239...
240---
241name:            sub_shl_s32_rhs
242legalized:       true
243regBankSelected: true
244tracksRegLiveness: true
245body:             |
246  bb.0:
247    liveins: $w0
248    ; CHECK-LABEL: name: sub_shl_s32_rhs
249    ; CHECK: liveins: $w0
250    ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
251    ; CHECK: [[SUBSWrs:%[0-9]+]]:gpr32 = SUBSWrs [[COPY]], [[COPY]], 8, implicit-def $nzcv
252    ; CHECK: $w0 = COPY [[SUBSWrs]]
253    ; CHECK: RET_ReallyLR implicit $w0
254    %0:gpr(s32) = COPY $w0
255    %1:gpr(s32) = G_CONSTANT i32 8
256    %2:gpr(s32) = G_SHL %0, %1:gpr(s32)
257    %3:gpr(s32) = G_SUB %0, %2:gpr(s32)
258    $w0 = COPY %3:gpr(s32)
259    RET_ReallyLR implicit $w0
260
261...
262---
263name:            add_lshr_s32_rhs
264legalized:       true
265regBankSelected: true
266tracksRegLiveness: true
267body:             |
268  bb.0:
269    liveins: $w0
270    ; CHECK-LABEL: name: add_lshr_s32_rhs
271    ; CHECK: liveins: $w0
272    ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
273    ; CHECK: [[ADDWrs:%[0-9]+]]:gpr32 = ADDWrs [[COPY]], [[COPY]], 72
274    ; CHECK: $w0 = COPY [[ADDWrs]]
275    ; CHECK: RET_ReallyLR implicit $w0
276    %0:gpr(s32) = COPY $w0
277    %1:gpr(s32) = G_CONSTANT i32 8
278    %2:gpr(s32) = G_LSHR %0, %1:gpr(s32)
279    %3:gpr(s32) = G_ADD %0, %2:gpr(s32)
280    $w0 = COPY %3:gpr(s32)
281    RET_ReallyLR implicit $w0
282
283...
284---
285name:            add_lshr_s32_lhs
286legalized:       true
287regBankSelected: true
288tracksRegLiveness: true
289body:             |
290  bb.0:
291    liveins: $w0, $w1
292    ; CHECK-LABEL: name: add_lshr_s32_lhs
293    ; CHECK: liveins: $w0, $w1
294    ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
295    ; CHECK: %param2:gpr32 = COPY $w1
296    ; CHECK: [[ADDWrs:%[0-9]+]]:gpr32 = ADDWrs %param2, [[COPY]], 72
297    ; CHECK: $w0 = COPY [[ADDWrs]]
298    ; CHECK: RET_ReallyLR implicit $w0
299    %0:gpr(s32) = COPY $w0
300    %param2:gpr(s32) = COPY $w1
301    %1:gpr(s32) = G_CONSTANT i32 8
302    %2:gpr(s32) = G_LSHR %0, %1:gpr(s32)
303    %3:gpr(s32) = G_ADD %2, %param2:gpr(s32)
304    $w0 = COPY %3:gpr(s32)
305    RET_ReallyLR implicit $w0
306
307...
308---
309name:            sub_lshr_s32_rhs
310legalized:       true
311regBankSelected: true
312tracksRegLiveness: true
313body:             |
314  bb.0:
315    liveins: $w0
316    ; CHECK-LABEL: name: sub_lshr_s32_rhs
317    ; CHECK: liveins: $w0
318    ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
319    ; CHECK: [[SUBSWrs:%[0-9]+]]:gpr32 = SUBSWrs [[COPY]], [[COPY]], 72, implicit-def $nzcv
320    ; CHECK: $w0 = COPY [[SUBSWrs]]
321    ; CHECK: RET_ReallyLR implicit $w0
322    %0:gpr(s32) = COPY $w0
323    %1:gpr(s32) = G_CONSTANT i32 8
324    %2:gpr(s32) = G_LSHR %0, %1:gpr(s32)
325    %3:gpr(s32) = G_SUB %0, %2:gpr(s32)
326    $w0 = COPY %3:gpr(s32)
327    RET_ReallyLR implicit $w0
328
329...
330---
331name:            add_ashr_s32_rhs
332legalized:       true
333regBankSelected: true
334tracksRegLiveness: true
335body:             |
336  bb.0:
337    liveins: $w0
338    ; CHECK-LABEL: name: add_ashr_s32_rhs
339    ; CHECK: liveins: $w0
340    ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
341    ; CHECK: [[ADDWrs:%[0-9]+]]:gpr32 = ADDWrs [[COPY]], [[COPY]], 136
342    ; CHECK: $w0 = COPY [[ADDWrs]]
343    ; CHECK: RET_ReallyLR implicit $w0
344    %0:gpr(s32) = COPY $w0
345    %1:gpr(s32) = G_CONSTANT i32 8
346    %2:gpr(s32) = G_ASHR %0, %1:gpr(s32)
347    %3:gpr(s32) = G_ADD %0, %2:gpr(s32)
348    $w0 = COPY %3:gpr(s32)
349    RET_ReallyLR implicit $w0
350
351...
352---
353name:            add_ashr_s32_lhs
354legalized:       true
355regBankSelected: true
356tracksRegLiveness: true
357body:             |
358  bb.0:
359    liveins: $w0, $w1
360    ; CHECK-LABEL: name: add_ashr_s32_lhs
361    ; CHECK: liveins: $w0, $w1
362    ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
363    ; CHECK: %param2:gpr32 = COPY $w1
364    ; CHECK: [[ADDWrs:%[0-9]+]]:gpr32 = ADDWrs %param2, [[COPY]], 136
365    ; CHECK: $w0 = COPY [[ADDWrs]]
366    ; CHECK: RET_ReallyLR implicit $w0
367    %0:gpr(s32) = COPY $w0
368    %param2:gpr(s32) = COPY $w1
369    %1:gpr(s32) = G_CONSTANT i32 8
370    %2:gpr(s32) = G_ASHR %0, %1:gpr(s32)
371    %3:gpr(s32) = G_ADD %2, %param2:gpr(s32)
372    $w0 = COPY %3:gpr(s32)
373    RET_ReallyLR implicit $w0
374
375...
376---
377name:            sub_ashr_s32_rhs
378legalized:       true
379regBankSelected: true
380tracksRegLiveness: true
381body:             |
382  bb.0:
383    liveins: $w0
384    ; CHECK-LABEL: name: sub_ashr_s32_rhs
385    ; CHECK: liveins: $w0
386    ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
387    ; CHECK: [[SUBSWrs:%[0-9]+]]:gpr32 = SUBSWrs [[COPY]], [[COPY]], 136, implicit-def $nzcv
388    ; CHECK: $w0 = COPY [[SUBSWrs]]
389    ; CHECK: RET_ReallyLR implicit $w0
390    %0:gpr(s32) = COPY $w0
391    %1:gpr(s32) = G_CONSTANT i32 8
392    %2:gpr(s32) = G_ASHR %0, %1:gpr(s32)
393    %3:gpr(s32) = G_SUB %0, %2:gpr(s32)
394    $w0 = COPY %3:gpr(s32)
395    RET_ReallyLR implicit $w0
396