1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=aarch64-- -mattr=+fuse-aes -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3
4---
5# Check that we select the aarch64_crypto_aesmc and aarch64_crypto_aese
6# intrinsics into an ARSMCrrTied and AESErr instruction sequence.
7name:            aesmc_aese
8legalized:       true
9regBankSelected: true
10
11body:             |
12  bb.0:
13    liveins: $q0, $q1
14
15    ; CHECK-LABEL: name: aesmc_aese
16    ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
17    ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
18    ; CHECK: [[T0:%[0-9]+]]:fpr128 = AESErr [[COPY]], [[COPY1]]
19    ; CHECK: [[T1:%[0-9]+]]:fpr128 = AESMCrrTied [[T0]]
20    ; CHECK: $q0 = COPY [[T1]]
21    %0:fpr(<16 x s8>) = COPY $q0
22    %1:fpr(<16 x s8>) = COPY $q1
23    %2:fpr(<16 x s8>) = G_INTRINSIC intrinsic(@llvm.aarch64.crypto.aese), %0, %1
24    %3:fpr(<16 x s8>) = G_INTRINSIC intrinsic(@llvm.aarch64.crypto.aesmc), %2
25    $q0 = COPY %3(<16 x s8>)
26...
27