1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=aarch64-unknown-unknown -o - -verify-machineinstrs -run-pass=instruction-select %s | FileCheck %s 3 4# When we select the G_ZEXTLOAD, the SUBREG_TO_REG will initially land on a 5# gpr64sp register. 6# 7# This caused a test failure when selecting the G_BRJT, because it was not being 8# constrained. This test checks that the G_BRJT is actually being constrained. 9# As a result, the SUBREG_TO_REG should end up on a gpr64common. 10 11... 12--- 13name: check_constrain 14legalized: true 15regBankSelected: true 16tracksRegLiveness: true 17jumpTable: 18 kind: block-address 19 entries: 20 - id: 0 21 blocks: [ '%bb.4' ] 22body: | 23 ; CHECK-LABEL: name: check_constrain 24 ; CHECK: bb.0: 25 ; CHECK: successors: %bb.3(0x40000000), %bb.1(0x40000000) 26 ; CHECK: [[DEF:%[0-9]+]]:gpr64common = IMPLICIT_DEF 27 ; CHECK: [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[DEF]], 0 :: (load 1) 28 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64common = SUBREG_TO_REG 0, [[LDRBBui]], %subreg.sub_32 29 ; CHECK: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[SUBREG_TO_REG]], 8, 0, implicit-def $nzcv 30 ; CHECK: Bcc 8, %bb.3, implicit $nzcv 31 ; CHECK: bb.1: 32 ; CHECK: successors: %bb.2(0x40000000), %bb.3(0x40000000) 33 ; CHECK: [[MOVaddrJT:%[0-9]+]]:gpr64 = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0 34 ; CHECK: early-clobber %6:gpr64, early-clobber %7:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0 35 ; CHECK: BR %6 36 ; CHECK: bb.2: 37 ; CHECK: successors: %bb.3(0x80000000) 38 ; CHECK: B %bb.3 39 ; CHECK: bb.3: 40 ; CHECK: RET_ReallyLR 41 bb.1: 42 %1:gpr(p0) = G_IMPLICIT_DEF 43 %5:gpr(s64) = G_ZEXTLOAD %1(p0) :: (load 1) 44 %7:gpr(s64) = G_CONSTANT i64 8 45 %16:gpr(s32) = G_ICMP intpred(ugt), %5(s64), %7 46 %8:gpr(s1) = G_TRUNC %16(s32) 47 G_BRCOND %8(s1), %bb.4 48 49 bb.2: 50 successors: %bb.3, %bb.4 51 52 %9:gpr(p0) = G_JUMP_TABLE %jump-table.0 53 G_BRJT %9(p0), %jump-table.0, %5(s64) 54 55 bb.3: 56 G_BR %bb.4 57 58 bb.4: 59 RET_ReallyLR 60 61... 62