1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2#
3# Check that we can select G_ZIP1 and G_ZIP2 via the tablegen importer.
4#
5# RUN: llc -mtriple aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
6
7...
8---
9name:            zip1_v2s32
10alignment:       4
11legalized:       true
12regBankSelected: true
13tracksRegLiveness: true
14body:             |
15  bb.1.entry:
16    liveins: $d0, $d1
17
18    ; CHECK-LABEL: name: zip1_v2s32
19    ; CHECK: liveins: $d0, $d1
20    ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
21    ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
22    ; CHECK: [[ZIP1v2i32_:%[0-9]+]]:fpr64 = ZIP1v2i32 [[COPY]], [[COPY1]]
23    ; CHECK: $d0 = COPY [[ZIP1v2i32_]]
24    ; CHECK: RET_ReallyLR implicit $d0
25    %0:fpr(<2 x s32>) = COPY $d0
26    %1:fpr(<2 x s32>) = COPY $d1
27    %2:fpr(<2 x s32>) = G_ZIP1 %0, %1
28    $d0 = COPY %2(<2 x s32>)
29    RET_ReallyLR implicit $d0
30...
31---
32name:            zip1_v2s64
33alignment:       4
34legalized:       true
35regBankSelected: true
36tracksRegLiveness: true
37body:             |
38  bb.1.entry:
39    liveins: $q0, $q1
40
41    ; CHECK-LABEL: name: zip1_v2s64
42    ; CHECK: liveins: $q0, $q1
43    ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
44    ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
45    ; CHECK: [[ZIP1v2i64_:%[0-9]+]]:fpr128 = ZIP1v2i64 [[COPY]], [[COPY1]]
46    ; CHECK: $q0 = COPY [[ZIP1v2i64_]]
47    ; CHECK: RET_ReallyLR implicit $q0
48    %0:fpr(<2 x s64>) = COPY $q0
49    %1:fpr(<2 x s64>) = COPY $q1
50    %2:fpr(<2 x s64>) = G_ZIP1 %0, %1
51    $q0 = COPY %2(<2 x s64>)
52    RET_ReallyLR implicit $q0
53...
54---
55name:            zip1_v4s32
56alignment:       4
57legalized:       true
58regBankSelected: true
59tracksRegLiveness: true
60body:             |
61  bb.1.entry:
62    liveins: $q0, $q1
63    ; CHECK-LABEL: name: zip1_v4s32
64    ; CHECK: liveins: $q0, $q1
65    ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
66    ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
67    ; CHECK: [[ZIP1v4i32_:%[0-9]+]]:fpr128 = ZIP1v4i32 [[COPY]], [[COPY1]]
68    ; CHECK: $q0 = COPY [[ZIP1v4i32_]]
69    ; CHECK: RET_ReallyLR implicit $q0
70    %0:fpr(<4 x s32>) = COPY $q0
71    %1:fpr(<4 x s32>) = COPY $q1
72    %2:fpr(<4 x s32>) = G_ZIP1 %0, %1
73    $q0 = COPY %2(<4 x s32>)
74    RET_ReallyLR implicit $q0
75...
76---
77name:            zip2_v2s32
78alignment:       4
79legalized:       true
80regBankSelected: true
81tracksRegLiveness: true
82body:             |
83  bb.1.entry:
84    liveins: $d0, $d1
85
86    ; CHECK-LABEL: name: zip2_v2s32
87    ; CHECK: liveins: $d0, $d1
88    ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
89    ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
90    ; CHECK: [[ZIP2v2i32_:%[0-9]+]]:fpr64 = ZIP2v2i32 [[COPY]], [[COPY1]]
91    ; CHECK: $d0 = COPY [[ZIP2v2i32_]]
92    ; CHECK: RET_ReallyLR implicit $d0
93    %0:fpr(<2 x s32>) = COPY $d0
94    %1:fpr(<2 x s32>) = COPY $d1
95    %2:fpr(<2 x s32>) = G_ZIP2 %0, %1
96    $d0 = COPY %2(<2 x s32>)
97    RET_ReallyLR implicit $d0
98...
99---
100name:            zip2_v2s64
101alignment:       4
102legalized:       true
103regBankSelected: true
104tracksRegLiveness: true
105body:             |
106  bb.1.entry:
107    liveins: $q0, $q1
108
109    ; CHECK-LABEL: name: zip2_v2s64
110    ; CHECK: liveins: $q0, $q1
111    ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
112    ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
113    ; CHECK: [[ZIP2v2i64_:%[0-9]+]]:fpr128 = ZIP2v2i64 [[COPY]], [[COPY1]]
114    ; CHECK: $q0 = COPY [[ZIP2v2i64_]]
115    ; CHECK: RET_ReallyLR implicit $q0
116    %0:fpr(<2 x s64>) = COPY $q0
117    %1:fpr(<2 x s64>) = COPY $q1
118    %2:fpr(<2 x s64>) = G_ZIP2 %0, %1
119    $q0 = COPY %2(<2 x s64>)
120    RET_ReallyLR implicit $q0
121...
122---
123name:            zip2_v4s32
124alignment:       4
125legalized:       true
126regBankSelected: true
127tracksRegLiveness: true
128body:             |
129  bb.1.entry:
130    liveins: $d0, $d1
131    ; CHECK-LABEL: name: zip2_v4s32
132    ; CHECK: liveins: $d0, $d1
133    ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
134    ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
135    ; CHECK: [[ZIP2v4i32_:%[0-9]+]]:fpr128 = ZIP2v4i32 [[COPY]], [[COPY1]]
136    ; CHECK: $q0 = COPY [[ZIP2v4i32_]]
137    ; CHECK: RET_ReallyLR implicit $q0
138    %0:fpr(<4 x s32>) = COPY $q0
139    %1:fpr(<4 x s32>) = COPY $q1
140    %2:fpr(<4 x s32>) = G_ZIP2 %0, %1
141    $q0 = COPY %2(<4 x s32>)
142    RET_ReallyLR implicit $q0
143