1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64-none-eabi -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-NOZCZ
3; RUN: llc < %s -mtriple=aarch64-none-eabi -mattr=+fullfp16,+zcz | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-ZCZ
4; RUN: llc < %s -mtriple=aarch64-none-eabi -mattr=-fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16
5
6define half @Const0() {
7; CHECK-NOZCZ-LABEL: Const0:
8; CHECK-NOZCZ:       // %bb.0: // %entry
9; CHECK-NOZCZ-NEXT:    fmov h0, wzr
10; CHECK-NOZCZ-NEXT:    ret
11;
12; CHECK-ZCZ-LABEL: Const0:
13; CHECK-ZCZ:       // %bb.0: // %entry
14; CHECK-ZCZ-NEXT:    movi v0.2d, #0000000000000000
15; CHECK-ZCZ-NEXT:    ret
16;
17; CHECK-NOFP16-LABEL: Const0:
18; CHECK-NOFP16:       // %bb.0: // %entry
19; CHECK-NOFP16-NEXT:    adrp x8, .LCPI0_0
20; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI0_0]
21; CHECK-NOFP16-NEXT:    ret
22entry:
23  ret half 0xH0000
24}
25
26define half @Const1() {
27; CHECK-FP16-LABEL: Const1:
28; CHECK-FP16:       // %bb.0: // %entry
29; CHECK-FP16-NEXT:    fmov h0, #1.00000000
30; CHECK-FP16-NEXT:    ret
31;
32; CHECK-NOFP16-LABEL: Const1:
33; CHECK-NOFP16:       // %bb.0: // %entry
34; CHECK-NOFP16-NEXT:    adrp x8, .LCPI1_0
35; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI1_0]
36; CHECK-NOFP16-NEXT:    ret
37entry:
38  ret half 0xH3C00
39}
40
41define half @Const2() {
42; CHECK-FP16-LABEL: Const2:
43; CHECK-FP16:       // %bb.0: // %entry
44; CHECK-FP16-NEXT:    fmov h0, #0.12500000
45; CHECK-FP16-NEXT:    ret
46;
47; CHECK-NOFP16-LABEL: Const2:
48; CHECK-NOFP16:       // %bb.0: // %entry
49; CHECK-NOFP16-NEXT:    adrp x8, .LCPI2_0
50; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI2_0]
51; CHECK-NOFP16-NEXT:    ret
52entry:
53  ret half 0xH3000
54}
55
56define half @Const3() {
57; CHECK-FP16-LABEL: Const3:
58; CHECK-FP16:       // %bb.0: // %entry
59; CHECK-FP16-NEXT:    fmov h0, #30.00000000
60; CHECK-FP16-NEXT:    ret
61;
62; CHECK-NOFP16-LABEL: Const3:
63; CHECK-NOFP16:       // %bb.0: // %entry
64; CHECK-NOFP16-NEXT:    adrp x8, .LCPI3_0
65; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI3_0]
66; CHECK-NOFP16-NEXT:    ret
67entry:
68  ret half 0xH4F80
69}
70
71define half @Const4() {
72; CHECK-FP16-LABEL: Const4:
73; CHECK-FP16:       // %bb.0: // %entry
74; CHECK-FP16-NEXT:    fmov h0, #31.00000000
75; CHECK-FP16-NEXT:    ret
76;
77; CHECK-NOFP16-LABEL: Const4:
78; CHECK-NOFP16:       // %bb.0: // %entry
79; CHECK-NOFP16-NEXT:    adrp x8, .LCPI4_0
80; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI4_0]
81; CHECK-NOFP16-NEXT:    ret
82entry:
83  ret half 0xH4FC0
84}
85
86define half @Const5() {
87; CHECK-LABEL: Const5:
88; CHECK:       // %bb.0: // %entry
89; CHECK-NEXT:    adrp x8, .LCPI5_0
90; CHECK-NEXT:    ldr h0, [x8, :lo12:.LCPI5_0]
91; CHECK-NEXT:    ret
92entry:
93  ret half 0xH2FF0
94}
95
96define half @Const6() {
97; CHECK-LABEL: Const6:
98; CHECK:       // %bb.0: // %entry
99; CHECK-NEXT:    adrp x8, .LCPI6_0
100; CHECK-NEXT:    ldr h0, [x8, :lo12:.LCPI6_0]
101; CHECK-NEXT:    ret
102entry:
103  ret half 0xH4FC1
104}
105
106define half @Const7() {
107; CHECK-LABEL: Const7:
108; CHECK:       // %bb.0: // %entry
109; CHECK-NEXT:    adrp x8, .LCPI7_0
110; CHECK-NEXT:    ldr h0, [x8, :lo12:.LCPI7_0]
111; CHECK-NEXT:    ret
112entry:
113  ret half 0xH5000
114}
115
116