1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s 3 4define i8 @shl_and(i8 %x, i8 %y) nounwind { 5; CHECK-LABEL: shl_and: 6; CHECK: // %bb.0: 7; CHECK-NEXT: lsl w8, w0, #5 8; CHECK-NEXT: and w0, w8, w1, lsl #2 9; CHECK-NEXT: ret 10 %sh0 = shl i8 %x, 3 11 %r = and i8 %sh0, %y 12 %sh1 = shl i8 %r, 2 13 ret i8 %sh1 14} 15 16define i16 @shl_or(i16 %x, i16 %y) nounwind { 17; CHECK-LABEL: shl_or: 18; CHECK: // %bb.0: 19; CHECK-NEXT: lsl w8, w0, #12 20; CHECK-NEXT: orr w0, w8, w1, lsl #7 21; CHECK-NEXT: ret 22 %sh0 = shl i16 %x, 5 23 %r = or i16 %y, %sh0 24 %sh1 = shl i16 %r, 7 25 ret i16 %sh1 26} 27 28define i32 @shl_xor(i32 %x, i32 %y) nounwind { 29; CHECK-LABEL: shl_xor: 30; CHECK: // %bb.0: 31; CHECK-NEXT: lsl w8, w0, #12 32; CHECK-NEXT: eor w0, w8, w1, lsl #7 33; CHECK-NEXT: ret 34 %sh0 = shl i32 %x, 5 35 %r = xor i32 %sh0, %y 36 %sh1 = shl i32 %r, 7 37 ret i32 %sh1 38} 39 40define i64 @lshr_and(i64 %x, i64 %y) nounwind { 41; CHECK-LABEL: lshr_and: 42; CHECK: // %bb.0: 43; CHECK-NEXT: lsr x8, x0, #12 44; CHECK-NEXT: and x0, x8, x1, lsr #7 45; CHECK-NEXT: ret 46 %sh0 = lshr i64 %x, 5 47 %r = and i64 %y, %sh0 48 %sh1 = lshr i64 %r, 7 49 ret i64 %sh1 50} 51 52define <4 x i32> @lshr_or(<4 x i32> %x, <4 x i32> %y) nounwind { 53; CHECK-LABEL: lshr_or: 54; CHECK: // %bb.0: 55; CHECK-NEXT: ushr v1.4s, v1.4s, #7 56; CHECK-NEXT: ushr v0.4s, v0.4s, #12 57; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b 58; CHECK-NEXT: ret 59 %sh0 = lshr <4 x i32> %x, <i32 5, i32 5, i32 5, i32 5> 60 %r = or <4 x i32> %sh0, %y 61 %sh1 = lshr <4 x i32> %r, <i32 7, i32 7, i32 7, i32 7> 62 ret <4 x i32> %sh1 63} 64 65define <8 x i16> @lshr_xor(<8 x i16> %x, <8 x i16> %y) nounwind { 66; CHECK-LABEL: lshr_xor: 67; CHECK: // %bb.0: 68; CHECK-NEXT: ushr v1.8h, v1.8h, #7 69; CHECK-NEXT: ushr v0.8h, v0.8h, #12 70; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b 71; CHECK-NEXT: ret 72 %sh0 = lshr <8 x i16> %x, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5> 73 %r = xor <8 x i16> %y, %sh0 74 %sh1 = lshr <8 x i16> %r, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7> 75 ret <8 x i16> %sh1 76} 77 78 79define <16 x i8> @ashr_and(<16 x i8> %x, <16 x i8> %y) nounwind { 80; CHECK-LABEL: ashr_and: 81; CHECK: // %bb.0: 82; CHECK-NEXT: sshr v1.16b, v1.16b, #2 83; CHECK-NEXT: sshr v0.16b, v0.16b, #5 84; CHECK-NEXT: and v0.16b, v0.16b, v1.16b 85; CHECK-NEXT: ret 86 %sh0 = ashr <16 x i8> %x, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3> 87 %r = and <16 x i8> %y, %sh0 88 %sh1 = ashr <16 x i8> %r, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2> 89 ret <16 x i8> %sh1 90} 91 92define <2 x i64> @ashr_or(<2 x i64> %x, <2 x i64> %y) nounwind { 93; CHECK-LABEL: ashr_or: 94; CHECK: // %bb.0: 95; CHECK-NEXT: sshr v1.2d, v1.2d, #7 96; CHECK-NEXT: sshr v0.2d, v0.2d, #12 97; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b 98; CHECK-NEXT: ret 99 %sh0 = ashr <2 x i64> %x, <i64 5, i64 5> 100 %r = or <2 x i64> %sh0, %y 101 %sh1 = ashr <2 x i64> %r, <i64 7, i64 7> 102 ret <2 x i64> %sh1 103} 104 105define i32 @ashr_xor(i32 %x, i32 %y) nounwind { 106; CHECK-LABEL: ashr_xor: 107; CHECK: // %bb.0: 108; CHECK-NEXT: asr w8, w0, #12 109; CHECK-NEXT: eor w0, w8, w1, asr #7 110; CHECK-NEXT: ret 111 %sh0 = ashr i32 %x, 5 112 %r = xor i32 %y, %sh0 113 %sh1 = ashr i32 %r, 7 114 ret i32 %sh1 115} 116 117define i32 @shr_mismatch_xor(i32 %x, i32 %y) nounwind { 118; CHECK-LABEL: shr_mismatch_xor: 119; CHECK: // %bb.0: 120; CHECK-NEXT: eor w8, w1, w0, asr #5 121; CHECK-NEXT: lsr w0, w8, #7 122; CHECK-NEXT: ret 123 %sh0 = ashr i32 %x, 5 124 %r = xor i32 %y, %sh0 125 %sh1 = lshr i32 %r, 7 126 ret i32 %sh1 127} 128 129define i32 @ashr_overshift_xor(i32 %x, i32 %y) nounwind { 130; CHECK-LABEL: ashr_overshift_xor: 131; CHECK: // %bb.0: 132; CHECK-NEXT: eor w8, w1, w0, asr #15 133; CHECK-NEXT: asr w0, w8, #17 134; CHECK-NEXT: ret 135 %sh0 = ashr i32 %x, 15 136 %r = xor i32 %y, %sh0 137 %sh1 = ashr i32 %r, 17 138 ret i32 %sh1 139} 140 141define i32 @lshr_or_extra_use(i32 %x, i32 %y, i32* %p) nounwind { 142; CHECK-LABEL: lshr_or_extra_use: 143; CHECK: // %bb.0: 144; CHECK-NEXT: orr w8, w1, w0, lsr #5 145; CHECK-NEXT: lsr w0, w8, #7 146; CHECK-NEXT: str w8, [x2] 147; CHECK-NEXT: ret 148 %sh0 = lshr i32 %x, 5 149 %r = or i32 %sh0, %y 150 store i32 %r, i32* %p 151 %sh1 = lshr i32 %r, 7 152 ret i32 %sh1 153} 154