1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
3
4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
5; WARN-NOT: warning
6
7;
8; BRKA
9;
10
11define <vscale x 16 x i1> @brka_m_b8(<vscale x 16 x i1> %inactive, <vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {
12; CHECK-LABEL: brka_m_b8:
13; CHECK: brka p0.b, p1/m, p2.b
14; CHECK-NEXT: ret
15  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brka.nxv16i1(<vscale x 16 x i1> %inactive,
16                                                                <vscale x 16 x i1> %pg,
17                                                                <vscale x 16 x i1> %a)
18  ret <vscale x 16 x i1> %out
19}
20
21define <vscale x 16 x i1> @brka_z_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {
22; CHECK-LABEL: brka_z_b8:
23; CHECK: brka p0.b, p0/z, p1.b
24; CHECK-NEXT: ret
25  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brka.z.nxv16i1(<vscale x 16 x i1> %pg,
26                                                                  <vscale x 16 x i1> %a)
27  ret <vscale x 16 x i1> %out
28}
29
30;
31; BRKB
32;
33
34define <vscale x 16 x i1> @brkb_m_b8(<vscale x 16 x i1> %inactive, <vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {
35; CHECK-LABEL: brkb_m_b8:
36; CHECK: brkb p0.b, p1/m, p2.b
37; CHECK-NEXT: ret
38  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brkb.nxv16i1(<vscale x 16 x i1> %inactive,
39                                                                <vscale x 16 x i1> %pg,
40                                                                <vscale x 16 x i1> %a)
41  ret <vscale x 16 x i1> %out
42}
43
44define <vscale x 16 x i1> @brkb_z_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {
45; CHECK-LABEL: brkb_z_b8:
46; CHECK: brkb p0.b, p0/z, p1.b
47; CHECK-NEXT: ret
48  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brkb.z.nxv16i1(<vscale x 16 x i1> %pg,
49                                                                  <vscale x 16 x i1> %a)
50  ret <vscale x 16 x i1> %out
51}
52
53;
54; BRKN
55;
56
57define <vscale x 16 x i1> @brkn_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {
58; CHECK-LABEL: brkn_b8:
59; CHECK: brkn p2.b, p0/z, p1.b, p2.b
60; CHECK-NEXT: mov p0.b, p2.b
61; CHECK-NEXT: ret
62  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brkn.z.nxv16i1(<vscale x 16 x i1> %pg,
63                                                                  <vscale x 16 x i1> %a,
64                                                                  <vscale x 16 x i1> %b)
65  ret <vscale x 16 x i1> %out
66}
67
68;
69; BRKPA
70;
71
72define <vscale x 16 x i1> @brkpa_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {
73; CHECK-LABEL: brkpa_b8:
74; CHECK: brkpa p0.b, p0/z, p1.b, p2.b
75; CHECK-NEXT: ret
76  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brkpa.z.nxv16i1(<vscale x 16 x i1> %pg,
77                                                                   <vscale x 16 x i1> %a,
78                                                                   <vscale x 16 x i1> %b)
79  ret <vscale x 16 x i1> %out
80}
81
82;
83; BRKPB
84;
85
86define <vscale x 16 x i1> @brkpb_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {
87; CHECK-LABEL: brkpb_b8:
88; CHECK: brkpb p0.b, p0/z, p1.b, p2.b
89; CHECK-NEXT: ret
90  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brkpb.z.nxv16i1(<vscale x 16 x i1> %pg,
91                                                                   <vscale x 16 x i1> %a,
92                                                                   <vscale x 16 x i1> %b)
93  ret <vscale x 16 x i1> %out
94}
95
96;
97; PFIRST
98;
99
100define <vscale x 16 x i1> @pfirst_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {
101; CHECK-LABEL: pfirst_b8:
102; CHECK: pfirst p1.b, p0, p1.b
103; CHECK-NEXT: mov p0.b, p1.b
104; CHECK-NEXT: ret
105  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.pfirst.nxv16i1(<vscale x 16 x i1> %pg,
106                                                                  <vscale x 16 x i1> %a)
107  ret <vscale x 16 x i1> %out
108}
109
110;
111; PNEXT
112;
113
114define <vscale x 16 x i1> @pnext_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {
115; CHECK-LABEL: pnext_b8:
116; CHECK: pnext p1.b, p0, p1.b
117; CHECK-NEXT: mov p0.b, p1.b
118; CHECK-NEXT: ret
119  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.pnext.nxv16i1(<vscale x 16 x i1> %pg,
120                                                                 <vscale x 16 x i1> %a)
121  ret <vscale x 16 x i1> %out
122}
123
124define <vscale x 8 x i1> @pnext_b16(<vscale x 8 x i1> %pg, <vscale x 8 x i1> %a) {
125; CHECK-LABEL: pnext_b16:
126; CHECK: pnext p1.h, p0, p1.h
127; CHECK-NEXT: mov p0.b, p1.b
128; CHECK-NEXT: ret
129  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.pnext.nxv8i1(<vscale x 8 x i1> %pg,
130                                                               <vscale x 8 x i1> %a)
131  ret <vscale x 8 x i1> %out
132}
133
134define <vscale x 4 x i1> @pnext_b32(<vscale x 4 x i1> %pg, <vscale x 4 x i1> %a) {
135; CHECK-LABEL: pnext_b32:
136; CHECK: pnext p1.s, p0, p1.s
137; CHECK-NEXT: mov p0.b, p1.b
138; CHECK-NEXT: ret
139  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.pnext.nxv4i1(<vscale x 4 x i1> %pg,
140                                                               <vscale x 4 x i1> %a)
141  ret <vscale x 4 x i1> %out
142}
143
144define <vscale x 2 x i1> @pnext_b64(<vscale x 2 x i1> %pg, <vscale x 2 x i1> %a) {
145; CHECK-LABEL: pnext_b64:
146; CHECK: pnext p1.d, p0, p1.d
147; CHECK-NEXT: mov p0.b, p1.b
148; CHECK-NEXT: ret
149  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.pnext.nxv2i1(<vscale x 2 x i1> %pg,
150                                                               <vscale x 2 x i1> %a)
151  ret <vscale x 2 x i1> %out
152}
153
154;
155; PUNPKHI
156;
157
158define <vscale x 8 x i1> @punpkhi_b16(<vscale x 16 x i1> %a) {
159; CHECK-LABEL: punpkhi_b16
160; CHECK: punpkhi p0.h, p0.b
161; CHECK-NEXT: ret
162  %res = call <vscale x 8 x i1> @llvm.aarch64.sve.punpkhi.nxv8i1(<vscale x 16 x i1> %a)
163  ret <vscale x 8 x i1> %res
164}
165
166define <vscale x 4 x i1> @punpkhi_b8(<vscale x 8 x i1> %a) {
167; CHECK-LABEL: punpkhi_b8
168; CHECK: punpkhi p0.h, p0.b
169; CHECK-NEXT: ret
170  %res = call <vscale x 4 x i1> @llvm.aarch64.sve.punpkhi.nxv4i1(<vscale x 8 x i1> %a)
171  ret <vscale x 4 x i1> %res
172}
173
174define <vscale x 2 x i1> @punpkhi_b4(<vscale x 4 x i1> %a) {
175; CHECK-LABEL: punpkhi_b4
176; CHECK: punpkhi p0.h, p0.b
177; CHECK-NEXT: ret
178  %res = call <vscale x 2 x i1> @llvm.aarch64.sve.punpkhi.nxv2i1(<vscale x 4 x i1> %a)
179  ret <vscale x 2 x i1> %res
180}
181
182;
183; PUNPKLO
184;
185
186define <vscale x 8 x i1> @punpklo_b16(<vscale x 16 x i1> %a) {
187; CHECK-LABEL: punpklo_b16
188; CHECK: punpklo p0.h, p0.b
189; CHECK-NEXT: ret
190  %res = call <vscale x 8 x i1> @llvm.aarch64.sve.punpklo.nxv8i1(<vscale x 16 x i1> %a)
191  ret <vscale x 8 x i1> %res
192}
193
194define <vscale x 4 x i1> @punpklo_b8(<vscale x 8 x i1> %a) {
195; CHECK-LABEL: punpklo_b8
196; CHECK: punpklo p0.h, p0.b
197; CHECK-NEXT: ret
198  %res = call <vscale x 4 x i1> @llvm.aarch64.sve.punpklo.nxv4i1(<vscale x 8 x i1> %a)
199  ret <vscale x 4 x i1> %res
200}
201
202define <vscale x 2 x i1> @punpklo_b4(<vscale x 4 x i1> %a) {
203; CHECK-LABEL: punpklo_b4
204; CHECK: punpklo p0.h, p0.b
205; CHECK-NEXT: ret
206  %res = call <vscale x 2 x i1> @llvm.aarch64.sve.punpklo.nxv2i1(<vscale x 4 x i1> %a)
207  ret <vscale x 2 x i1> %res
208}
209
210declare <vscale x 16 x i1> @llvm.aarch64.sve.brka.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>, <vscale x 16 x i1>)
211declare <vscale x 16 x i1> @llvm.aarch64.sve.brka.z.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>)
212declare <vscale x 16 x i1> @llvm.aarch64.sve.brkb.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>, <vscale x 16 x i1>)
213declare <vscale x 16 x i1> @llvm.aarch64.sve.brkb.z.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>)
214declare <vscale x 16 x i1> @llvm.aarch64.sve.brkn.z.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>, <vscale x 16 x i1>)
215declare <vscale x 16 x i1> @llvm.aarch64.sve.brkpa.z.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>, <vscale x 16 x i1>)
216declare <vscale x 16 x i1> @llvm.aarch64.sve.brkpb.z.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>, <vscale x 16 x i1>)
217
218declare <vscale x 16 x i1> @llvm.aarch64.sve.pfirst.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>)
219
220declare <vscale x 16 x i1> @llvm.aarch64.sve.pnext.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>)
221declare <vscale x 8 x i1> @llvm.aarch64.sve.pnext.nxv8i1(<vscale x 8 x i1>, <vscale x 8 x i1>)
222declare <vscale x 4 x i1> @llvm.aarch64.sve.pnext.nxv4i1(<vscale x 4 x i1>, <vscale x 4 x i1>)
223declare <vscale x 2 x i1> @llvm.aarch64.sve.pnext.nxv2i1(<vscale x 2 x i1>, <vscale x 2 x i1>)
224
225declare <vscale x 8 x i1> @llvm.aarch64.sve.punpkhi.nxv8i1(<vscale x 16 x i1>)
226declare <vscale x 4 x i1> @llvm.aarch64.sve.punpkhi.nxv4i1(<vscale x 8 x i1>)
227declare <vscale x 2 x i1> @llvm.aarch64.sve.punpkhi.nxv2i1(<vscale x 4 x i1>)
228
229declare <vscale x 8 x i1> @llvm.aarch64.sve.punpklo.nxv8i1(<vscale x 16 x i1>)
230declare <vscale x 4 x i1> @llvm.aarch64.sve.punpklo.nxv4i1(<vscale x 8 x i1>)
231declare <vscale x 2 x i1> @llvm.aarch64.sve.punpklo.nxv2i1(<vscale x 4 x i1>)
232