1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=HSAPAL %s
3# RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=HSAPAL %s
4# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=MESA %s
5
6---
7name: groupstaticsize_v
8legalized: true
9regBankSelected: true
10tracksRegLiveness: true
11machineFunctionInfo:
12  ldsSize: 4096
13
14body: |
15  bb.0:
16
17    ; HSAPAL-LABEL: name: groupstaticsize_v
18    ; HSAPAL: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
19    ; HSAPAL: S_ENDPGM 0, implicit [[V_MOV_B32_e32_]]
20    ; MESA-LABEL: name: groupstaticsize_v
21    ; MESA: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @llvm.amdgcn.groupstaticsize, implicit $exec
22    ; MESA: S_ENDPGM 0, implicit [[V_MOV_B32_e32_]]
23    %0:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
24    S_ENDPGM 0, implicit %0
25...
26
27---
28name: groupstaticsize_s
29legalized: true
30regBankSelected: true
31tracksRegLiveness: true
32machineFunctionInfo:
33  ldsSize: 1024
34
35body: |
36  bb.0:
37
38    ; HSAPAL-LABEL: name: groupstaticsize_s
39    ; HSAPAL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1024
40    ; HSAPAL: S_ENDPGM 0, implicit [[S_MOV_B32_]]
41    ; MESA-LABEL: name: groupstaticsize_s
42    ; MESA: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 target-flags(amdgpu-abs32-lo) @llvm.amdgcn.groupstaticsize
43    ; MESA: S_ENDPGM 0, implicit [[S_MOV_B32_]]
44    %0:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.groupstaticsize)
45    S_ENDPGM 0, implicit %0
46...
47