1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck %s
3
4---
5name: bitreverse_i32_ss
6legalized: true
7regBankSelected: true
8
9body: |
10  bb.0:
11    liveins: $sgpr0
12    ; CHECK-LABEL: name: bitreverse_i32_ss
13    ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
14    ; CHECK: [[S_BREV_B32_:%[0-9]+]]:sreg_32 = S_BREV_B32 [[COPY]]
15    ; CHECK: S_ENDPGM 0, implicit [[S_BREV_B32_]]
16    %0:sgpr(s32) = COPY $sgpr0
17    %1:sgpr(s32) = G_BITREVERSE %0
18    S_ENDPGM 0, implicit %1
19...
20
21---
22name: bitreverse_i32_vv
23legalized: true
24regBankSelected: true
25
26body: |
27  bb.0:
28    liveins: $vgpr0
29    ; CHECK-LABEL: name: bitreverse_i32_vv
30    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
31    ; CHECK: [[V_BFREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_BFREV_B32_e64 [[COPY]], implicit $exec
32    ; CHECK: S_ENDPGM 0, implicit [[V_BFREV_B32_e64_]]
33    %0:vgpr(s32) = COPY $vgpr0
34    %1:vgpr(s32) = G_BITREVERSE %0
35    S_ENDPGM 0, implicit %1
36...
37
38---
39name: bitreverse_i32_vs
40legalized: true
41regBankSelected: true
42
43body: |
44  bb.0:
45    liveins: $sgpr0
46    ; CHECK-LABEL: name: bitreverse_i32_vs
47    ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
48    ; CHECK: [[V_BFREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_BFREV_B32_e64 [[COPY]], implicit $exec
49    ; CHECK: S_ENDPGM 0, implicit [[V_BFREV_B32_e64_]]
50    %0:sgpr(s32) = COPY $sgpr0
51    %1:vgpr(s32) = G_BITREVERSE %0
52    S_ENDPGM 0, implicit %1
53...
54