1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3
4---
5name: ctlz_zero_undef_s32_ss
6legalized: true
7regBankSelected: true
8tracksRegLiveness: true
9
10body: |
11  bb.0:
12    liveins: $sgpr0
13
14    ; CHECK-LABEL: name: ctlz_zero_undef_s32_ss
15    ; CHECK: liveins: $sgpr0
16    ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
17    ; CHECK: [[S_FLBIT_I32_B32_:%[0-9]+]]:sreg_32 = S_FLBIT_I32_B32 [[COPY]]
18    ; CHECK: S_ENDPGM 0, implicit [[S_FLBIT_I32_B32_]]
19    %0:sgpr(s32) = COPY $sgpr0
20    %1:sgpr(s32) = G_CTLZ_ZERO_UNDEF %0
21    S_ENDPGM 0, implicit %1
22...
23
24---
25name: ctlz_zero_undef_s32_vs
26legalized: true
27regBankSelected: true
28tracksRegLiveness: true
29
30body: |
31  bb.0:
32    liveins: $sgpr0
33
34    ; CHECK-LABEL: name: ctlz_zero_undef_s32_vs
35    ; CHECK: liveins: $sgpr0
36    ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
37    ; CHECK: [[V_FFBH_U32_e64_:%[0-9]+]]:vgpr_32 = V_FFBH_U32_e64 [[COPY]], implicit $exec
38    ; CHECK: S_ENDPGM 0, implicit [[V_FFBH_U32_e64_]]
39    %0:sgpr(s32) = COPY $sgpr0
40    %1:vgpr(s32) = G_CTLZ_ZERO_UNDEF %0
41    S_ENDPGM 0, implicit %1
42...
43
44---
45name: ctlz_zero_undef_s32_vv
46legalized: true
47regBankSelected: true
48tracksRegLiveness: true
49
50body: |
51  bb.0:
52    liveins: $vgpr0
53
54    ; CHECK-LABEL: name: ctlz_zero_undef_s32_vv
55    ; CHECK: liveins: $vgpr0
56    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
57    ; CHECK: [[V_FFBH_U32_e64_:%[0-9]+]]:vgpr_32 = V_FFBH_U32_e64 [[COPY]], implicit $exec
58    ; CHECK: S_ENDPGM 0, implicit [[V_FFBH_U32_e64_]]
59    %0:vgpr(s32) = COPY $vgpr0
60    %1:vgpr(s32) = G_CTLZ_ZERO_UNDEF %0
61    S_ENDPGM 0, implicit %1
62...
63
64---
65name: ctlz_zero_undef_s64_ss
66legalized: true
67regBankSelected: true
68tracksRegLiveness: true
69
70body: |
71  bb.0:
72    liveins: $sgpr0_sgpr1
73
74    ; CHECK-LABEL: name: ctlz_zero_undef_s64_ss
75    ; CHECK: liveins: $sgpr0_sgpr1
76    ; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
77    ; CHECK: [[S_FLBIT_I32_B64_:%[0-9]+]]:sreg_32 = S_FLBIT_I32_B64 [[COPY]]
78    ; CHECK: S_ENDPGM 0, implicit [[S_FLBIT_I32_B64_]]
79    %0:sgpr(s64) = COPY $sgpr0_sgpr1
80    %1:sgpr(s32) = G_CTLZ_ZERO_UNDEF %0
81    S_ENDPGM 0, implicit %1
82...
83