1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=VI %s
3
4---
5name: ffloor_s16_ss
6legalized: true
7regBankSelected: true
8tracksRegLiveness: true
9
10body: |
11  bb.0:
12    liveins: $sgpr0
13
14    ; VI-LABEL: name: ffloor_s16_ss
15    ; VI: liveins: $sgpr0
16    ; VI: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
17    ; VI: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
18    ; VI: [[FFLOOR:%[0-9]+]]:sreg_32(s16) = G_FFLOOR [[TRUNC]]
19    ; VI: [[COPY1:%[0-9]+]]:sreg_32(s32) = COPY [[FFLOOR]](s16)
20    ; VI: $sgpr0 = COPY [[COPY1]](s32)
21    %0:sgpr(s32) = COPY $sgpr0
22    %1:sgpr(s16) = G_TRUNC %0
23    %2:sgpr(s16) = G_FFLOOR %1
24    %3:sgpr(s32) = G_ANYEXT %2
25    $sgpr0 = COPY %3
26...
27
28---
29name: ffloor_s16_vv
30legalized: true
31regBankSelected: true
32tracksRegLiveness: true
33
34body: |
35  bb.0:
36    liveins: $vgpr0
37
38    ; VI-LABEL: name: ffloor_s16_vv
39    ; VI: liveins: $vgpr0
40    ; VI: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
41    ; VI: %2:vgpr_32 = nofpexcept V_FLOOR_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
42    ; VI: $vgpr0 = COPY %2
43    %0:vgpr(s32) = COPY $vgpr0
44    %1:vgpr(s16) = G_TRUNC %0
45    %2:vgpr(s16) = G_FFLOOR %1
46    %3:vgpr(s32) = G_ANYEXT %2
47    $vgpr0 = COPY %3
48...
49
50---
51name: ffloor_s16_vs
52legalized: true
53regBankSelected: true
54tracksRegLiveness: true
55
56body: |
57  bb.0:
58    liveins: $sgpr0
59
60    ; VI-LABEL: name: ffloor_s16_vs
61    ; VI: liveins: $sgpr0
62    ; VI: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
63    ; VI: %2:vgpr_32 = nofpexcept V_FLOOR_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
64    ; VI: $vgpr0 = COPY %2
65    %0:sgpr(s32) = COPY $sgpr0
66    %1:sgpr(s16) = G_TRUNC %0
67    %2:vgpr(s16) = G_FFLOOR %1
68    %3:vgpr(s32) = G_ANYEXT %2
69    $vgpr0 = COPY %3
70...
71
72---
73name: ffloor_fneg_s16_vv
74legalized: true
75regBankSelected: true
76tracksRegLiveness: true
77
78body: |
79  bb.0:
80    liveins: $vgpr0
81
82    ; SI-LABEL: name: ffloor_fneg_s16_vv
83    ; SI: liveins: $vgpr0
84    ; SI: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
85    ; SI: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
86    ; SI: [[FNEG:%[0-9]+]]:vgpr(s16) = G_FNEG [[TRUNC]]
87    ; SI: [[FFLOOR:%[0-9]+]]:vgpr(s16) = G_FFLOOR [[FNEG]]
88    ; SI: [[ANYEXT:%[0-9]+]]:vgpr(s32) = G_ANYEXT [[FFLOOR]](s16)
89    ; SI: $vgpr0 = COPY [[ANYEXT]](s32)
90    ; VI-LABEL: name: ffloor_fneg_s16_vv
91    ; VI: liveins: $vgpr0
92    ; VI: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
93    ; VI: %3:vgpr_32 = nofpexcept V_FLOOR_F16_e64 1, [[COPY]], 0, 0, implicit $mode, implicit $exec
94    ; VI: $vgpr0 = COPY %3
95    %0:vgpr(s32) = COPY $vgpr0
96    %1:vgpr(s16) = G_TRUNC %0
97    %2:vgpr(s16) = G_FNEG %1
98    %3:vgpr(s16) = G_FFLOOR %2
99    %4:vgpr(s32) = G_ANYEXT %3
100    $vgpr0 = COPY %4
101...
102