1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
3# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
4# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
5
6---
7name: fneg_s32_ss
8legalized: true
9regBankSelected: true
10tracksRegLiveness: true
11
12body: |
13  bb.0:
14    liveins: $sgpr0
15    ; GCN-LABEL: name: fneg_s32_ss
16    ; GCN: liveins: $sgpr0
17    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
18    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648
19    ; GCN: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
20    ; GCN: $sgpr0 = COPY [[S_XOR_B32_]]
21    %0:sgpr(s32) = COPY $sgpr0
22    %1:sgpr(s32) = G_FNEG %0
23    $sgpr0 = COPY %1
24...
25
26---
27name: fneg_s32_vv
28legalized: true
29regBankSelected: true
30tracksRegLiveness: true
31
32body: |
33  bb.0:
34    liveins: $vgpr0
35    ; GCN-LABEL: name: fneg_s32_vv
36    ; GCN: liveins: $vgpr0
37    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
38    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648
39    ; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[S_MOV_B32_]], [[COPY]], implicit $exec
40    ; GCN: $vgpr0 = COPY [[V_XOR_B32_e32_]]
41    %0:vgpr(s32) = COPY $vgpr0
42    %1:vgpr(s32) = G_FNEG %0
43    $vgpr0 = COPY %1
44...
45
46---
47name: fneg_s32_vs
48legalized: true
49regBankSelected: true
50tracksRegLiveness: true
51
52body: |
53  bb.0:
54    liveins: $sgpr0
55    ; GCN-LABEL: name: fneg_s32_vs
56    ; GCN: liveins: $sgpr0
57    ; GCN: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
58    ; GCN: [[FNEG:%[0-9]+]]:vgpr_32(s32) = G_FNEG [[COPY]]
59    ; GCN: $vgpr0 = COPY [[FNEG]](s32)
60    %0:sgpr(s32) = COPY $sgpr0
61    %1:vgpr(s32) = G_FNEG %0
62    $vgpr0 = COPY %1
63...
64
65---
66name: fneg_s16_ss
67legalized: true
68regBankSelected: true
69tracksRegLiveness: true
70
71body: |
72  bb.0:
73    liveins: $sgpr0
74    ; GCN-LABEL: name: fneg_s16_ss
75    ; GCN: liveins: $sgpr0
76    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
77    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768
78    ; GCN: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
79    ; GCN: $sgpr0 = COPY [[S_XOR_B32_]]
80    %0:sgpr(s32) = COPY $sgpr0
81    %1:sgpr(s16) = G_TRUNC %0
82    %2:sgpr(s16) = G_FNEG %1
83    %3:sgpr(s32) = G_ANYEXT %2
84    $sgpr0 = COPY %3
85...
86
87---
88name: fneg_s16_vv
89legalized: true
90regBankSelected: true
91tracksRegLiveness: true
92
93body: |
94  bb.0:
95    liveins: $vgpr0
96    ; GCN-LABEL: name: fneg_s16_vv
97    ; GCN: liveins: $vgpr0
98    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
99    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768
100    ; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[S_MOV_B32_]], [[COPY]], implicit $exec
101    ; GCN: $vgpr0 = COPY [[V_XOR_B32_e32_]]
102    %0:vgpr(s32) = COPY $vgpr0
103    %1:vgpr(s16) = G_TRUNC %0
104    %2:vgpr(s16) = G_FNEG %1
105    %3:vgpr(s32) = G_ANYEXT %2
106    $vgpr0 = COPY %3
107...
108
109---
110name: fneg_s16_vs
111legalized: true
112regBankSelected: true
113tracksRegLiveness: true
114
115body: |
116  bb.0:
117    liveins: $sgpr0
118
119    ; GCN-LABEL: name: fneg_s16_vs
120    ; GCN: liveins: $sgpr0
121    ; GCN: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
122    ; GCN: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
123    ; GCN: [[FNEG:%[0-9]+]]:vgpr_32(s16) = G_FNEG [[TRUNC]]
124    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FNEG]](s16)
125    ; GCN: $vgpr0 = COPY [[COPY1]](s32)
126    %0:sgpr(s32) = COPY $sgpr0
127    %1:sgpr(s16) = G_TRUNC %0
128    %2:vgpr(s16) = G_FNEG %1
129    %3:vgpr(s32) = G_ANYEXT %2
130    $vgpr0 = COPY %3
131...
132
133---
134name: fneg_v2s16_ss
135legalized: true
136regBankSelected: true
137tracksRegLiveness: true
138
139body: |
140  bb.0:
141    liveins: $sgpr0_sgpr1
142    ; GCN-LABEL: name: fneg_v2s16_ss
143    ; GCN: liveins: $sgpr0_sgpr1
144    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
145    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416
146    ; GCN: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
147    ; GCN: $sgpr0 = COPY [[S_XOR_B32_]]
148    %0:sgpr(<2 x s16>) = COPY $sgpr0
149    %1:sgpr(<2 x s16>) = G_FNEG %0
150    $sgpr0 = COPY %1
151...
152
153---
154name: fneg_v2s16_vv
155legalized: true
156regBankSelected: true
157tracksRegLiveness: true
158
159body: |
160  bb.0:
161    liveins: $vgpr0
162    ; GCN-LABEL: name: fneg_v2s16_vv
163    ; GCN: liveins: $vgpr0
164    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
165    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416
166    ; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[S_MOV_B32_]], [[COPY]], implicit $exec
167    ; GCN: $vgpr0 = COPY [[V_XOR_B32_e32_]]
168    %0:vgpr(<2 x s16>) = COPY $vgpr0
169    %1:vgpr(<2 x s16>) = G_FNEG %0
170    $vgpr0 = COPY %1
171...
172
173---
174name: fneg_v2s16_vs
175legalized: true
176regBankSelected: true
177tracksRegLiveness: true
178
179body: |
180  bb.0:
181    liveins: $sgpr0
182    ; GCN-LABEL: name: fneg_v2s16_vs
183    ; GCN: liveins: $sgpr0
184    ; GCN: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
185    ; GCN: [[FNEG:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FNEG [[COPY]]
186    ; GCN: $vgpr0 = COPY [[FNEG]](<2 x s16>)
187    %0:sgpr(<2 x s16>) = COPY $sgpr0
188    %1:vgpr(<2 x s16>) = G_FNEG %0
189    $vgpr0 = COPY %1
190...
191
192---
193name: fneg_s64_ss
194legalized: true
195regBankSelected: true
196tracksRegLiveness: true
197
198body: |
199  bb.0:
200    liveins: $sgpr0_sgpr1
201    ; GCN-LABEL: name: fneg_s64_ss
202    ; GCN: liveins: $sgpr0_sgpr1
203    ; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
204    ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
205    ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
206    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648
207    ; GCN: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc
208    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[S_XOR_B32_]], %subreg.sub1
209    ; GCN: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
210    %0:sgpr(s64) = COPY $sgpr0_sgpr1
211    %1:sgpr(s64) = G_FNEG %0
212    S_ENDPGM 0, implicit %1
213...
214
215---
216name: fneg_s64_vv
217legalized: true
218regBankSelected: true
219tracksRegLiveness: true
220
221body: |
222  bb.0:
223    liveins: $vgpr0_vgpr1
224    ; GCN-LABEL: name: fneg_s64_vv
225    ; GCN: liveins: $vgpr0_vgpr1
226    ; GCN: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
227    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2147483648, implicit $exec
228    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
229    ; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[COPY1]], [[V_MOV_B32_e32_]], implicit $exec
230    ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
231    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_XOR_B32_e32_]], %subreg.sub1
232    ; GCN: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
233    %0:vgpr(s64) = COPY $vgpr0_vgpr1
234    %1:vgpr(s64) = G_FNEG %0
235    S_ENDPGM 0, implicit %1
236...
237
238---
239name: fneg_s64_vs
240legalized: true
241regBankSelected: true
242tracksRegLiveness: true
243
244body: |
245  bb.0:
246    liveins: $sgpr0_sgpr1
247    ; GCN-LABEL: name: fneg_s64_vs
248    ; GCN: liveins: $sgpr0_sgpr1
249    ; GCN: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
250    ; GCN: [[FNEG:%[0-9]+]]:vgpr(s64) = G_FNEG [[COPY]]
251    ; GCN: S_ENDPGM 0, implicit [[FNEG]](s64)
252    %0:sgpr(s64) = COPY $sgpr0_sgpr1
253    %1:vgpr(s64) = G_FNEG %0
254    S_ENDPGM 0, implicit %1
255
256...
257
258---
259name: fneg_fabs_s32_ss
260legalized: true
261regBankSelected: true
262tracksRegLiveness: true
263
264body: |
265  bb.0:
266    liveins: $sgpr0_sgpr1
267    ; GCN-LABEL: name: fneg_fabs_s32_ss
268    ; GCN: liveins: $sgpr0_sgpr1
269    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
270    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648
271    ; GCN: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
272    ; GCN: S_ENDPGM 0, implicit [[S_OR_B32_]]
273    %0:sgpr(s32) = COPY $sgpr0
274    %1:sgpr(s32) = G_FABS %0
275    %2:sgpr(s32) = G_FNEG %1
276    S_ENDPGM 0, implicit %2
277...
278
279---
280name: fneg_fabs_s32_vv
281legalized: true
282regBankSelected: true
283tracksRegLiveness: true
284
285body: |
286  bb.0:
287    liveins: $vgpr0
288    ; GCN-LABEL: name: fneg_fabs_s32_vv
289    ; GCN: liveins: $vgpr0
290    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
291    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648
292    ; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[S_MOV_B32_]], [[COPY]], implicit $exec
293    ; GCN: S_ENDPGM 0, implicit [[V_XOR_B32_e32_]]
294    %0:vgpr(s32) = COPY $vgpr0
295    %1:vgpr(s32) = G_FABS %0
296    %2:vgpr(s32) = G_FNEG %0
297    S_ENDPGM 0, implicit %2
298...
299
300---
301name: fneg_fabs_s32_vs
302legalized: true
303regBankSelected: true
304tracksRegLiveness: true
305
306body: |
307  bb.0:
308    liveins: $sgpr0
309    ; GCN-LABEL: name: fneg_fabs_s32_vs
310    ; GCN: liveins: $sgpr0
311    ; GCN: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
312    ; GCN: [[FABS:%[0-9]+]]:vgpr_32(s32) = G_FABS [[COPY]]
313    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s16) = S_MOV_B32 2147483648
314    ; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32(s32) = V_XOR_B32_e32 [[S_MOV_B32_]](s16), [[FABS]](s32), implicit $exec
315    ; GCN: S_ENDPGM 0, implicit [[V_XOR_B32_e32_]](s32)
316    %0:sgpr(s32) = COPY $sgpr0
317    %1:vgpr(s32) = G_FABS %0
318    %2:vgpr(s32) = G_FNEG %1
319    S_ENDPGM 0, implicit %2
320...
321
322---
323name: fneg_fabs_s16_ss
324legalized: true
325regBankSelected: true
326tracksRegLiveness: true
327
328body: |
329  bb.0:
330    liveins: $sgpr0
331    ; GCN-LABEL: name: fneg_fabs_s16_ss
332    ; GCN: liveins: $sgpr0
333    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
334    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768
335    ; GCN: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
336    ; GCN: $sgpr0 = COPY [[S_OR_B32_]]
337    %0:sgpr(s32) = COPY $sgpr0
338    %1:sgpr(s16) = G_TRUNC %0
339    %2:sgpr(s16) = G_FABS %1
340    %3:sgpr(s16) = G_FNEG %2
341    %4:sgpr(s32) = G_ANYEXT %3
342    $sgpr0 = COPY %4
343...
344
345---
346name: fneg_fabs_s16_vv
347legalized: true
348regBankSelected: true
349tracksRegLiveness: true
350
351body: |
352  bb.0:
353    liveins: $vgpr0
354    ; GCN-LABEL: name: fneg_fabs_s16_vv
355    ; GCN: liveins: $vgpr0
356    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
357    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768
358    ; GCN: [[V_OR_B32_e32_:%[0-9]+]]:vgpr_32 = V_OR_B32_e32 [[S_MOV_B32_]], [[COPY]], implicit $exec
359    ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[V_OR_B32_e32_]]
360    ; GCN: $vgpr0 = COPY [[COPY1]]
361    %0:vgpr(s32) = COPY $vgpr0
362    %1:vgpr(s16) = G_TRUNC %0
363    %2:vgpr(s16) = G_FABS %1
364    %3:vgpr(s16) = G_FNEG %2
365    %4:sgpr(s32) = G_ANYEXT %3
366    $vgpr0 = COPY %4
367...
368
369---
370name: fneg_fabs_s16_vs
371legalized: true
372regBankSelected: true
373tracksRegLiveness: true
374
375body: |
376  bb.0:
377    liveins: $sgpr0
378
379    ; GCN-LABEL: name: fneg_fabs_s16_vs
380    ; GCN: liveins: $sgpr0
381    ; GCN: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
382    ; GCN: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
383    ; GCN: [[FNEG:%[0-9]+]]:sgpr(s16) = G_FNEG [[TRUNC]]
384    ; GCN: [[FNEG1:%[0-9]+]]:vgpr_32(s16) = G_FNEG [[FNEG]]
385    ; GCN: [[COPY1:%[0-9]+]]:sreg_32(s32) = COPY [[FNEG1]](s16)
386    ; GCN: $vgpr0 = COPY [[COPY1]](s32)
387    %0:sgpr(s32) = COPY $sgpr0
388    %1:sgpr(s16) = G_TRUNC %0
389    %2:sgpr(s16) = G_FNEG %1
390    %3:vgpr(s16) = G_FNEG %2
391    %4:sgpr(s32) = G_ANYEXT %3
392    $vgpr0 = COPY %4
393...
394
395---
396name: fneg_fabs_v2s16_ss
397legalized: true
398regBankSelected: true
399tracksRegLiveness: true
400
401body: |
402  bb.0:
403    liveins: $sgpr0_sgpr1
404    ; GCN-LABEL: name: fneg_fabs_v2s16_ss
405    ; GCN: liveins: $sgpr0_sgpr1
406    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
407    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416
408    ; GCN: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
409    ; GCN: $sgpr0 = COPY [[S_OR_B32_]]
410    %0:sgpr(<2 x s16>) = COPY $sgpr0
411    %1:sgpr(<2 x s16>) = G_FABS %0
412    %2:sgpr(<2 x s16>) = G_FNEG %1
413    $sgpr0 = COPY %2
414...
415
416---
417name: fneg_fabs_v2s16_vv
418legalized: true
419regBankSelected: true
420tracksRegLiveness: true
421
422body: |
423  bb.0:
424    liveins: $vgpr0
425    ; GCN-LABEL: name: fneg_fabs_v2s16_vv
426    ; GCN: liveins: $vgpr0
427    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
428    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416
429    ; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[S_MOV_B32_]], [[COPY]], implicit $exec
430    ; GCN: $vgpr0 = COPY [[V_XOR_B32_e32_]]
431    %0:vgpr(<2 x s16>) = COPY $vgpr0
432    %1:vgpr(<2 x s16>) = G_FABS %0
433    %2:vgpr(<2 x s16>) = G_FNEG %0
434    $vgpr0 = COPY %2
435...
436
437---
438name: fneg_fabs_v2s16_vs
439legalized: true
440regBankSelected: true
441tracksRegLiveness: true
442
443body: |
444  bb.0:
445    liveins: $sgpr0
446    ; GCN-LABEL: name: fneg_fabs_v2s16_vs
447    ; GCN: liveins: $sgpr0
448    ; GCN: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
449    ; GCN: [[FABS:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FABS [[COPY]]
450    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s16) = S_MOV_B32 2147516416
451    ; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32(<2 x s16>) = V_XOR_B32_e32 [[S_MOV_B32_]](s16), [[FABS]](<2 x s16>), implicit $exec
452    ; GCN: $vgpr0 = COPY [[V_XOR_B32_e32_]](<2 x s16>)
453    %0:sgpr(<2 x s16>) = COPY $sgpr0
454    %1:vgpr(<2 x s16>) = G_FABS %0
455    %2:vgpr(<2 x s16>) = G_FNEG %1
456    $vgpr0 = COPY %2
457...
458
459---
460name: fneg_fabs_s64_ss
461legalized: true
462regBankSelected: true
463tracksRegLiveness: true
464
465body: |
466  bb.0:
467    liveins: $sgpr0_sgpr1
468    ; GCN-LABEL: name: fneg_fabs_s64_ss
469    ; GCN: liveins: $sgpr0_sgpr1
470    ; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
471    ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
472    ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
473    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648
474    ; GCN: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc
475    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[S_OR_B32_]], %subreg.sub1
476    ; GCN: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
477    %0:sgpr(s64) = COPY $sgpr0_sgpr1
478    %1:sgpr(s64) = G_FABS %0
479    %2:sgpr(s64) = G_FNEG %1
480    S_ENDPGM 0, implicit %2
481...
482
483---
484name: fneg_fabs_s64_vv
485legalized: true
486regBankSelected: true
487tracksRegLiveness: true
488
489body: |
490  bb.0:
491    liveins: $vgpr0_vgpr1
492    ; GCN-LABEL: name: fneg_fabs_s64_vv
493    ; GCN: liveins: $vgpr0_vgpr1
494    ; GCN: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
495    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2147483648, implicit $exec
496    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
497    ; GCN: [[V_OR_B32_e32_:%[0-9]+]]:vgpr_32 = V_OR_B32_e32 [[COPY1]], [[V_MOV_B32_e32_]], implicit $exec
498    ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
499    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_OR_B32_e32_]], %subreg.sub1
500    ; GCN: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
501    %0:vgpr(s64) = COPY $vgpr0_vgpr1
502    %1:vgpr(s64) = G_FABS %0
503    %2:vgpr(s64) = G_FNEG %1
504    S_ENDPGM 0, implicit %2
505...
506
507---
508name: fneg_fabs_s64_vs
509legalized: true
510regBankSelected: true
511tracksRegLiveness: true
512
513body: |
514  bb.0:
515    liveins: $sgpr0_sgpr1
516    ; GCN-LABEL: name: fneg_fabs_s64_vs
517    ; GCN: liveins: $sgpr0_sgpr1
518    ; GCN: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
519    ; GCN: [[FABS:%[0-9]+]]:vreg_64(s64) = G_FABS [[COPY]]
520    ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32(s32) = V_MOV_B32_e32 2147483648, implicit $exec
521    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]].sub1(s64)
522    ; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32(s16) = V_XOR_B32_e32 [[COPY1]](s32), [[V_MOV_B32_e32_]](s32), implicit $exec
523    ; GCN: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]].sub0(s64)
524    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:vreg_64(s64) = REG_SEQUENCE [[COPY2]](s32), %subreg.sub0, [[V_XOR_B32_e32_]](s16), %subreg.sub1
525    ; GCN: S_ENDPGM 0, implicit [[REG_SEQUENCE]](s64)
526    %0:sgpr(s64) = COPY $sgpr0_sgpr1
527    %1:vgpr(s64) = G_FABS %0
528    %2:vgpr(s64) = G_FNEG %1
529    S_ENDPGM 0, implicit %2
530...
531