1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
3# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
4# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
5# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
6
7---
8
9name:            fshr_s32
10legalized:       true
11regBankSelected: true
12
13body: |
14  bb.0:
15    liveins: $vgpr0, $vgpr1, $vgpr2
16
17    ; GCN-LABEL: name: fshr_s32
18    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
19    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
20    ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
21    ; GCN: [[V_ALIGNBIT_B32_:%[0-9]+]]:vgpr_32 = V_ALIGNBIT_B32 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
22    ; GCN: S_ENDPGM 0, implicit [[V_ALIGNBIT_B32_]]
23    %0:vgpr(s32) = COPY $vgpr0
24    %1:vgpr(s32) = COPY $vgpr1
25    %2:vgpr(s32) = COPY $vgpr2
26    %3:vgpr(s32) = G_FSHR %0, %1, %2
27    S_ENDPGM 0, implicit %3
28
29...
30