1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX10 %s
5
6---
7
8name:            add_s32_sgpr_sgpr_sgpr
9legalized:       true
10regBankSelected: true
11tracksRegLiveness: true
12
13body: |
14  bb.0:
15    liveins: $sgpr0, $sgpr1, $sgpr2
16    ; GFX8-LABEL: name: add_s32_sgpr_sgpr_sgpr
17    ; GFX8: liveins: $sgpr0, $sgpr1, $sgpr2
18    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
19    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
20    ; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
21    ; GFX8: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
22    ; GFX8: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
23    ; GFX8: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
24    ; GFX9-LABEL: name: add_s32_sgpr_sgpr_sgpr
25    ; GFX9: liveins: $sgpr0, $sgpr1, $sgpr2
26    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
27    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
28    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
29    ; GFX9: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
30    ; GFX9: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
31    ; GFX9: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
32    ; GFX10-LABEL: name: add_s32_sgpr_sgpr_sgpr
33    ; GFX10: liveins: $sgpr0, $sgpr1, $sgpr2
34    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
35    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
36    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
37    ; GFX10: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
38    ; GFX10: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
39    ; GFX10: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
40    %0:sgpr(s32) = COPY $sgpr0
41    %1:sgpr(s32) = COPY $sgpr1
42    %2:sgpr(s32) = COPY $sgpr2
43    %3:sgpr(s32) = G_ADD %0, %1
44    %4:sgpr(s32) = G_ADD %3, %2
45    S_ENDPGM 0, implicit %4
46...
47
48---
49
50name:            add_s32_vgpr_vgpr_vgpr
51legalized:       true
52regBankSelected: true
53tracksRegLiveness: true
54
55body: |
56  bb.0:
57    liveins: $vgpr0, $vgpr1, $vgpr2
58    ; GFX8-LABEL: name: add_s32_vgpr_vgpr_vgpr
59    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
60    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
61    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
62    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
63    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
64    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
65    ; GFX8: S_ENDPGM 0, implicit %4
66    ; GFX9-LABEL: name: add_s32_vgpr_vgpr_vgpr
67    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
68    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
69    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
70    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
71    ; GFX9: [[V_ADD3_U32_:%[0-9]+]]:vgpr_32 = V_ADD3_U32 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
72    ; GFX9: S_ENDPGM 0, implicit [[V_ADD3_U32_]]
73    ; GFX10-LABEL: name: add_s32_vgpr_vgpr_vgpr
74    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
75    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
76    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
77    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
78    ; GFX10: [[V_ADD3_U32_:%[0-9]+]]:vgpr_32 = V_ADD3_U32 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
79    ; GFX10: S_ENDPGM 0, implicit [[V_ADD3_U32_]]
80    %0:vgpr(s32) = COPY $vgpr0
81    %1:vgpr(s32) = COPY $vgpr1
82    %2:vgpr(s32) = COPY $vgpr2
83    %3:vgpr(s32) = G_ADD %0, %1
84    %4:vgpr(s32) = G_ADD %3, %2
85    S_ENDPGM 0, implicit %4
86...
87
88---
89
90name:            add_s32_vgpr_vgpr_vgpr_multi_use
91legalized:       true
92regBankSelected: true
93tracksRegLiveness: true
94
95body: |
96  bb.0:
97    liveins: $vgpr0, $vgpr1, $vgpr2
98    ; GFX8-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
99    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
100    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
101    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
102    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
103    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
104    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
105    ; GFX8: S_ENDPGM 0, implicit %4, implicit %3
106    ; GFX9-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
107    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
108    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
109    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
110    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
111    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
112    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
113    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_]]
114    ; GFX10-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
115    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
116    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
117    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
118    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
119    ; GFX10: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
120    ; GFX10: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
121    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_]]
122    %0:vgpr(s32) = COPY $vgpr0
123    %1:vgpr(s32) = COPY $vgpr1
124    %2:vgpr(s32) = COPY $vgpr2
125    %3:vgpr(s32) = G_ADD %0, %1
126    %4:vgpr(s32) = G_ADD %3, %2
127    S_ENDPGM 0, implicit %4, implicit %3
128...
129
130---
131
132name:            add_p3_vgpr_vgpr_vgpr
133legalized:       true
134regBankSelected: true
135tracksRegLiveness: true
136
137body: |
138  bb.0:
139    liveins: $vgpr0, $vgpr1, $vgpr2
140
141    ; GFX8-LABEL: name: add_p3_vgpr_vgpr_vgpr
142    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
143    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
144    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
145    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
146    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
147    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
148    ; GFX8: S_ENDPGM 0, implicit %4
149    ; GFX9-LABEL: name: add_p3_vgpr_vgpr_vgpr
150    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
151    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
152    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
153    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
154    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
155    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
156    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
157    ; GFX10-LABEL: name: add_p3_vgpr_vgpr_vgpr
158    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
159    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
160    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
161    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
162    ; GFX10: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
163    ; GFX10: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
164    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
165    %0:vgpr(p3) = COPY $vgpr0
166    %1:vgpr(s32) = COPY $vgpr1
167    %2:vgpr(s32) = COPY $vgpr2
168    %3:vgpr(p3) = G_PTR_ADD %0, %1
169    %4:vgpr(p3) = G_PTR_ADD %3, %2
170    S_ENDPGM 0, implicit %4
171...
172
173---
174
175name:            add_p5_vgpr_vgpr_vgpr
176legalized:       true
177regBankSelected: true
178tracksRegLiveness: true
179
180body: |
181  bb.0:
182    liveins: $vgpr0, $vgpr1, $vgpr2
183
184    ; GFX8-LABEL: name: add_p5_vgpr_vgpr_vgpr
185    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
186    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
187    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
188    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
189    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
190    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
191    ; GFX8: S_ENDPGM 0, implicit %4
192    ; GFX9-LABEL: name: add_p5_vgpr_vgpr_vgpr
193    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
194    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
195    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
196    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
197    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
198    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
199    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
200    ; GFX10-LABEL: name: add_p5_vgpr_vgpr_vgpr
201    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
202    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
203    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
204    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
205    ; GFX10: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
206    ; GFX10: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
207    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
208    %0:vgpr(p5) = COPY $vgpr0
209    %1:vgpr(s32) = COPY $vgpr1
210    %2:vgpr(s32) = COPY $vgpr2
211    %3:vgpr(p5) = G_PTR_ADD %0, %1
212    %4:vgpr(p5) = G_PTR_ADD %3, %2
213    S_ENDPGM 0, implicit %4
214...
215
216---
217
218name:            add_p3_s32_vgpr_vgpr_vgpr
219legalized:       true
220regBankSelected: true
221tracksRegLiveness: true
222
223body: |
224  bb.0:
225    liveins: $vgpr0, $vgpr1, $vgpr2
226
227    ; GFX8-LABEL: name: add_p3_s32_vgpr_vgpr_vgpr
228    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
229    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
230    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
231    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
232    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
233    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY2]], %3, 0, implicit $exec
234    ; GFX8: S_ENDPGM 0, implicit %4
235    ; GFX9-LABEL: name: add_p3_s32_vgpr_vgpr_vgpr
236    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
237    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
238    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
239    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
240    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
241    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], [[V_ADD_U32_e64_]], 0, implicit $exec
242    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
243    ; GFX10-LABEL: name: add_p3_s32_vgpr_vgpr_vgpr
244    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
245    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
246    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
247    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
248    ; GFX10: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
249    ; GFX10: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], [[V_ADD_U32_e64_]], 0, implicit $exec
250    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
251    %0:vgpr(s32) = COPY $vgpr0
252    %1:vgpr(s32) = COPY $vgpr1
253    %2:vgpr(p3) = COPY $vgpr2
254    %3:vgpr(s32) = G_ADD %0, %1
255    %4:vgpr(p3) = G_PTR_ADD %2, %3
256    S_ENDPGM 0, implicit %4
257...
258
259---
260
261name:            add_p5_s32_vgpr_vgpr_vgpr
262legalized:       true
263regBankSelected: true
264tracksRegLiveness: true
265
266body: |
267  bb.0:
268    liveins: $vgpr0, $vgpr1, $vgpr2
269
270    ; GFX8-LABEL: name: add_p5_s32_vgpr_vgpr_vgpr
271    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
272    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
273    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
274    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
275    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
276    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY2]], %3, 0, implicit $exec
277    ; GFX8: S_ENDPGM 0, implicit %4
278    ; GFX9-LABEL: name: add_p5_s32_vgpr_vgpr_vgpr
279    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
280    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
281    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
282    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
283    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
284    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], [[V_ADD_U32_e64_]], 0, implicit $exec
285    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
286    ; GFX10-LABEL: name: add_p5_s32_vgpr_vgpr_vgpr
287    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
288    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
289    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
290    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
291    ; GFX10: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
292    ; GFX10: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], [[V_ADD_U32_e64_]], 0, implicit $exec
293    ; GFX10: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
294    %0:vgpr(s32) = COPY $vgpr0
295    %1:vgpr(s32) = COPY $vgpr1
296    %2:vgpr(p5) = COPY $vgpr2
297    %3:vgpr(s32) = G_ADD %0, %1
298    %4:vgpr(p5) = G_PTR_ADD %2, %3
299    S_ENDPGM 0, implicit %4
300...
301