1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX10 %s
5
6---
7
8name:            xor_s32_sgpr_sgpr_sgpr
9legalized:       true
10regBankSelected: true
11tracksRegLiveness: true
12
13body: |
14  bb.0:
15    liveins: $sgpr0, $sgpr1, $sgpr2
16    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_sgpr
17    ; GFX8: liveins: $sgpr0, $sgpr1, $sgpr2
18    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
19    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
20    ; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
21    ; GFX8: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
22    ; GFX8: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_XOR_B32_]], [[COPY2]], implicit-def $scc
23    ; GFX8: S_ENDPGM 0, implicit [[S_XOR_B32_1]]
24    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_sgpr
25    ; GFX9: liveins: $sgpr0, $sgpr1, $sgpr2
26    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
27    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
28    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
29    ; GFX9: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
30    ; GFX9: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_XOR_B32_]], [[COPY2]], implicit-def $scc
31    ; GFX9: S_ENDPGM 0, implicit [[S_XOR_B32_1]]
32    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_sgpr
33    ; GFX10: liveins: $sgpr0, $sgpr1, $sgpr2
34    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
35    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
36    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
37    ; GFX10: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
38    ; GFX10: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_XOR_B32_]], [[COPY2]], implicit-def $scc
39    ; GFX10: S_ENDPGM 0, implicit [[S_XOR_B32_1]]
40    %0:sgpr(s32) = COPY $sgpr0
41    %1:sgpr(s32) = COPY $sgpr1
42    %2:sgpr(s32) = COPY $sgpr2
43    %3:sgpr(s32) = G_XOR %0, %1
44    %4:sgpr(s32) = G_XOR %3, %2
45    S_ENDPGM 0, implicit %4
46...
47
48---
49
50name:            xor_s32_vgpr_vgpr_vgpr
51legalized:       true
52regBankSelected: true
53tracksRegLiveness: true
54
55body: |
56  bb.0:
57    liveins: $vgpr0, $vgpr1, $vgpr2
58    ; GFX8-LABEL: name: xor_s32_vgpr_vgpr_vgpr
59    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
60    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
61    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
62    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
63    ; GFX8: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
64    ; GFX8: [[V_XOR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[V_XOR_B32_e64_]], [[COPY2]], implicit $exec
65    ; GFX8: S_ENDPGM 0, implicit [[V_XOR_B32_e64_1]]
66    ; GFX9-LABEL: name: xor_s32_vgpr_vgpr_vgpr
67    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
68    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
69    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
70    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
71    ; GFX9: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
72    ; GFX9: [[V_XOR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[V_XOR_B32_e64_]], [[COPY2]], implicit $exec
73    ; GFX9: S_ENDPGM 0, implicit [[V_XOR_B32_e64_1]]
74    ; GFX10-LABEL: name: xor_s32_vgpr_vgpr_vgpr
75    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
76    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
77    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
78    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
79    ; GFX10: [[V_XOR3_B32_:%[0-9]+]]:vgpr_32 = V_XOR3_B32 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
80    ; GFX10: S_ENDPGM 0, implicit [[V_XOR3_B32_]]
81    %0:vgpr(s32) = COPY $vgpr0
82    %1:vgpr(s32) = COPY $vgpr1
83    %2:vgpr(s32) = COPY $vgpr2
84    %3:vgpr(s32) = G_XOR %0, %1
85    %4:vgpr(s32) = G_XOR %3, %2
86    S_ENDPGM 0, implicit %4
87...
88
89# Mixed SGPR and VGPR, with full copy from scalar xor to VGPR, as
90#should actually be produced by RegBankSelect
91
92---
93
94name:            xor_s32_sgpr_sgpr_vgpr_copy
95legalized:       true
96regBankSelected: true
97tracksRegLiveness: true
98
99body: |
100  bb.0:
101    liveins: $sgpr0, $sgpr1, $vgpr0
102
103    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy
104    ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0
105    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
106    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
107    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
108    ; GFX8: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
109    ; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
110    ; GFX8: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec
111    ; GFX8: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
112    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy
113    ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0
114    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
115    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
116    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
117    ; GFX9: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
118    ; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
119    ; GFX9: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec
120    ; GFX9: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
121    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy
122    ; GFX10: liveins: $sgpr0, $sgpr1, $vgpr0
123    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
124    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
125    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
126    ; GFX10: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
127    ; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
128    ; GFX10: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec
129    ; GFX10: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
130    %0:sgpr(s32) = COPY $sgpr0
131    %1:sgpr(s32) = COPY $sgpr1
132    %2:vgpr(s32) = COPY $vgpr0
133    %3:sgpr(s32) = G_XOR %0, %1
134    %4:vgpr(s32) = COPY %3
135    %5:vgpr(s32) = G_XOR %4, %2
136    S_ENDPGM 0, implicit %5
137...
138
139---
140
141name:            xor_s32_sgpr_sgpr_vgpr_copy_commute
142legalized:       true
143regBankSelected: true
144tracksRegLiveness: true
145
146body: |
147  bb.0:
148    liveins: $sgpr0, $sgpr1, $vgpr0
149
150    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy_commute
151    ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0
152    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
153    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
154    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
155    ; GFX8: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
156    ; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
157    ; GFX8: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY2]], [[COPY3]], implicit $exec
158    ; GFX8: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
159    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy_commute
160    ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0
161    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
162    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
163    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
164    ; GFX9: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
165    ; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
166    ; GFX9: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY2]], [[COPY3]], implicit $exec
167    ; GFX9: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
168    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy_commute
169    ; GFX10: liveins: $sgpr0, $sgpr1, $vgpr0
170    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
171    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
172    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
173    ; GFX10: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
174    ; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
175    ; GFX10: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY2]], [[COPY3]], implicit $exec
176    ; GFX10: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
177    %0:sgpr(s32) = COPY $sgpr0
178    %1:sgpr(s32) = COPY $sgpr1
179    %2:vgpr(s32) = COPY $vgpr0
180    %3:sgpr(s32) = G_XOR %0, %1
181    %4:vgpr(s32) = COPY %3
182    %5:vgpr(s32) = G_XOR %2, %4
183    S_ENDPGM 0, implicit %5
184...
185
186---
187
188name:            xor_s32_sgpr_sgpr_vgpr
189legalized:       true
190regBankSelected: true
191tracksRegLiveness: true
192
193body: |
194  bb.0:
195    liveins: $sgpr0, $sgpr1, $vgpr0
196
197    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_vgpr
198    ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0
199    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
200    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
201    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
202    ; GFX8: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
203    ; GFX8: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_XOR_B32_]], [[COPY2]], implicit $exec
204    ; GFX8: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
205    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_vgpr
206    ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0
207    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
208    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
209    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
210    ; GFX9: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
211    ; GFX9: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_XOR_B32_]], [[COPY2]], implicit $exec
212    ; GFX9: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
213    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_vgpr
214    ; GFX10: liveins: $sgpr0, $sgpr1, $vgpr0
215    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
216    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
217    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
218    ; GFX10: [[V_XOR3_B32_:%[0-9]+]]:vgpr_32 = V_XOR3_B32 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
219    ; GFX10: S_ENDPGM 0, implicit [[V_XOR3_B32_]]
220    %0:sgpr(s32) = COPY $sgpr0
221    %1:sgpr(s32) = COPY $sgpr1
222    %2:vgpr(s32) = COPY $vgpr0
223    %3:sgpr(s32) = G_XOR %0, %1
224    %4:vgpr(s32) = G_XOR %3, %2
225    S_ENDPGM 0, implicit %4
226...
227