1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck -check-prefix=GCN %s
3
4---
5
6name: sext_inreg_sgpr_s32_1
7legalized:       true
8regBankSelected: true
9body: |
10  bb.0:
11    liveins: $sgpr0
12
13    ; GCN-LABEL: name: sext_inreg_sgpr_s32_1
14    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
15    ; GCN: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 65536, implicit-def $scc
16    ; GCN: $sgpr0 = COPY [[S_BFE_I32_]]
17    %0:sgpr(s32) = COPY $sgpr0
18    %1:sgpr(s32) = G_SEXT_INREG %0, 1
19    $sgpr0 = COPY %1
20...
21
22---
23
24name: sext_inreg_sgpr_s32_2
25legalized:       true
26regBankSelected: true
27body: |
28  bb.0:
29    liveins: $sgpr0
30
31    ; GCN-LABEL: name: sext_inreg_sgpr_s32_2
32    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
33    ; GCN: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 131072, implicit-def $scc
34    ; GCN: $sgpr0 = COPY [[S_BFE_I32_]]
35    %0:sgpr(s32) = COPY $sgpr0
36    %1:sgpr(s32) = G_SEXT_INREG %0, 2
37    $sgpr0 = COPY %1
38...
39
40---
41
42name: sext_inreg_sgpr_s32_8
43legalized:       true
44regBankSelected: true
45body: |
46  bb.0:
47    liveins: $sgpr0
48
49    ; GCN-LABEL: name: sext_inreg_sgpr_s32_8
50    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
51    ; GCN: [[S_SEXT_I32_I8_:%[0-9]+]]:sreg_32 = S_SEXT_I32_I8 [[COPY]]
52    ; GCN: $sgpr0 = COPY [[S_SEXT_I32_I8_]]
53    %0:sgpr(s32) = COPY $sgpr0
54    %1:sgpr(s32) = G_SEXT_INREG %0, 8
55    $sgpr0 = COPY %1
56...
57
58---
59
60name: sext_inreg_sgpr_s32_16
61legalized:       true
62regBankSelected: true
63body: |
64  bb.0:
65    liveins: $sgpr0
66
67    ; GCN-LABEL: name: sext_inreg_sgpr_s32_16
68    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
69    ; GCN: [[S_SEXT_I32_I16_:%[0-9]+]]:sreg_32 = S_SEXT_I32_I16 [[COPY]]
70    ; GCN: $sgpr0 = COPY [[S_SEXT_I32_I16_]]
71    %0:sgpr(s32) = COPY $sgpr0
72    %1:sgpr(s32) = G_SEXT_INREG %0, 16
73    $sgpr0 = COPY %1
74...
75
76---
77
78name: sext_inreg_sgpr_s32_31
79legalized:       true
80regBankSelected: true
81body: |
82  bb.0:
83    liveins: $sgpr0
84
85    ; GCN-LABEL: name: sext_inreg_sgpr_s32_31
86    ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
87    ; GCN: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 2031616, implicit-def $scc
88    ; GCN: $sgpr0 = COPY [[S_BFE_I32_]]
89    %0:sgpr(s32) = COPY $sgpr0
90    %1:sgpr(s32) = G_SEXT_INREG %0, 31
91    $sgpr0 = COPY %1
92...
93
94---
95
96name: sext_inreg_sgpr_s64_1
97legalized:       true
98regBankSelected: true
99body: |
100  bb.0:
101    liveins: $sgpr0_sgpr1
102
103    ; GCN-LABEL: name: sext_inreg_sgpr_s64_1
104    ; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
105    ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
106    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
107    ; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 65536, implicit-def $scc
108    ; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
109    %0:sgpr(s64) = COPY $sgpr0_sgpr1
110    %1:sgpr(s64) = G_SEXT_INREG %0, 1
111    $sgpr0_sgpr1 = COPY %1
112...
113
114---
115
116name: sext_inreg_sgpr_s64_2
117legalized:       true
118regBankSelected: true
119body: |
120  bb.0:
121    liveins: $sgpr0_sgpr1
122
123    ; GCN-LABEL: name: sext_inreg_sgpr_s64_2
124    ; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
125    ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
126    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
127    ; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 131072, implicit-def $scc
128    ; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
129    %0:sgpr(s64) = COPY $sgpr0_sgpr1
130    %1:sgpr(s64) = G_SEXT_INREG %0, 2
131    $sgpr0_sgpr1 = COPY %1
132...
133
134---
135
136name: sext_inreg_sgpr_s64_8
137legalized:       true
138regBankSelected: true
139body: |
140  bb.0:
141    liveins: $sgpr0_sgpr1
142
143    ; GCN-LABEL: name: sext_inreg_sgpr_s64_8
144    ; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
145    ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
146    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
147    ; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 524288, implicit-def $scc
148    ; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
149    %0:sgpr(s64) = COPY $sgpr0_sgpr1
150    %1:sgpr(s64) = G_SEXT_INREG %0, 8
151    $sgpr0_sgpr1 = COPY %1
152...
153
154---
155
156name: sext_inreg_sgpr_s64_16
157legalized:       true
158regBankSelected: true
159body: |
160  bb.0:
161    liveins: $sgpr0_sgpr1
162
163    ; GCN-LABEL: name: sext_inreg_sgpr_s64_16
164    ; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
165    ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
166    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
167    ; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 1048576, implicit-def $scc
168    ; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
169    %0:sgpr(s64) = COPY $sgpr0_sgpr1
170    %1:sgpr(s64) = G_SEXT_INREG %0, 16
171    $sgpr0_sgpr1 = COPY %1
172...
173
174---
175
176name: sext_inreg_sgpr_s64_31
177legalized:       true
178regBankSelected: true
179body: |
180  bb.0:
181    liveins: $sgpr0_sgpr1
182
183    ; GCN-LABEL: name: sext_inreg_sgpr_s64_31
184    ; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
185    ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
186    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
187    ; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 2031616, implicit-def $scc
188    ; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
189    %0:sgpr(s64) = COPY $sgpr0_sgpr1
190    %1:sgpr(s64) = G_SEXT_INREG %0, 31
191    $sgpr0_sgpr1 = COPY %1
192...
193
194# Ideally this degenerate case would have been replaceed with a 32-bit shift by combines.
195---
196
197name: sext_inreg_sgpr_s64_32
198legalized:       true
199regBankSelected: true
200body: |
201  bb.0:
202    liveins: $sgpr0_sgpr1
203
204    ; GCN-LABEL: name: sext_inreg_sgpr_s64_32
205    ; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
206    ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
207    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
208    ; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 2097152, implicit-def $scc
209    ; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
210    %0:sgpr(s64) = COPY $sgpr0_sgpr1
211    %1:sgpr(s64) = G_SEXT_INREG %0, 32
212    $sgpr0_sgpr1 = COPY %1
213...
214
215---
216
217name: sext_inreg_sgpr_s64_63
218legalized:       true
219regBankSelected: true
220body: |
221  bb.0:
222    liveins: $sgpr0_sgpr1
223
224    ; GCN-LABEL: name: sext_inreg_sgpr_s64_63
225    ; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
226    ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
227    ; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
228    ; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 4128768, implicit-def $scc
229    ; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
230    %0:sgpr(s64) = COPY $sgpr0_sgpr1
231    %1:sgpr(s64) = G_SEXT_INREG %0, 63
232    $sgpr0_sgpr1 = COPY %1
233...
234
235---
236
237name: sext_inreg_vgpr_s32_1
238legalized:       true
239regBankSelected: true
240body: |
241  bb.0:
242    liveins: $vgpr0
243
244    ; GCN-LABEL: name: sext_inreg_vgpr_s32_1
245    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
246    ; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 1, implicit $exec
247    ; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
248    %0:vgpr(s32) = COPY $vgpr0
249    %1:vgpr(s32) = G_SEXT_INREG %0, 1
250    $vgpr0 = COPY %1
251...
252
253---
254
255name: sext_inreg_vgpr_s32_2
256legalized:       true
257regBankSelected: true
258body: |
259  bb.0:
260    liveins: $vgpr0
261
262    ; GCN-LABEL: name: sext_inreg_vgpr_s32_2
263    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
264    ; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 2, implicit $exec
265    ; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
266    %0:vgpr(s32) = COPY $vgpr0
267    %1:vgpr(s32) = G_SEXT_INREG %0, 2
268    $vgpr0 = COPY %1
269...
270
271---
272
273name: sext_inreg_vgpr_s32_8
274legalized:       true
275regBankSelected: true
276body: |
277  bb.0:
278    liveins: $vgpr0
279
280    ; GCN-LABEL: name: sext_inreg_vgpr_s32_8
281    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
282    ; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 8, implicit $exec
283    ; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
284    %0:vgpr(s32) = COPY $vgpr0
285    %1:vgpr(s32) = G_SEXT_INREG %0, 8
286    $vgpr0 = COPY %1
287...
288
289---
290
291name: sext_inreg_vgpr_s32_16
292legalized:       true
293regBankSelected: true
294body: |
295  bb.0:
296    liveins: $vgpr0
297
298    ; GCN-LABEL: name: sext_inreg_vgpr_s32_16
299    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
300    ; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 16, implicit $exec
301    ; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
302    %0:vgpr(s32) = COPY $vgpr0
303    %1:vgpr(s32) = G_SEXT_INREG %0, 16
304    $vgpr0 = COPY %1
305...
306
307---
308
309name: sext_inreg_vgpr_s32_31
310legalized:       true
311regBankSelected: true
312body: |
313  bb.0:
314    liveins: $vgpr0
315
316    ; GCN-LABEL: name: sext_inreg_vgpr_s32_31
317    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
318    ; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 31, implicit $exec
319    ; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
320    %0:vgpr(s32) = COPY $vgpr0
321    %1:vgpr(s32) = G_SEXT_INREG %0, 31
322    $vgpr0 = COPY %1
323...
324