1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=SI %s
3# RUN: FileCheck -check-prefix=ERR  %s < %t
4# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s
5
6# ERR-NOT: remark:
7# ERR: remark: <unknown>:0:0: cannot select: %2:sgpr(s32) = G_SMULH %0:sgpr, %1:sgpr (in function: smulh_s32_ss)
8# ERR-NOT: remark:
9
10---
11name: smulh_s32_ss
12legalized: true
13regBankSelected: true
14
15body: |
16  bb.0:
17    liveins: $sgpr0, $sgpr1
18
19    ; SI-LABEL: name: smulh_s32_ss
20    ; SI: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
21    ; SI: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
22    ; SI: [[SMULH:%[0-9]+]]:sgpr(s32) = G_SMULH [[COPY]], [[COPY1]]
23    ; SI: S_ENDPGM 0, implicit [[SMULH]](s32)
24    ; GFX9-LABEL: name: smulh_s32_ss
25    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
26    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
27    ; GFX9: [[S_MUL_HI_I32_:%[0-9]+]]:sreg_32 = S_MUL_HI_I32 [[COPY]], [[COPY1]]
28    ; GFX9: S_ENDPGM 0, implicit [[S_MUL_HI_I32_]]
29    %0:sgpr(s32) = COPY $sgpr0
30    %1:sgpr(s32) = COPY $sgpr1
31    %2:sgpr(s32) = G_SMULH %0, %1
32    S_ENDPGM 0, implicit %2
33...
34
35---
36name: smulh_s32_sv
37legalized: true
38regBankSelected: true
39
40body: |
41  bb.0:
42    liveins: $sgpr0, $vgpr0
43
44    ; SI-LABEL: name: smulh_s32_sv
45    ; SI: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
46    ; SI: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
47    ; SI: [[V_MUL_HI_I32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32 [[COPY]], [[COPY1]], implicit $exec
48    ; SI: S_ENDPGM 0, implicit [[V_MUL_HI_I32_]]
49    ; GFX9-LABEL: name: smulh_s32_sv
50    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
51    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
52    ; GFX9: [[V_MUL_HI_I32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32 [[COPY]], [[COPY1]], implicit $exec
53    ; GFX9: S_ENDPGM 0, implicit [[V_MUL_HI_I32_]]
54    %0:sgpr(s32) = COPY $sgpr0
55    %1:vgpr(s32) = COPY $vgpr0
56    %2:vgpr(s32) = G_SMULH %0, %1
57    S_ENDPGM 0, implicit %2
58...
59
60---
61name: smulh_s32_vs
62legalized: true
63regBankSelected: true
64
65body: |
66  bb.0:
67    liveins: $sgpr0, $vgpr0
68
69    ; SI-LABEL: name: smulh_s32_vs
70    ; SI: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
71    ; SI: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
72    ; SI: [[V_MUL_HI_I32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32 [[COPY]], [[COPY1]], implicit $exec
73    ; SI: S_ENDPGM 0, implicit [[V_MUL_HI_I32_]]
74    ; GFX9-LABEL: name: smulh_s32_vs
75    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
76    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
77    ; GFX9: [[V_MUL_HI_I32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32 [[COPY]], [[COPY1]], implicit $exec
78    ; GFX9: S_ENDPGM 0, implicit [[V_MUL_HI_I32_]]
79    %0:vgpr(s32) = COPY $vgpr0
80    %1:sgpr(s32) = COPY $sgpr0
81    %2:vgpr(s32) = G_SMULH %0, %1
82    S_ENDPGM 0, implicit %2
83...
84
85---
86name: smulh_s32_vv
87legalized: true
88regBankSelected: true
89
90body: |
91  bb.0:
92    liveins: $vgpr0, $vgpr1
93
94    ; SI-LABEL: name: smulh_s32_vv
95    ; SI: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
96    ; SI: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
97    ; SI: [[V_MUL_HI_I32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32 [[COPY]], [[COPY1]], implicit $exec
98    ; SI: S_ENDPGM 0, implicit [[V_MUL_HI_I32_]]
99    ; GFX9-LABEL: name: smulh_s32_vv
100    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
101    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
102    ; GFX9: [[V_MUL_HI_I32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32 [[COPY]], [[COPY1]], implicit $exec
103    ; GFX9: S_ENDPGM 0, implicit [[V_MUL_HI_I32_]]
104    %0:vgpr(s32) = COPY $vgpr0
105    %1:vgpr(s32) = COPY $vgpr1
106    %2:vgpr(s32) = G_SMULH %0, %1
107    S_ENDPGM 0, implicit %2
108...
109