1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -global-isel -amdgpu-fixed-function-abi -stop-after=irtranslator -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs -o - %s | FileCheck -enable-var-scope -check-prefix=GFX900 %s 3; RUN: llc -global-isel -amdgpu-fixed-function-abi -stop-after=irtranslator -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx908 -verify-machineinstrs -o - %s | FileCheck -enable-var-scope -check-prefix=GFX908 %s 4 5; Workitem IDs are passed to the kernel differently for gfx908 6 7declare hidden void @external_void_func_void() #0 8declare hidden void @external_void_func_i32(i32) #0 9declare hidden void @external_void_func_v32i32(<32 x i32>) #0 10 11define amdgpu_kernel void @test_call_external_void_func_i32([17 x i8]) #0 { 12 ; GFX900-LABEL: name: test_call_external_void_func_i32 13 ; GFX900: bb.1 (%ir-block.1): 14 ; GFX900: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 15 ; GFX900: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 16 ; GFX900: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 17 ; GFX900: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 18 ; GFX900: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 19 ; GFX900: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 20 ; GFX900: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 21 ; GFX900: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 22 ; GFX900: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 23 ; GFX900: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 24 ; GFX900: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 25 ; GFX900: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 26 ; GFX900: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 27 ; GFX900: ADJCALLSTACKUP 0, 0, implicit-def $scc 28 ; GFX900: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 29 ; GFX900: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 30 ; GFX900: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 31 ; GFX900: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 32 ; GFX900: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 33 ; GFX900: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 34 ; GFX900: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 35 ; GFX900: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 36 ; GFX900: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 37 ; GFX900: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 38 ; GFX900: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 39 ; GFX900: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 40 ; GFX900: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 41 ; GFX900: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 42 ; GFX900: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 43 ; GFX900: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 44 ; GFX900: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 45 ; GFX900: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 46 ; GFX900: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 47 ; GFX900: $vgpr0 = COPY [[C]](s32) 48 ; GFX900: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 49 ; GFX900: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 50 ; GFX900: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 51 ; GFX900: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 52 ; GFX900: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 53 ; GFX900: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 54 ; GFX900: $sgpr12 = COPY [[COPY14]](s32) 55 ; GFX900: $sgpr13 = COPY [[COPY15]](s32) 56 ; GFX900: $sgpr14 = COPY [[COPY16]](s32) 57 ; GFX900: $vgpr31 = COPY [[OR1]](s32) 58 ; GFX900: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 59 ; GFX900: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 60 ; GFX900: S_ENDPGM 0 61 ; GFX908-LABEL: name: test_call_external_void_func_i32 62 ; GFX908: bb.1 (%ir-block.1): 63 ; GFX908: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 64 ; GFX908: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 65 ; GFX908: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 66 ; GFX908: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 67 ; GFX908: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 68 ; GFX908: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 69 ; GFX908: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 70 ; GFX908: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 71 ; GFX908: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 72 ; GFX908: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 73 ; GFX908: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 74 ; GFX908: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 75 ; GFX908: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 76 ; GFX908: ADJCALLSTACKUP 0, 0, implicit-def $scc 77 ; GFX908: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 78 ; GFX908: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 79 ; GFX908: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 80 ; GFX908: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 81 ; GFX908: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 82 ; GFX908: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 83 ; GFX908: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 84 ; GFX908: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 85 ; GFX908: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 86 ; GFX908: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 87 ; GFX908: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 88 ; GFX908: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 89 ; GFX908: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 90 ; GFX908: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 91 ; GFX908: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 92 ; GFX908: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 93 ; GFX908: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 94 ; GFX908: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 95 ; GFX908: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 96 ; GFX908: $vgpr0 = COPY [[C]](s32) 97 ; GFX908: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 98 ; GFX908: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 99 ; GFX908: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 100 ; GFX908: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 101 ; GFX908: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 102 ; GFX908: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 103 ; GFX908: $sgpr12 = COPY [[COPY14]](s32) 104 ; GFX908: $sgpr13 = COPY [[COPY15]](s32) 105 ; GFX908: $sgpr14 = COPY [[COPY16]](s32) 106 ; GFX908: $vgpr31 = COPY [[OR1]](s32) 107 ; GFX908: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 108 ; GFX908: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 109 ; GFX908: S_ENDPGM 0 110 call void @external_void_func_i32(i32 42) 111 ret void 112} 113 114define void @test_func_call_external_void_func_i32() #0 { 115 ; GFX900-LABEL: name: test_func_call_external_void_func_i32 116 ; GFX900: bb.1 (%ir-block.0): 117 ; GFX900: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 118 ; GFX900: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 119 ; GFX900: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 120 ; GFX900: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 121 ; GFX900: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 122 ; GFX900: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 123 ; GFX900: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 124 ; GFX900: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 125 ; GFX900: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 126 ; GFX900: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 127 ; GFX900: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 99 128 ; GFX900: ADJCALLSTACKUP 0, 0, implicit-def $scc 129 ; GFX900: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 130 ; GFX900: [[COPY9:%[0-9]+]]:_(p4) = COPY [[COPY7]] 131 ; GFX900: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY6]] 132 ; GFX900: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY5]] 133 ; GFX900: [[COPY12:%[0-9]+]]:_(s64) = COPY [[COPY4]] 134 ; GFX900: [[COPY13:%[0-9]+]]:_(s32) = COPY [[COPY3]] 135 ; GFX900: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY2]] 136 ; GFX900: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY1]] 137 ; GFX900: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 138 ; GFX900: $vgpr0 = COPY [[C]](s32) 139 ; GFX900: [[COPY17:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 140 ; GFX900: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY17]](<4 x s32>) 141 ; GFX900: $sgpr4_sgpr5 = COPY [[COPY9]](p4) 142 ; GFX900: $sgpr6_sgpr7 = COPY [[COPY10]](p4) 143 ; GFX900: $sgpr8_sgpr9 = COPY [[COPY11]](p4) 144 ; GFX900: $sgpr10_sgpr11 = COPY [[COPY12]](s64) 145 ; GFX900: $sgpr12 = COPY [[COPY13]](s32) 146 ; GFX900: $sgpr13 = COPY [[COPY14]](s32) 147 ; GFX900: $sgpr14 = COPY [[COPY15]](s32) 148 ; GFX900: $vgpr31 = COPY [[COPY16]](s32) 149 ; GFX900: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 150 ; GFX900: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 151 ; GFX900: [[COPY18:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]] 152 ; GFX900: S_SETPC_B64_return [[COPY18]] 153 ; GFX908-LABEL: name: test_func_call_external_void_func_i32 154 ; GFX908: bb.1 (%ir-block.0): 155 ; GFX908: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 156 ; GFX908: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 157 ; GFX908: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 158 ; GFX908: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 159 ; GFX908: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 160 ; GFX908: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 161 ; GFX908: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 162 ; GFX908: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 163 ; GFX908: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 164 ; GFX908: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 165 ; GFX908: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 99 166 ; GFX908: ADJCALLSTACKUP 0, 0, implicit-def $scc 167 ; GFX908: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 168 ; GFX908: [[COPY9:%[0-9]+]]:_(p4) = COPY [[COPY7]] 169 ; GFX908: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY6]] 170 ; GFX908: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY5]] 171 ; GFX908: [[COPY12:%[0-9]+]]:_(s64) = COPY [[COPY4]] 172 ; GFX908: [[COPY13:%[0-9]+]]:_(s32) = COPY [[COPY3]] 173 ; GFX908: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY2]] 174 ; GFX908: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY1]] 175 ; GFX908: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 176 ; GFX908: $vgpr0 = COPY [[C]](s32) 177 ; GFX908: [[COPY17:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 178 ; GFX908: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY17]](<4 x s32>) 179 ; GFX908: $sgpr4_sgpr5 = COPY [[COPY9]](p4) 180 ; GFX908: $sgpr6_sgpr7 = COPY [[COPY10]](p4) 181 ; GFX908: $sgpr8_sgpr9 = COPY [[COPY11]](p4) 182 ; GFX908: $sgpr10_sgpr11 = COPY [[COPY12]](s64) 183 ; GFX908: $sgpr12 = COPY [[COPY13]](s32) 184 ; GFX908: $sgpr13 = COPY [[COPY14]](s32) 185 ; GFX908: $sgpr14 = COPY [[COPY15]](s32) 186 ; GFX908: $vgpr31 = COPY [[COPY16]](s32) 187 ; GFX908: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 188 ; GFX908: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 189 ; GFX908: [[COPY18:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]] 190 ; GFX908: S_SETPC_B64_return [[COPY18]] 191 call void @external_void_func_i32(i32 99) 192 ret void 193} 194 195; Explicit argument is split between registers ad the stack due to v31 196; being used for workitem IDs. 197define amdgpu_kernel void @test_call_external_void_func_v32i32([17 x i8]) #0 { 198 ; GFX900-LABEL: name: test_call_external_void_func_v32i32 199 ; GFX900: bb.1 (%ir-block.1): 200 ; GFX900: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 201 ; GFX900: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 202 ; GFX900: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 203 ; GFX900: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 204 ; GFX900: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 205 ; GFX900: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 206 ; GFX900: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 207 ; GFX900: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 208 ; GFX900: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 209 ; GFX900: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 210 ; GFX900: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 211 ; GFX900: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 212 ; GFX900: [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32) 213 ; GFX900: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 214 ; GFX900: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<32 x s32>) 215 ; GFX900: ADJCALLSTACKUP 0, 0, implicit-def $scc 216 ; GFX900: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v32i32 217 ; GFX900: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 218 ; GFX900: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 219 ; GFX900: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 220 ; GFX900: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 221 ; GFX900: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 222 ; GFX900: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 223 ; GFX900: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 224 ; GFX900: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 225 ; GFX900: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 226 ; GFX900: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 227 ; GFX900: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 228 ; GFX900: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 229 ; GFX900: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 230 ; GFX900: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 231 ; GFX900: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 232 ; GFX900: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 233 ; GFX900: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 234 ; GFX900: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 235 ; GFX900: $vgpr0 = COPY [[UV]](s32) 236 ; GFX900: $vgpr1 = COPY [[UV1]](s32) 237 ; GFX900: $vgpr2 = COPY [[UV2]](s32) 238 ; GFX900: $vgpr3 = COPY [[UV3]](s32) 239 ; GFX900: $vgpr4 = COPY [[UV4]](s32) 240 ; GFX900: $vgpr5 = COPY [[UV5]](s32) 241 ; GFX900: $vgpr6 = COPY [[UV6]](s32) 242 ; GFX900: $vgpr7 = COPY [[UV7]](s32) 243 ; GFX900: $vgpr8 = COPY [[UV8]](s32) 244 ; GFX900: $vgpr9 = COPY [[UV9]](s32) 245 ; GFX900: $vgpr10 = COPY [[UV10]](s32) 246 ; GFX900: $vgpr11 = COPY [[UV11]](s32) 247 ; GFX900: $vgpr12 = COPY [[UV12]](s32) 248 ; GFX900: $vgpr13 = COPY [[UV13]](s32) 249 ; GFX900: $vgpr14 = COPY [[UV14]](s32) 250 ; GFX900: $vgpr15 = COPY [[UV15]](s32) 251 ; GFX900: $vgpr16 = COPY [[UV16]](s32) 252 ; GFX900: $vgpr17 = COPY [[UV17]](s32) 253 ; GFX900: $vgpr18 = COPY [[UV18]](s32) 254 ; GFX900: $vgpr19 = COPY [[UV19]](s32) 255 ; GFX900: $vgpr20 = COPY [[UV20]](s32) 256 ; GFX900: $vgpr21 = COPY [[UV21]](s32) 257 ; GFX900: $vgpr22 = COPY [[UV22]](s32) 258 ; GFX900: $vgpr23 = COPY [[UV23]](s32) 259 ; GFX900: $vgpr24 = COPY [[UV24]](s32) 260 ; GFX900: $vgpr25 = COPY [[UV25]](s32) 261 ; GFX900: $vgpr26 = COPY [[UV26]](s32) 262 ; GFX900: $vgpr27 = COPY [[UV27]](s32) 263 ; GFX900: $vgpr28 = COPY [[UV28]](s32) 264 ; GFX900: $vgpr29 = COPY [[UV29]](s32) 265 ; GFX900: $vgpr30 = COPY [[UV30]](s32) 266 ; GFX900: [[COPY20:%[0-9]+]]:_(p5) = COPY $sp_reg 267 ; GFX900: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 268 ; GFX900: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C4]](s32) 269 ; GFX900: G_STORE [[UV31]](s32), [[PTR_ADD1]](p5) :: (store 4 into stack, align 16, addrspace 5) 270 ; GFX900: [[COPY21:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 271 ; GFX900: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY21]](<4 x s32>) 272 ; GFX900: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 273 ; GFX900: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 274 ; GFX900: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 275 ; GFX900: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 276 ; GFX900: $sgpr12 = COPY [[COPY14]](s32) 277 ; GFX900: $sgpr13 = COPY [[COPY15]](s32) 278 ; GFX900: $sgpr14 = COPY [[COPY16]](s32) 279 ; GFX900: $vgpr31 = COPY [[OR1]](s32) 280 ; GFX900: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v32i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 281 ; GFX900: ADJCALLSTACKDOWN 0, 4, implicit-def $scc 282 ; GFX900: S_ENDPGM 0 283 ; GFX908-LABEL: name: test_call_external_void_func_v32i32 284 ; GFX908: bb.1 (%ir-block.1): 285 ; GFX908: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 286 ; GFX908: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 287 ; GFX908: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 288 ; GFX908: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 289 ; GFX908: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 290 ; GFX908: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 291 ; GFX908: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 292 ; GFX908: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 293 ; GFX908: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 294 ; GFX908: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 295 ; GFX908: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 296 ; GFX908: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 297 ; GFX908: [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32) 298 ; GFX908: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 299 ; GFX908: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<32 x s32>) 300 ; GFX908: ADJCALLSTACKUP 0, 0, implicit-def $scc 301 ; GFX908: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v32i32 302 ; GFX908: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 303 ; GFX908: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 304 ; GFX908: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 305 ; GFX908: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 306 ; GFX908: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 307 ; GFX908: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 308 ; GFX908: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 309 ; GFX908: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 310 ; GFX908: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 311 ; GFX908: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 312 ; GFX908: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 313 ; GFX908: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 314 ; GFX908: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 315 ; GFX908: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 316 ; GFX908: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 317 ; GFX908: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 318 ; GFX908: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 319 ; GFX908: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 320 ; GFX908: $vgpr0 = COPY [[UV]](s32) 321 ; GFX908: $vgpr1 = COPY [[UV1]](s32) 322 ; GFX908: $vgpr2 = COPY [[UV2]](s32) 323 ; GFX908: $vgpr3 = COPY [[UV3]](s32) 324 ; GFX908: $vgpr4 = COPY [[UV4]](s32) 325 ; GFX908: $vgpr5 = COPY [[UV5]](s32) 326 ; GFX908: $vgpr6 = COPY [[UV6]](s32) 327 ; GFX908: $vgpr7 = COPY [[UV7]](s32) 328 ; GFX908: $vgpr8 = COPY [[UV8]](s32) 329 ; GFX908: $vgpr9 = COPY [[UV9]](s32) 330 ; GFX908: $vgpr10 = COPY [[UV10]](s32) 331 ; GFX908: $vgpr11 = COPY [[UV11]](s32) 332 ; GFX908: $vgpr12 = COPY [[UV12]](s32) 333 ; GFX908: $vgpr13 = COPY [[UV13]](s32) 334 ; GFX908: $vgpr14 = COPY [[UV14]](s32) 335 ; GFX908: $vgpr15 = COPY [[UV15]](s32) 336 ; GFX908: $vgpr16 = COPY [[UV16]](s32) 337 ; GFX908: $vgpr17 = COPY [[UV17]](s32) 338 ; GFX908: $vgpr18 = COPY [[UV18]](s32) 339 ; GFX908: $vgpr19 = COPY [[UV19]](s32) 340 ; GFX908: $vgpr20 = COPY [[UV20]](s32) 341 ; GFX908: $vgpr21 = COPY [[UV21]](s32) 342 ; GFX908: $vgpr22 = COPY [[UV22]](s32) 343 ; GFX908: $vgpr23 = COPY [[UV23]](s32) 344 ; GFX908: $vgpr24 = COPY [[UV24]](s32) 345 ; GFX908: $vgpr25 = COPY [[UV25]](s32) 346 ; GFX908: $vgpr26 = COPY [[UV26]](s32) 347 ; GFX908: $vgpr27 = COPY [[UV27]](s32) 348 ; GFX908: $vgpr28 = COPY [[UV28]](s32) 349 ; GFX908: $vgpr29 = COPY [[UV29]](s32) 350 ; GFX908: $vgpr30 = COPY [[UV30]](s32) 351 ; GFX908: [[COPY20:%[0-9]+]]:_(p5) = COPY $sp_reg 352 ; GFX908: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 353 ; GFX908: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C4]](s32) 354 ; GFX908: G_STORE [[UV31]](s32), [[PTR_ADD1]](p5) :: (store 4 into stack, align 16, addrspace 5) 355 ; GFX908: [[COPY21:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 356 ; GFX908: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY21]](<4 x s32>) 357 ; GFX908: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 358 ; GFX908: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 359 ; GFX908: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 360 ; GFX908: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 361 ; GFX908: $sgpr12 = COPY [[COPY14]](s32) 362 ; GFX908: $sgpr13 = COPY [[COPY15]](s32) 363 ; GFX908: $sgpr14 = COPY [[COPY16]](s32) 364 ; GFX908: $vgpr31 = COPY [[OR1]](s32) 365 ; GFX908: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v32i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 366 ; GFX908: ADJCALLSTACKDOWN 0, 4, implicit-def $scc 367 ; GFX908: S_ENDPGM 0 368 call void @external_void_func_v32i32(<32 x i32> zeroinitializer) 369 ret void 370} 371 372define void @test_func_call_external_void_func_v32i32([17 x i8]) #0 { 373 ; GFX900-LABEL: name: test_func_call_external_void_func_v32i32 374 ; GFX900: bb.1 (%ir-block.1): 375 ; GFX900: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 376 ; GFX900: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 377 ; GFX900: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 378 ; GFX900: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 379 ; GFX900: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 380 ; GFX900: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 381 ; GFX900: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 382 ; GFX900: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 383 ; GFX900: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 384 ; GFX900: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0 385 ; GFX900: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s32) 386 ; GFX900: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC]](s16) 387 ; GFX900: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1 388 ; GFX900: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY9]](s32) 389 ; GFX900: [[TRUNC3:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC2]](s16) 390 ; GFX900: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2 391 ; GFX900: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY10]](s32) 392 ; GFX900: [[TRUNC5:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC4]](s16) 393 ; GFX900: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr3 394 ; GFX900: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[COPY11]](s32) 395 ; GFX900: [[TRUNC7:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC6]](s16) 396 ; GFX900: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr4 397 ; GFX900: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32) 398 ; GFX900: [[TRUNC9:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC8]](s16) 399 ; GFX900: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr5 400 ; GFX900: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32) 401 ; GFX900: [[TRUNC11:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC10]](s16) 402 ; GFX900: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr6 403 ; GFX900: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32) 404 ; GFX900: [[TRUNC13:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC12]](s16) 405 ; GFX900: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr7 406 ; GFX900: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32) 407 ; GFX900: [[TRUNC15:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC14]](s16) 408 ; GFX900: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr8 409 ; GFX900: [[TRUNC16:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32) 410 ; GFX900: [[TRUNC17:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC16]](s16) 411 ; GFX900: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr9 412 ; GFX900: [[TRUNC18:%[0-9]+]]:_(s16) = G_TRUNC [[COPY17]](s32) 413 ; GFX900: [[TRUNC19:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC18]](s16) 414 ; GFX900: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr10 415 ; GFX900: [[TRUNC20:%[0-9]+]]:_(s16) = G_TRUNC [[COPY18]](s32) 416 ; GFX900: [[TRUNC21:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC20]](s16) 417 ; GFX900: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr11 418 ; GFX900: [[TRUNC22:%[0-9]+]]:_(s16) = G_TRUNC [[COPY19]](s32) 419 ; GFX900: [[TRUNC23:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC22]](s16) 420 ; GFX900: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr12 421 ; GFX900: [[TRUNC24:%[0-9]+]]:_(s16) = G_TRUNC [[COPY20]](s32) 422 ; GFX900: [[TRUNC25:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC24]](s16) 423 ; GFX900: [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr13 424 ; GFX900: [[TRUNC26:%[0-9]+]]:_(s16) = G_TRUNC [[COPY21]](s32) 425 ; GFX900: [[TRUNC27:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC26]](s16) 426 ; GFX900: [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr14 427 ; GFX900: [[TRUNC28:%[0-9]+]]:_(s16) = G_TRUNC [[COPY22]](s32) 428 ; GFX900: [[TRUNC29:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC28]](s16) 429 ; GFX900: [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr15 430 ; GFX900: [[TRUNC30:%[0-9]+]]:_(s16) = G_TRUNC [[COPY23]](s32) 431 ; GFX900: [[TRUNC31:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC30]](s16) 432 ; GFX900: [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr16 433 ; GFX900: [[TRUNC32:%[0-9]+]]:_(s16) = G_TRUNC [[COPY24]](s32) 434 ; GFX900: [[TRUNC33:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC32]](s16) 435 ; GFX900: [[COPY25:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 436 ; GFX900: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 437 ; GFX900: [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32) 438 ; GFX900: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<32 x s32>) 439 ; GFX900: ADJCALLSTACKUP 0, 0, implicit-def $scc 440 ; GFX900: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v32i32 441 ; GFX900: [[COPY26:%[0-9]+]]:_(p4) = COPY [[COPY7]] 442 ; GFX900: [[COPY27:%[0-9]+]]:_(p4) = COPY [[COPY6]] 443 ; GFX900: [[COPY28:%[0-9]+]]:_(p4) = COPY [[COPY5]] 444 ; GFX900: [[COPY29:%[0-9]+]]:_(s64) = COPY [[COPY4]] 445 ; GFX900: [[COPY30:%[0-9]+]]:_(s32) = COPY [[COPY3]] 446 ; GFX900: [[COPY31:%[0-9]+]]:_(s32) = COPY [[COPY2]] 447 ; GFX900: [[COPY32:%[0-9]+]]:_(s32) = COPY [[COPY1]] 448 ; GFX900: [[COPY33:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 449 ; GFX900: $vgpr0 = COPY [[UV]](s32) 450 ; GFX900: $vgpr1 = COPY [[UV1]](s32) 451 ; GFX900: $vgpr2 = COPY [[UV2]](s32) 452 ; GFX900: $vgpr3 = COPY [[UV3]](s32) 453 ; GFX900: $vgpr4 = COPY [[UV4]](s32) 454 ; GFX900: $vgpr5 = COPY [[UV5]](s32) 455 ; GFX900: $vgpr6 = COPY [[UV6]](s32) 456 ; GFX900: $vgpr7 = COPY [[UV7]](s32) 457 ; GFX900: $vgpr8 = COPY [[UV8]](s32) 458 ; GFX900: $vgpr9 = COPY [[UV9]](s32) 459 ; GFX900: $vgpr10 = COPY [[UV10]](s32) 460 ; GFX900: $vgpr11 = COPY [[UV11]](s32) 461 ; GFX900: $vgpr12 = COPY [[UV12]](s32) 462 ; GFX900: $vgpr13 = COPY [[UV13]](s32) 463 ; GFX900: $vgpr14 = COPY [[UV14]](s32) 464 ; GFX900: $vgpr15 = COPY [[UV15]](s32) 465 ; GFX900: $vgpr16 = COPY [[UV16]](s32) 466 ; GFX900: $vgpr17 = COPY [[UV17]](s32) 467 ; GFX900: $vgpr18 = COPY [[UV18]](s32) 468 ; GFX900: $vgpr19 = COPY [[UV19]](s32) 469 ; GFX900: $vgpr20 = COPY [[UV20]](s32) 470 ; GFX900: $vgpr21 = COPY [[UV21]](s32) 471 ; GFX900: $vgpr22 = COPY [[UV22]](s32) 472 ; GFX900: $vgpr23 = COPY [[UV23]](s32) 473 ; GFX900: $vgpr24 = COPY [[UV24]](s32) 474 ; GFX900: $vgpr25 = COPY [[UV25]](s32) 475 ; GFX900: $vgpr26 = COPY [[UV26]](s32) 476 ; GFX900: $vgpr27 = COPY [[UV27]](s32) 477 ; GFX900: $vgpr28 = COPY [[UV28]](s32) 478 ; GFX900: $vgpr29 = COPY [[UV29]](s32) 479 ; GFX900: $vgpr30 = COPY [[UV30]](s32) 480 ; GFX900: [[COPY34:%[0-9]+]]:_(p5) = COPY $sgpr32 481 ; GFX900: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 482 ; GFX900: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY34]], [[C1]](s32) 483 ; GFX900: G_STORE [[UV31]](s32), [[PTR_ADD]](p5) :: (store 4 into stack, align 16, addrspace 5) 484 ; GFX900: [[COPY35:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 485 ; GFX900: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY35]](<4 x s32>) 486 ; GFX900: $sgpr4_sgpr5 = COPY [[COPY26]](p4) 487 ; GFX900: $sgpr6_sgpr7 = COPY [[COPY27]](p4) 488 ; GFX900: $sgpr8_sgpr9 = COPY [[COPY28]](p4) 489 ; GFX900: $sgpr10_sgpr11 = COPY [[COPY29]](s64) 490 ; GFX900: $sgpr12 = COPY [[COPY30]](s32) 491 ; GFX900: $sgpr13 = COPY [[COPY31]](s32) 492 ; GFX900: $sgpr14 = COPY [[COPY32]](s32) 493 ; GFX900: $vgpr31 = COPY [[COPY33]](s32) 494 ; GFX900: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v32i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 495 ; GFX900: ADJCALLSTACKDOWN 0, 4, implicit-def $scc 496 ; GFX900: [[COPY36:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY25]] 497 ; GFX900: S_SETPC_B64_return [[COPY36]] 498 ; GFX908-LABEL: name: test_func_call_external_void_func_v32i32 499 ; GFX908: bb.1 (%ir-block.1): 500 ; GFX908: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 501 ; GFX908: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 502 ; GFX908: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 503 ; GFX908: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 504 ; GFX908: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 505 ; GFX908: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 506 ; GFX908: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 507 ; GFX908: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 508 ; GFX908: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 509 ; GFX908: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0 510 ; GFX908: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s32) 511 ; GFX908: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC]](s16) 512 ; GFX908: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1 513 ; GFX908: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY9]](s32) 514 ; GFX908: [[TRUNC3:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC2]](s16) 515 ; GFX908: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2 516 ; GFX908: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY10]](s32) 517 ; GFX908: [[TRUNC5:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC4]](s16) 518 ; GFX908: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr3 519 ; GFX908: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[COPY11]](s32) 520 ; GFX908: [[TRUNC7:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC6]](s16) 521 ; GFX908: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr4 522 ; GFX908: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32) 523 ; GFX908: [[TRUNC9:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC8]](s16) 524 ; GFX908: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr5 525 ; GFX908: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32) 526 ; GFX908: [[TRUNC11:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC10]](s16) 527 ; GFX908: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr6 528 ; GFX908: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32) 529 ; GFX908: [[TRUNC13:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC12]](s16) 530 ; GFX908: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr7 531 ; GFX908: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32) 532 ; GFX908: [[TRUNC15:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC14]](s16) 533 ; GFX908: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr8 534 ; GFX908: [[TRUNC16:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32) 535 ; GFX908: [[TRUNC17:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC16]](s16) 536 ; GFX908: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr9 537 ; GFX908: [[TRUNC18:%[0-9]+]]:_(s16) = G_TRUNC [[COPY17]](s32) 538 ; GFX908: [[TRUNC19:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC18]](s16) 539 ; GFX908: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr10 540 ; GFX908: [[TRUNC20:%[0-9]+]]:_(s16) = G_TRUNC [[COPY18]](s32) 541 ; GFX908: [[TRUNC21:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC20]](s16) 542 ; GFX908: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr11 543 ; GFX908: [[TRUNC22:%[0-9]+]]:_(s16) = G_TRUNC [[COPY19]](s32) 544 ; GFX908: [[TRUNC23:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC22]](s16) 545 ; GFX908: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr12 546 ; GFX908: [[TRUNC24:%[0-9]+]]:_(s16) = G_TRUNC [[COPY20]](s32) 547 ; GFX908: [[TRUNC25:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC24]](s16) 548 ; GFX908: [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr13 549 ; GFX908: [[TRUNC26:%[0-9]+]]:_(s16) = G_TRUNC [[COPY21]](s32) 550 ; GFX908: [[TRUNC27:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC26]](s16) 551 ; GFX908: [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr14 552 ; GFX908: [[TRUNC28:%[0-9]+]]:_(s16) = G_TRUNC [[COPY22]](s32) 553 ; GFX908: [[TRUNC29:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC28]](s16) 554 ; GFX908: [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr15 555 ; GFX908: [[TRUNC30:%[0-9]+]]:_(s16) = G_TRUNC [[COPY23]](s32) 556 ; GFX908: [[TRUNC31:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC30]](s16) 557 ; GFX908: [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr16 558 ; GFX908: [[TRUNC32:%[0-9]+]]:_(s16) = G_TRUNC [[COPY24]](s32) 559 ; GFX908: [[TRUNC33:%[0-9]+]]:_(s8) = G_TRUNC [[TRUNC32]](s16) 560 ; GFX908: [[COPY25:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 561 ; GFX908: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 562 ; GFX908: [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32) 563 ; GFX908: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<32 x s32>) 564 ; GFX908: ADJCALLSTACKUP 0, 0, implicit-def $scc 565 ; GFX908: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v32i32 566 ; GFX908: [[COPY26:%[0-9]+]]:_(p4) = COPY [[COPY7]] 567 ; GFX908: [[COPY27:%[0-9]+]]:_(p4) = COPY [[COPY6]] 568 ; GFX908: [[COPY28:%[0-9]+]]:_(p4) = COPY [[COPY5]] 569 ; GFX908: [[COPY29:%[0-9]+]]:_(s64) = COPY [[COPY4]] 570 ; GFX908: [[COPY30:%[0-9]+]]:_(s32) = COPY [[COPY3]] 571 ; GFX908: [[COPY31:%[0-9]+]]:_(s32) = COPY [[COPY2]] 572 ; GFX908: [[COPY32:%[0-9]+]]:_(s32) = COPY [[COPY1]] 573 ; GFX908: [[COPY33:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 574 ; GFX908: $vgpr0 = COPY [[UV]](s32) 575 ; GFX908: $vgpr1 = COPY [[UV1]](s32) 576 ; GFX908: $vgpr2 = COPY [[UV2]](s32) 577 ; GFX908: $vgpr3 = COPY [[UV3]](s32) 578 ; GFX908: $vgpr4 = COPY [[UV4]](s32) 579 ; GFX908: $vgpr5 = COPY [[UV5]](s32) 580 ; GFX908: $vgpr6 = COPY [[UV6]](s32) 581 ; GFX908: $vgpr7 = COPY [[UV7]](s32) 582 ; GFX908: $vgpr8 = COPY [[UV8]](s32) 583 ; GFX908: $vgpr9 = COPY [[UV9]](s32) 584 ; GFX908: $vgpr10 = COPY [[UV10]](s32) 585 ; GFX908: $vgpr11 = COPY [[UV11]](s32) 586 ; GFX908: $vgpr12 = COPY [[UV12]](s32) 587 ; GFX908: $vgpr13 = COPY [[UV13]](s32) 588 ; GFX908: $vgpr14 = COPY [[UV14]](s32) 589 ; GFX908: $vgpr15 = COPY [[UV15]](s32) 590 ; GFX908: $vgpr16 = COPY [[UV16]](s32) 591 ; GFX908: $vgpr17 = COPY [[UV17]](s32) 592 ; GFX908: $vgpr18 = COPY [[UV18]](s32) 593 ; GFX908: $vgpr19 = COPY [[UV19]](s32) 594 ; GFX908: $vgpr20 = COPY [[UV20]](s32) 595 ; GFX908: $vgpr21 = COPY [[UV21]](s32) 596 ; GFX908: $vgpr22 = COPY [[UV22]](s32) 597 ; GFX908: $vgpr23 = COPY [[UV23]](s32) 598 ; GFX908: $vgpr24 = COPY [[UV24]](s32) 599 ; GFX908: $vgpr25 = COPY [[UV25]](s32) 600 ; GFX908: $vgpr26 = COPY [[UV26]](s32) 601 ; GFX908: $vgpr27 = COPY [[UV27]](s32) 602 ; GFX908: $vgpr28 = COPY [[UV28]](s32) 603 ; GFX908: $vgpr29 = COPY [[UV29]](s32) 604 ; GFX908: $vgpr30 = COPY [[UV30]](s32) 605 ; GFX908: [[COPY34:%[0-9]+]]:_(p5) = COPY $sgpr32 606 ; GFX908: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 607 ; GFX908: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY34]], [[C1]](s32) 608 ; GFX908: G_STORE [[UV31]](s32), [[PTR_ADD]](p5) :: (store 4 into stack, align 16, addrspace 5) 609 ; GFX908: [[COPY35:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 610 ; GFX908: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY35]](<4 x s32>) 611 ; GFX908: $sgpr4_sgpr5 = COPY [[COPY26]](p4) 612 ; GFX908: $sgpr6_sgpr7 = COPY [[COPY27]](p4) 613 ; GFX908: $sgpr8_sgpr9 = COPY [[COPY28]](p4) 614 ; GFX908: $sgpr10_sgpr11 = COPY [[COPY29]](s64) 615 ; GFX908: $sgpr12 = COPY [[COPY30]](s32) 616 ; GFX908: $sgpr13 = COPY [[COPY31]](s32) 617 ; GFX908: $sgpr14 = COPY [[COPY32]](s32) 618 ; GFX908: $vgpr31 = COPY [[COPY33]](s32) 619 ; GFX908: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v32i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 620 ; GFX908: ADJCALLSTACKDOWN 0, 4, implicit-def $scc 621 ; GFX908: [[COPY36:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY25]] 622 ; GFX908: S_SETPC_B64_return [[COPY36]] 623 call void @external_void_func_v32i32(<32 x i32> zeroinitializer) 624 ret void 625} 626 627; FIXME: Should fold out parts with known 0 id. 628 629define amdgpu_kernel void @test_only_workitem_id_x() #0 !reqd_work_group_size !0 { 630 ; GFX900-LABEL: name: test_only_workitem_id_x 631 ; GFX900: bb.1 (%ir-block.0): 632 ; GFX900: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 633 ; GFX900: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 634 ; GFX900: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 635 ; GFX900: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 636 ; GFX900: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 637 ; GFX900: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 638 ; GFX900: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 639 ; GFX900: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 640 ; GFX900: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 641 ; GFX900: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 642 ; GFX900: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 643 ; GFX900: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 644 ; GFX900: ADJCALLSTACKUP 0, 0, implicit-def $scc 645 ; GFX900: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 646 ; GFX900: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 647 ; GFX900: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 648 ; GFX900: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 649 ; GFX900: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 650 ; GFX900: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 651 ; GFX900: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 652 ; GFX900: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 653 ; GFX900: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 654 ; GFX900: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 655 ; GFX900: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 656 ; GFX900: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 657 ; GFX900: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 658 ; GFX900: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 659 ; GFX900: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 660 ; GFX900: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 661 ; GFX900: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 662 ; GFX900: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 663 ; GFX900: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 664 ; GFX900: $vgpr0 = COPY [[C]](s32) 665 ; GFX900: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 666 ; GFX900: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 667 ; GFX900: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 668 ; GFX900: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 669 ; GFX900: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 670 ; GFX900: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 671 ; GFX900: $sgpr12 = COPY [[COPY14]](s32) 672 ; GFX900: $sgpr13 = COPY [[COPY15]](s32) 673 ; GFX900: $sgpr14 = COPY [[COPY16]](s32) 674 ; GFX900: $vgpr31 = COPY [[OR1]](s32) 675 ; GFX900: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 676 ; GFX900: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 677 ; GFX900: S_ENDPGM 0 678 ; GFX908-LABEL: name: test_only_workitem_id_x 679 ; GFX908: bb.1 (%ir-block.0): 680 ; GFX908: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 681 ; GFX908: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 682 ; GFX908: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 683 ; GFX908: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 684 ; GFX908: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 685 ; GFX908: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 686 ; GFX908: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 687 ; GFX908: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 688 ; GFX908: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 689 ; GFX908: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 690 ; GFX908: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 691 ; GFX908: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 692 ; GFX908: ADJCALLSTACKUP 0, 0, implicit-def $scc 693 ; GFX908: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 694 ; GFX908: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 695 ; GFX908: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 696 ; GFX908: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 697 ; GFX908: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 698 ; GFX908: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 699 ; GFX908: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 700 ; GFX908: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 701 ; GFX908: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 702 ; GFX908: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 703 ; GFX908: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 704 ; GFX908: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 705 ; GFX908: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 706 ; GFX908: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 707 ; GFX908: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 708 ; GFX908: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 709 ; GFX908: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 710 ; GFX908: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 711 ; GFX908: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 712 ; GFX908: $vgpr0 = COPY [[C]](s32) 713 ; GFX908: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 714 ; GFX908: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 715 ; GFX908: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 716 ; GFX908: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 717 ; GFX908: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 718 ; GFX908: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 719 ; GFX908: $sgpr12 = COPY [[COPY14]](s32) 720 ; GFX908: $sgpr13 = COPY [[COPY15]](s32) 721 ; GFX908: $sgpr14 = COPY [[COPY16]](s32) 722 ; GFX908: $vgpr31 = COPY [[OR1]](s32) 723 ; GFX908: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 724 ; GFX908: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 725 ; GFX908: S_ENDPGM 0 726 call void @external_void_func_i32(i32 42) 727 ret void 728} 729 730define amdgpu_kernel void @test_only_workitem_id_y() #0 !reqd_work_group_size !1 { 731 ; GFX900-LABEL: name: test_only_workitem_id_y 732 ; GFX900: bb.1 (%ir-block.0): 733 ; GFX900: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 734 ; GFX900: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 735 ; GFX900: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 736 ; GFX900: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 737 ; GFX900: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 738 ; GFX900: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 739 ; GFX900: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 740 ; GFX900: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 741 ; GFX900: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 742 ; GFX900: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 743 ; GFX900: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 744 ; GFX900: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 745 ; GFX900: ADJCALLSTACKUP 0, 0, implicit-def $scc 746 ; GFX900: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 747 ; GFX900: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 748 ; GFX900: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 749 ; GFX900: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 750 ; GFX900: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 751 ; GFX900: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 752 ; GFX900: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 753 ; GFX900: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 754 ; GFX900: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 755 ; GFX900: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 756 ; GFX900: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 757 ; GFX900: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 758 ; GFX900: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 759 ; GFX900: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 760 ; GFX900: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 761 ; GFX900: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 762 ; GFX900: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 763 ; GFX900: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 764 ; GFX900: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 765 ; GFX900: $vgpr0 = COPY [[C]](s32) 766 ; GFX900: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 767 ; GFX900: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 768 ; GFX900: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 769 ; GFX900: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 770 ; GFX900: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 771 ; GFX900: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 772 ; GFX900: $sgpr12 = COPY [[COPY14]](s32) 773 ; GFX900: $sgpr13 = COPY [[COPY15]](s32) 774 ; GFX900: $sgpr14 = COPY [[COPY16]](s32) 775 ; GFX900: $vgpr31 = COPY [[OR1]](s32) 776 ; GFX900: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 777 ; GFX900: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 778 ; GFX900: S_ENDPGM 0 779 ; GFX908-LABEL: name: test_only_workitem_id_y 780 ; GFX908: bb.1 (%ir-block.0): 781 ; GFX908: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 782 ; GFX908: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 783 ; GFX908: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 784 ; GFX908: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 785 ; GFX908: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 786 ; GFX908: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 787 ; GFX908: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 788 ; GFX908: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 789 ; GFX908: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 790 ; GFX908: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 791 ; GFX908: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 792 ; GFX908: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 793 ; GFX908: ADJCALLSTACKUP 0, 0, implicit-def $scc 794 ; GFX908: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 795 ; GFX908: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 796 ; GFX908: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 797 ; GFX908: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 798 ; GFX908: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 799 ; GFX908: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 800 ; GFX908: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 801 ; GFX908: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 802 ; GFX908: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 803 ; GFX908: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 804 ; GFX908: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 805 ; GFX908: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 806 ; GFX908: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 807 ; GFX908: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 808 ; GFX908: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 809 ; GFX908: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 810 ; GFX908: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 811 ; GFX908: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 812 ; GFX908: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 813 ; GFX908: $vgpr0 = COPY [[C]](s32) 814 ; GFX908: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 815 ; GFX908: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 816 ; GFX908: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 817 ; GFX908: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 818 ; GFX908: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 819 ; GFX908: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 820 ; GFX908: $sgpr12 = COPY [[COPY14]](s32) 821 ; GFX908: $sgpr13 = COPY [[COPY15]](s32) 822 ; GFX908: $sgpr14 = COPY [[COPY16]](s32) 823 ; GFX908: $vgpr31 = COPY [[OR1]](s32) 824 ; GFX908: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 825 ; GFX908: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 826 ; GFX908: S_ENDPGM 0 827 call void @external_void_func_i32(i32 42) 828 ret void 829} 830 831define amdgpu_kernel void @test_only_workitem_id_z() #0 !reqd_work_group_size !2 { 832 ; GFX900-LABEL: name: test_only_workitem_id_z 833 ; GFX900: bb.1 (%ir-block.0): 834 ; GFX900: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 835 ; GFX900: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 836 ; GFX900: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 837 ; GFX900: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 838 ; GFX900: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 839 ; GFX900: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 840 ; GFX900: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 841 ; GFX900: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 842 ; GFX900: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 843 ; GFX900: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 844 ; GFX900: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 845 ; GFX900: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 846 ; GFX900: ADJCALLSTACKUP 0, 0, implicit-def $scc 847 ; GFX900: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 848 ; GFX900: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 849 ; GFX900: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 850 ; GFX900: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 851 ; GFX900: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 852 ; GFX900: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 853 ; GFX900: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 854 ; GFX900: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 855 ; GFX900: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 856 ; GFX900: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 857 ; GFX900: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 858 ; GFX900: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 859 ; GFX900: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 860 ; GFX900: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 861 ; GFX900: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 862 ; GFX900: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 863 ; GFX900: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 864 ; GFX900: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 865 ; GFX900: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 866 ; GFX900: $vgpr0 = COPY [[C]](s32) 867 ; GFX900: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 868 ; GFX900: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 869 ; GFX900: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 870 ; GFX900: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 871 ; GFX900: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 872 ; GFX900: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 873 ; GFX900: $sgpr12 = COPY [[COPY14]](s32) 874 ; GFX900: $sgpr13 = COPY [[COPY15]](s32) 875 ; GFX900: $sgpr14 = COPY [[COPY16]](s32) 876 ; GFX900: $vgpr31 = COPY [[OR1]](s32) 877 ; GFX900: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 878 ; GFX900: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 879 ; GFX900: S_ENDPGM 0 880 ; GFX908-LABEL: name: test_only_workitem_id_z 881 ; GFX908: bb.1 (%ir-block.0): 882 ; GFX908: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 883 ; GFX908: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 884 ; GFX908: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 885 ; GFX908: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 886 ; GFX908: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 887 ; GFX908: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 888 ; GFX908: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 889 ; GFX908: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 890 ; GFX908: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 891 ; GFX908: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 892 ; GFX908: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 893 ; GFX908: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 894 ; GFX908: ADJCALLSTACKUP 0, 0, implicit-def $scc 895 ; GFX908: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 896 ; GFX908: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 897 ; GFX908: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 898 ; GFX908: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 899 ; GFX908: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 900 ; GFX908: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 901 ; GFX908: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 902 ; GFX908: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 903 ; GFX908: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 904 ; GFX908: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 905 ; GFX908: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 906 ; GFX908: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 907 ; GFX908: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 908 ; GFX908: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 909 ; GFX908: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 910 ; GFX908: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 911 ; GFX908: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 912 ; GFX908: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 913 ; GFX908: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 914 ; GFX908: $vgpr0 = COPY [[C]](s32) 915 ; GFX908: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 916 ; GFX908: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 917 ; GFX908: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 918 ; GFX908: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 919 ; GFX908: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 920 ; GFX908: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 921 ; GFX908: $sgpr12 = COPY [[COPY14]](s32) 922 ; GFX908: $sgpr13 = COPY [[COPY15]](s32) 923 ; GFX908: $sgpr14 = COPY [[COPY16]](s32) 924 ; GFX908: $vgpr31 = COPY [[OR1]](s32) 925 ; GFX908: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 926 ; GFX908: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 927 ; GFX908: S_ENDPGM 0 928 call void @external_void_func_i32(i32 42) 929 ret void 930} 931 932define amdgpu_kernel void @test_only_workitem_id_xy() #0 !reqd_work_group_size !3 { 933 ; GFX900-LABEL: name: test_only_workitem_id_xy 934 ; GFX900: bb.1 (%ir-block.0): 935 ; GFX900: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 936 ; GFX900: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 937 ; GFX900: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 938 ; GFX900: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 939 ; GFX900: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 940 ; GFX900: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 941 ; GFX900: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 942 ; GFX900: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 943 ; GFX900: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 944 ; GFX900: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 945 ; GFX900: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 946 ; GFX900: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 947 ; GFX900: ADJCALLSTACKUP 0, 0, implicit-def $scc 948 ; GFX900: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 949 ; GFX900: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 950 ; GFX900: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 951 ; GFX900: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 952 ; GFX900: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 953 ; GFX900: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 954 ; GFX900: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 955 ; GFX900: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 956 ; GFX900: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 957 ; GFX900: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 958 ; GFX900: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 959 ; GFX900: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 960 ; GFX900: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 961 ; GFX900: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 962 ; GFX900: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 963 ; GFX900: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 964 ; GFX900: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 965 ; GFX900: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 966 ; GFX900: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 967 ; GFX900: $vgpr0 = COPY [[C]](s32) 968 ; GFX900: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 969 ; GFX900: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 970 ; GFX900: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 971 ; GFX900: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 972 ; GFX900: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 973 ; GFX900: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 974 ; GFX900: $sgpr12 = COPY [[COPY14]](s32) 975 ; GFX900: $sgpr13 = COPY [[COPY15]](s32) 976 ; GFX900: $sgpr14 = COPY [[COPY16]](s32) 977 ; GFX900: $vgpr31 = COPY [[OR1]](s32) 978 ; GFX900: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 979 ; GFX900: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 980 ; GFX900: S_ENDPGM 0 981 ; GFX908-LABEL: name: test_only_workitem_id_xy 982 ; GFX908: bb.1 (%ir-block.0): 983 ; GFX908: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 984 ; GFX908: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 985 ; GFX908: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 986 ; GFX908: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 987 ; GFX908: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 988 ; GFX908: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 989 ; GFX908: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 990 ; GFX908: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 991 ; GFX908: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 992 ; GFX908: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 993 ; GFX908: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 994 ; GFX908: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 995 ; GFX908: ADJCALLSTACKUP 0, 0, implicit-def $scc 996 ; GFX908: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 997 ; GFX908: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 998 ; GFX908: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 999 ; GFX908: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1000 ; GFX908: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1001 ; GFX908: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 1002 ; GFX908: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1003 ; GFX908: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1004 ; GFX908: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1005 ; GFX908: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1006 ; GFX908: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1007 ; GFX908: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1008 ; GFX908: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1009 ; GFX908: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 1010 ; GFX908: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1011 ; GFX908: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1012 ; GFX908: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1013 ; GFX908: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 1014 ; GFX908: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1015 ; GFX908: $vgpr0 = COPY [[C]](s32) 1016 ; GFX908: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1017 ; GFX908: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1018 ; GFX908: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1019 ; GFX908: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1020 ; GFX908: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1021 ; GFX908: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1022 ; GFX908: $sgpr12 = COPY [[COPY14]](s32) 1023 ; GFX908: $sgpr13 = COPY [[COPY15]](s32) 1024 ; GFX908: $sgpr14 = COPY [[COPY16]](s32) 1025 ; GFX908: $vgpr31 = COPY [[OR1]](s32) 1026 ; GFX908: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1027 ; GFX908: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1028 ; GFX908: S_ENDPGM 0 1029 call void @external_void_func_i32(i32 42) 1030 ret void 1031} 1032 1033define amdgpu_kernel void @test_only_workitem_id_yz() #0 !reqd_work_group_size !4 { 1034 ; GFX900-LABEL: name: test_only_workitem_id_yz 1035 ; GFX900: bb.1 (%ir-block.0): 1036 ; GFX900: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1037 ; GFX900: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1038 ; GFX900: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1039 ; GFX900: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1040 ; GFX900: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1041 ; GFX900: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1042 ; GFX900: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1043 ; GFX900: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1044 ; GFX900: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1045 ; GFX900: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1046 ; GFX900: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1047 ; GFX900: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 1048 ; GFX900: ADJCALLSTACKUP 0, 0, implicit-def $scc 1049 ; GFX900: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 1050 ; GFX900: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1051 ; GFX900: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1052 ; GFX900: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1053 ; GFX900: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1054 ; GFX900: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 1055 ; GFX900: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1056 ; GFX900: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1057 ; GFX900: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1058 ; GFX900: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1059 ; GFX900: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1060 ; GFX900: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1061 ; GFX900: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1062 ; GFX900: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 1063 ; GFX900: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1064 ; GFX900: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1065 ; GFX900: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1066 ; GFX900: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 1067 ; GFX900: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1068 ; GFX900: $vgpr0 = COPY [[C]](s32) 1069 ; GFX900: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1070 ; GFX900: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1071 ; GFX900: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1072 ; GFX900: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1073 ; GFX900: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1074 ; GFX900: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1075 ; GFX900: $sgpr12 = COPY [[COPY14]](s32) 1076 ; GFX900: $sgpr13 = COPY [[COPY15]](s32) 1077 ; GFX900: $sgpr14 = COPY [[COPY16]](s32) 1078 ; GFX900: $vgpr31 = COPY [[OR1]](s32) 1079 ; GFX900: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1080 ; GFX900: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1081 ; GFX900: S_ENDPGM 0 1082 ; GFX908-LABEL: name: test_only_workitem_id_yz 1083 ; GFX908: bb.1 (%ir-block.0): 1084 ; GFX908: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1085 ; GFX908: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1086 ; GFX908: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1087 ; GFX908: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1088 ; GFX908: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1089 ; GFX908: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1090 ; GFX908: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1091 ; GFX908: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1092 ; GFX908: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1093 ; GFX908: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1094 ; GFX908: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1095 ; GFX908: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 1096 ; GFX908: ADJCALLSTACKUP 0, 0, implicit-def $scc 1097 ; GFX908: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 1098 ; GFX908: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1099 ; GFX908: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1100 ; GFX908: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1101 ; GFX908: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1102 ; GFX908: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 1103 ; GFX908: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1104 ; GFX908: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1105 ; GFX908: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1106 ; GFX908: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1107 ; GFX908: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1108 ; GFX908: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1109 ; GFX908: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1110 ; GFX908: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 1111 ; GFX908: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1112 ; GFX908: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1113 ; GFX908: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1114 ; GFX908: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 1115 ; GFX908: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1116 ; GFX908: $vgpr0 = COPY [[C]](s32) 1117 ; GFX908: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1118 ; GFX908: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1119 ; GFX908: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1120 ; GFX908: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1121 ; GFX908: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1122 ; GFX908: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1123 ; GFX908: $sgpr12 = COPY [[COPY14]](s32) 1124 ; GFX908: $sgpr13 = COPY [[COPY15]](s32) 1125 ; GFX908: $sgpr14 = COPY [[COPY16]](s32) 1126 ; GFX908: $vgpr31 = COPY [[OR1]](s32) 1127 ; GFX908: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1128 ; GFX908: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1129 ; GFX908: S_ENDPGM 0 1130 call void @external_void_func_i32(i32 42) 1131 ret void 1132} 1133 1134define amdgpu_kernel void @test_only_workitem_id_xz() #0 !reqd_work_group_size !5 { 1135 ; GFX900-LABEL: name: test_only_workitem_id_xz 1136 ; GFX900: bb.1 (%ir-block.0): 1137 ; GFX900: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1138 ; GFX900: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1139 ; GFX900: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1140 ; GFX900: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1141 ; GFX900: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1142 ; GFX900: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1143 ; GFX900: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1144 ; GFX900: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1145 ; GFX900: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1146 ; GFX900: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1147 ; GFX900: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1148 ; GFX900: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 1149 ; GFX900: ADJCALLSTACKUP 0, 0, implicit-def $scc 1150 ; GFX900: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 1151 ; GFX900: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1152 ; GFX900: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1153 ; GFX900: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1154 ; GFX900: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1155 ; GFX900: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 1156 ; GFX900: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1157 ; GFX900: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1158 ; GFX900: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1159 ; GFX900: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1160 ; GFX900: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1161 ; GFX900: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1162 ; GFX900: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1163 ; GFX900: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 1164 ; GFX900: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1165 ; GFX900: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1166 ; GFX900: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1167 ; GFX900: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 1168 ; GFX900: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1169 ; GFX900: $vgpr0 = COPY [[C]](s32) 1170 ; GFX900: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1171 ; GFX900: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1172 ; GFX900: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1173 ; GFX900: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1174 ; GFX900: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1175 ; GFX900: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1176 ; GFX900: $sgpr12 = COPY [[COPY14]](s32) 1177 ; GFX900: $sgpr13 = COPY [[COPY15]](s32) 1178 ; GFX900: $sgpr14 = COPY [[COPY16]](s32) 1179 ; GFX900: $vgpr31 = COPY [[OR1]](s32) 1180 ; GFX900: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1181 ; GFX900: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1182 ; GFX900: S_ENDPGM 0 1183 ; GFX908-LABEL: name: test_only_workitem_id_xz 1184 ; GFX908: bb.1 (%ir-block.0): 1185 ; GFX908: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1186 ; GFX908: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1187 ; GFX908: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1188 ; GFX908: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1189 ; GFX908: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1190 ; GFX908: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1191 ; GFX908: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1192 ; GFX908: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1193 ; GFX908: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1194 ; GFX908: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1195 ; GFX908: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1196 ; GFX908: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 1197 ; GFX908: ADJCALLSTACKUP 0, 0, implicit-def $scc 1198 ; GFX908: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 1199 ; GFX908: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1200 ; GFX908: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1201 ; GFX908: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1202 ; GFX908: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1203 ; GFX908: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 1204 ; GFX908: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1205 ; GFX908: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1206 ; GFX908: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1207 ; GFX908: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1208 ; GFX908: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1209 ; GFX908: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1210 ; GFX908: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1211 ; GFX908: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 1212 ; GFX908: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1213 ; GFX908: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1214 ; GFX908: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1215 ; GFX908: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 1216 ; GFX908: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1217 ; GFX908: $vgpr0 = COPY [[C]](s32) 1218 ; GFX908: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1219 ; GFX908: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1220 ; GFX908: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1221 ; GFX908: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1222 ; GFX908: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1223 ; GFX908: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1224 ; GFX908: $sgpr12 = COPY [[COPY14]](s32) 1225 ; GFX908: $sgpr13 = COPY [[COPY15]](s32) 1226 ; GFX908: $sgpr14 = COPY [[COPY16]](s32) 1227 ; GFX908: $vgpr31 = COPY [[OR1]](s32) 1228 ; GFX908: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1229 ; GFX908: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1230 ; GFX908: S_ENDPGM 0 1231 call void @external_void_func_i32(i32 42) 1232 ret void 1233} 1234 1235declare i32 @llvm.amdgcn.workitem.id.x() #1 1236declare i32 @llvm.amdgcn.workitem.id.y() #1 1237declare i32 @llvm.amdgcn.workitem.id.z() #1 1238 1239attributes #0 = { nounwind } 1240attributes #1 = { nounwind readnone speculatable willreturn } 1241 1242!0 = !{i32 64, i32 1, i32 1} 1243!1 = !{i32 1, i32 64, i32 1} 1244!2 = !{i32 1, i32 1, i32 64} 1245!3 = !{i32 32, i32 2, i32 1} 1246!4 = !{i32 1, i32 32, i32 2} 1247!5 = !{i32 32, i32 1, i32 2} 1248