1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -global-isel -amdgpu-fixed-function-abi -stop-after=irtranslator -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs -o - %s | FileCheck -enable-var-scope %s 3 4declare hidden void @external_void_func_void() #0 5 6declare hidden void @external_void_func_empty_struct({}, i32) #0 7declare hidden void @external_void_func_empty_array([0 x i8], i32) #0 8 9declare hidden void @external_void_func_i1(i1) #0 10declare hidden void @external_void_func_i1_signext(i1 signext) #0 11declare hidden void @external_void_func_i1_zeroext(i1 zeroext) #0 12 13declare hidden void @external_void_func_i8(i8) #0 14declare hidden void @external_void_func_i8_signext(i8 signext) #0 15declare hidden void @external_void_func_i8_zeroext(i8 zeroext) #0 16 17declare hidden void @external_void_func_i16(i16) #0 18declare hidden void @external_void_func_i16_signext(i16 signext) #0 19declare hidden void @external_void_func_i16_zeroext(i16 zeroext) #0 20 21declare hidden void @external_void_func_i32(i32) #0 22declare hidden void @external_void_func_i64(i64) #0 23declare hidden void @external_void_func_v2i64(<2 x i64>) #0 24declare hidden void @external_void_func_v3i64(<3 x i64>) #0 25declare hidden void @external_void_func_v4i64(<4 x i64>) #0 26 27 28declare hidden void @external_void_func_i48(i48) #0 29declare hidden void @external_void_func_i48_signext(i48 signext) #0 30declare hidden void @external_void_func_i48_zeroext(i48 zeroext) #0 31 32declare hidden void @external_void_func_p0(i8*) #0 33declare hidden void @external_void_func_v2p0(<2 x i8*>) #0 34 35declare hidden void @external_void_func_f16(half) #0 36declare hidden void @external_void_func_f32(float) #0 37declare hidden void @external_void_func_f64(double) #0 38declare hidden void @external_void_func_v2f32(<2 x float>) #0 39declare hidden void @external_void_func_v2f64(<2 x double>) #0 40declare hidden void @external_void_func_v3f32(<3 x float>) #0 41declare hidden void @external_void_func_v3f64(<3 x double>) #0 42declare hidden void @external_void_func_v5f32(<5 x float>) #0 43 44declare hidden void @external_void_func_v2i16(<2 x i16>) #0 45declare hidden void @external_void_func_v2f16(<2 x half>) #0 46declare hidden void @external_void_func_v3i16(<3 x i16>) #0 47declare hidden void @external_void_func_v3f16(<3 x half>) #0 48declare hidden void @external_void_func_v4i16(<4 x i16>) #0 49declare hidden void @external_void_func_v4f16(<4 x half>) #0 50declare hidden void @external_void_func_v5i16(<5 x i16>) #0 51declare hidden void @external_void_func_v7i16(<7 x i16>) #0 52declare hidden void @external_void_func_v63i16(<63 x i16>) #0 53declare hidden void @external_void_func_v65i16(<65 x i16>) #0 54declare hidden void @external_void_func_v66i16(<66 x i16>) #0 55 56declare hidden void @external_void_func_v2i32(<2 x i32>) #0 57declare hidden void @external_void_func_v3i32(<3 x i32>) #0 58declare hidden void @external_void_func_v3i32_i32(<3 x i32>, i32) #0 59declare hidden void @external_void_func_v4i32(<4 x i32>) #0 60declare hidden void @external_void_func_v5i32(<5 x i32>) #0 61declare hidden void @external_void_func_v8i32(<8 x i32>) #0 62declare hidden void @external_void_func_v16i32(<16 x i32>) #0 63declare hidden void @external_void_func_v32i32(<32 x i32>) #0 64declare hidden void @external_void_func_v32i32_i32(<32 x i32>, i32) #0 65declare hidden void @external_void_func_v32i32_p3_p5(<32 x i32>, i8 addrspace(3)*, i8 addrspace(5)*) #0 66declare hidden void @external_void_func_v32i32_i8_i8_i16(<32 x i32>, i8, i8, i16) #0 67 68; Structs 69declare hidden void @external_void_func_struct_i8_i32({ i8, i32 }) #0 70declare hidden void @external_void_func_byval_struct_i8_i32({ i8, i32 } addrspace(5)* byval({ i8, i32 })) #0 71declare hidden void @external_void_func_sret_struct_i8_i32_byval_struct_i8_i32({ i8, i32 } addrspace(5)* sret({ i8, i32 }), { i8, i32 } addrspace(5)* byval({ i8, i32 })) #0 72 73declare hidden void @external_void_func_v2i8(<2 x i8>) #0 74declare hidden void @external_void_func_v3i8(<3 x i8>) #0 75declare hidden void @external_void_func_v4i8(<4 x i8>) #0 76declare hidden void @external_void_func_v8i8(<8 x i8>) #0 77declare hidden void @external_void_func_v16i8(<16 x i8>) #0 78 79declare hidden void @byval_align16_f64_arg(<32 x i32>, double addrspace(5)* byval(double) align 16) #0 80declare hidden void @stack_passed_f64_arg(<32 x i32>, double) #0 81declare hidden void @external_void_func_12xv3i32(<3 x i32>, <3 x i32>, <3 x i32>, <3 x i32>, 82 <3 x i32>, <3 x i32>, <3 x i32>, <3 x i32>, <3 x i32>, <3 x i32>, <3 x i32>, <3 x i32>) #0 83declare hidden void @external_void_func_8xv5i32(<5 x i32>, <5 x i32>, <5 x i32>, <5 x i32>, 84 <5 x i32>, <5 x i32>, <5 x i32>, <5 x i32>) #0 85declare hidden void @external_void_func_12xv3f32(<3 x float>, <3 x float>, <3 x float>, <3 x float>, 86 <3 x float>, <3 x float>, <3 x float>, <3 x float>, <3 x float>, <3 x float>, <3 x float>, <3 x float>) #0 87declare hidden void @external_void_func_8xv5f32(<5 x float>, <5 x float>, <5 x float>, <5 x float>, 88 <5 x float>, <5 x float>, <5 x float>, <5 x float>) #0 89 90; amdgpu_gfx calling convention 91declare hidden amdgpu_gfx void @external_gfx_void_func_void() #0 92declare hidden amdgpu_gfx void @external_gfx_void_func_i32(i32) #0 93declare hidden amdgpu_gfx void @external_gfx_void_func_i32_inreg(i32 inreg) #0 94declare hidden amdgpu_gfx void @external_gfx_void_func_struct_i8_i32({ i8, i32 }) #0 95declare hidden amdgpu_gfx void @external_gfx_void_func_struct_i8_i32_inreg({ i8, i32 } inreg) #0 96 97define amdgpu_kernel void @test_call_external_void_func_void() #0 { 98 ; CHECK-LABEL: name: test_call_external_void_func_void 99 ; CHECK: bb.1 (%ir-block.0): 100 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 101 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 102 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 103 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 104 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 105 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 106 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 107 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 108 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 109 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 110 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 111 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 112 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_void 113 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 114 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 115 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 116 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 117 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 118 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 119 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 120 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 121 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 122 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 123 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 124 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 125 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 126 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 127 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 128 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 129 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 130 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 131 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 132 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 133 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 134 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 135 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 136 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 137 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 138 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 139 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 140 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 141 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_void, csr_amdgpu_highregs, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 142 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 143 ; CHECK: S_ENDPGM 0 144 call void @external_void_func_void() 145 ret void 146} 147 148define amdgpu_gfx void @test_gfx_call_external_void_func_void() #0 { 149 ; CHECK-LABEL: name: test_gfx_call_external_void_func_void 150 ; CHECK: bb.1 (%ir-block.0): 151 ; CHECK: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 152 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 153 ; CHECK: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 154 ; CHECK: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 155 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 156 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 157 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 158 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 159 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 160 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 161 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 162 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_gfx_void_func_void 163 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY [[COPY7]] 164 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY6]] 165 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY5]] 166 ; CHECK: [[COPY12:%[0-9]+]]:_(s64) = COPY [[COPY4]] 167 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[COPY3]] 168 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY2]] 169 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY1]] 170 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 171 ; CHECK: [[COPY17:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 172 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY17]](<4 x s32>) 173 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY9]](p4) 174 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY10]](p4) 175 ; CHECK: $sgpr8_sgpr9 = COPY [[COPY11]](p4) 176 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY12]](s64) 177 ; CHECK: $sgpr12 = COPY [[COPY13]](s32) 178 ; CHECK: $sgpr13 = COPY [[COPY14]](s32) 179 ; CHECK: $sgpr14 = COPY [[COPY15]](s32) 180 ; CHECK: $vgpr31 = COPY [[COPY16]](s32) 181 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_gfx_void_func_void, csr_amdgpu_highregs, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 182 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 183 ; CHECK: [[COPY18:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]] 184 ; CHECK: S_SETPC_B64_return [[COPY18]] 185 call amdgpu_gfx void @external_gfx_void_func_void() 186 ret void 187} 188 189define void @test_func_call_external_void_func_void() #0 { 190 ; CHECK-LABEL: name: test_func_call_external_void_func_void 191 ; CHECK: bb.1 (%ir-block.0): 192 ; CHECK: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 193 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 194 ; CHECK: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 195 ; CHECK: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 196 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 197 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 198 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 199 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 200 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 201 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 202 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 203 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_void 204 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY [[COPY7]] 205 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY6]] 206 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY5]] 207 ; CHECK: [[COPY12:%[0-9]+]]:_(s64) = COPY [[COPY4]] 208 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[COPY3]] 209 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY2]] 210 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY1]] 211 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 212 ; CHECK: [[COPY17:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 213 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY17]](<4 x s32>) 214 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY9]](p4) 215 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY10]](p4) 216 ; CHECK: $sgpr8_sgpr9 = COPY [[COPY11]](p4) 217 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY12]](s64) 218 ; CHECK: $sgpr12 = COPY [[COPY13]](s32) 219 ; CHECK: $sgpr13 = COPY [[COPY14]](s32) 220 ; CHECK: $sgpr14 = COPY [[COPY15]](s32) 221 ; CHECK: $vgpr31 = COPY [[COPY16]](s32) 222 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_void, csr_amdgpu_highregs, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 223 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 224 ; CHECK: [[COPY18:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]] 225 ; CHECK: S_SETPC_B64_return [[COPY18]] 226 call void @external_void_func_void() 227 ret void 228} 229 230define amdgpu_kernel void @test_call_external_void_func_empty_struct() #0 { 231 ; CHECK-LABEL: name: test_call_external_void_func_empty_struct 232 ; CHECK: bb.1 (%ir-block.0): 233 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 234 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 235 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 236 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 237 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 238 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 239 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 240 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 241 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 242 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 243 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 244 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 23 245 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 246 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_empty_struct 247 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 248 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 249 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 250 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 251 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 252 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 253 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 254 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 255 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 256 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 257 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 258 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 259 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 260 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 261 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 262 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 263 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 264 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 265 ; CHECK: $vgpr0 = COPY [[C]](s32) 266 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 267 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 268 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 269 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 270 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 271 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 272 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 273 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 274 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 275 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 276 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_empty_struct, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 277 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 278 ; CHECK: S_ENDPGM 0 279 call void @external_void_func_empty_struct({} zeroinitializer, i32 23) 280 ret void 281} 282 283define amdgpu_kernel void @test_call_external_void_func_empty_array() #0 { 284 ; CHECK-LABEL: name: test_call_external_void_func_empty_array 285 ; CHECK: bb.1 (%ir-block.0): 286 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 287 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 288 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 289 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 290 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 291 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 292 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 293 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 294 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 295 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 296 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 297 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 23 298 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 299 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_empty_array 300 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 301 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 302 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 303 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 304 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 305 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 306 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 307 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 308 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 309 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 310 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 311 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 312 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 313 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 314 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 315 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 316 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 317 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 318 ; CHECK: $vgpr0 = COPY [[C]](s32) 319 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 320 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 321 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 322 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 323 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 324 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 325 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 326 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 327 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 328 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 329 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_empty_array, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 330 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 331 ; CHECK: S_ENDPGM 0 332 call void @external_void_func_empty_array([0 x i8] zeroinitializer, i32 23) 333 ret void 334} 335 336define amdgpu_kernel void @test_call_external_void_func_i1_imm() #0 { 337 ; CHECK-LABEL: name: test_call_external_void_func_i1_imm 338 ; CHECK: bb.1 (%ir-block.0): 339 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 340 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 341 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 342 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 343 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 344 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 345 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 346 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 347 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 348 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 349 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 350 ; CHECK: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 true 351 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s1) 352 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 353 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i1 354 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 355 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 356 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 357 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 358 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 359 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 360 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 361 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 362 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 363 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 364 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 365 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 366 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 367 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 368 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 369 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 370 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 371 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 372 ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) 373 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 374 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 375 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 376 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 377 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 378 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 379 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 380 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 381 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 382 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 383 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i1, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 384 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 385 ; CHECK: S_ENDPGM 0 386 call void @external_void_func_i1(i1 true) 387 ret void 388} 389 390define amdgpu_kernel void @test_call_external_void_func_i1_signext(i32) #0 { 391 ; CHECK-LABEL: name: test_call_external_void_func_i1_signext 392 ; CHECK: bb.1 (%ir-block.1): 393 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 394 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 395 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 396 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 397 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 398 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 399 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 400 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 401 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 402 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 403 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 404 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 405 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 406 ; CHECK: [[LOAD:%[0-9]+]]:_(s1) = G_LOAD [[DEF]](p1) :: (volatile load 1 from `i1 addrspace(1)* undef`, addrspace 1) 407 ; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[LOAD]](s1) 408 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 409 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i1_signext 410 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 411 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 412 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 413 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 414 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 415 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 416 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 417 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 418 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 419 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 420 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 421 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 422 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 423 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 424 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 425 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 426 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 427 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 428 ; CHECK: $vgpr0 = COPY [[SEXT]](s32) 429 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 430 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 431 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 432 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 433 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 434 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 435 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 436 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 437 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 438 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 439 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i1_signext, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 440 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 441 ; CHECK: S_ENDPGM 0 442 %var = load volatile i1, i1 addrspace(1)* undef 443 call void @external_void_func_i1_signext(i1 signext %var) 444 ret void 445} 446 447define amdgpu_kernel void @test_call_external_void_func_i1_zeroext(i32) #0 { 448 ; CHECK-LABEL: name: test_call_external_void_func_i1_zeroext 449 ; CHECK: bb.1 (%ir-block.1): 450 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 451 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 452 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 453 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 454 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 455 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 456 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 457 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 458 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 459 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 460 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 461 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 462 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 463 ; CHECK: [[LOAD:%[0-9]+]]:_(s1) = G_LOAD [[DEF]](p1) :: (volatile load 1 from `i1 addrspace(1)* undef`, addrspace 1) 464 ; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[LOAD]](s1) 465 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 466 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i1_zeroext 467 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 468 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 469 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 470 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 471 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 472 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 473 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 474 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 475 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 476 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 477 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 478 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 479 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 480 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 481 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 482 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 483 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 484 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 485 ; CHECK: $vgpr0 = COPY [[ZEXT]](s32) 486 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 487 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 488 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 489 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 490 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 491 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 492 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 493 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 494 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 495 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 496 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i1_zeroext, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 497 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 498 ; CHECK: S_ENDPGM 0 499 %var = load volatile i1, i1 addrspace(1)* undef 500 call void @external_void_func_i1_zeroext(i1 zeroext %var) 501 ret void 502} 503 504define amdgpu_kernel void @test_call_external_void_func_i8_imm(i32) #0 { 505 ; CHECK-LABEL: name: test_call_external_void_func_i8_imm 506 ; CHECK: bb.1 (%ir-block.1): 507 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 508 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 509 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 510 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 511 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 512 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 513 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 514 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 515 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 516 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 517 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 518 ; CHECK: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 123 519 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 520 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s8) 521 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 522 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i8 523 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 524 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 525 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 526 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 527 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 528 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 529 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 530 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 531 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 532 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 533 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 534 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 535 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 536 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 537 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 538 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 539 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 540 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 541 ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) 542 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 543 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 544 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 545 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 546 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 547 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 548 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 549 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 550 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 551 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 552 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i8, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 553 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 554 ; CHECK: S_ENDPGM 0 555 call void @external_void_func_i8(i8 123) 556 ret void 557} 558 559define amdgpu_kernel void @test_call_external_void_func_i8_signext(i32) #0 { 560 ; CHECK-LABEL: name: test_call_external_void_func_i8_signext 561 ; CHECK: bb.1 (%ir-block.1): 562 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 563 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 564 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 565 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 566 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 567 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 568 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 569 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 570 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 571 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 572 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 573 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 574 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 575 ; CHECK: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[DEF]](p1) :: (volatile load 1 from `i8 addrspace(1)* undef`, addrspace 1) 576 ; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[LOAD]](s8) 577 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 578 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i8_signext 579 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 580 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 581 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 582 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 583 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 584 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 585 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 586 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 587 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 588 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 589 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 590 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 591 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 592 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 593 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 594 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 595 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 596 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 597 ; CHECK: $vgpr0 = COPY [[SEXT]](s32) 598 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 599 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 600 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 601 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 602 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 603 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 604 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 605 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 606 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 607 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 608 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i8_signext, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 609 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 610 ; CHECK: S_ENDPGM 0 611 %var = load volatile i8, i8 addrspace(1)* undef 612 call void @external_void_func_i8_signext(i8 signext %var) 613 ret void 614} 615 616define amdgpu_kernel void @test_call_external_void_func_i8_zeroext(i32) #0 { 617 ; CHECK-LABEL: name: test_call_external_void_func_i8_zeroext 618 ; CHECK: bb.1 (%ir-block.1): 619 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 620 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 621 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 622 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 623 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 624 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 625 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 626 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 627 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 628 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 629 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 630 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 631 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 632 ; CHECK: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[DEF]](p1) :: (volatile load 1 from `i8 addrspace(1)* undef`, addrspace 1) 633 ; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[LOAD]](s8) 634 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 635 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i8_zeroext 636 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 637 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 638 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 639 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 640 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 641 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 642 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 643 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 644 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 645 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 646 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 647 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 648 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 649 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 650 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 651 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 652 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 653 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 654 ; CHECK: $vgpr0 = COPY [[ZEXT]](s32) 655 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 656 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 657 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 658 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 659 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 660 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 661 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 662 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 663 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 664 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 665 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i8_zeroext, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 666 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 667 ; CHECK: S_ENDPGM 0 668 %var = load volatile i8, i8 addrspace(1)* undef 669 call void @external_void_func_i8_zeroext(i8 zeroext %var) 670 ret void 671} 672 673define amdgpu_kernel void @test_call_external_void_func_i16_imm() #0 { 674 ; CHECK-LABEL: name: test_call_external_void_func_i16_imm 675 ; CHECK: bb.1 (%ir-block.0): 676 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 677 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 678 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 679 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 680 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 681 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 682 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 683 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 684 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 685 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 686 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 687 ; CHECK: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 123 688 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s16) 689 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 690 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i16 691 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 692 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 693 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 694 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 695 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 696 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 697 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 698 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 699 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 700 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 701 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 702 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 703 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 704 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 705 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 706 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 707 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 708 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 709 ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) 710 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 711 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 712 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 713 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 714 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 715 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 716 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 717 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 718 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 719 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 720 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i16, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 721 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 722 ; CHECK: S_ENDPGM 0 723 call void @external_void_func_i16(i16 123) 724 ret void 725} 726 727define amdgpu_kernel void @test_call_external_void_func_i16_signext(i32) #0 { 728 ; CHECK-LABEL: name: test_call_external_void_func_i16_signext 729 ; CHECK: bb.1 (%ir-block.1): 730 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 731 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 732 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 733 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 734 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 735 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 736 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 737 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 738 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 739 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 740 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 741 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 742 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 743 ; CHECK: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[DEF]](p1) :: (volatile load 2 from `i16 addrspace(1)* undef`, addrspace 1) 744 ; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[LOAD]](s16) 745 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 746 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i16_signext 747 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 748 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 749 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 750 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 751 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 752 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 753 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 754 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 755 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 756 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 757 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 758 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 759 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 760 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 761 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 762 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 763 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 764 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 765 ; CHECK: $vgpr0 = COPY [[SEXT]](s32) 766 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 767 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 768 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 769 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 770 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 771 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 772 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 773 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 774 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 775 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 776 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i16_signext, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 777 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 778 ; CHECK: S_ENDPGM 0 779 %var = load volatile i16, i16 addrspace(1)* undef 780 call void @external_void_func_i16_signext(i16 signext %var) 781 ret void 782} 783 784define amdgpu_kernel void @test_call_external_void_func_i16_zeroext(i32) #0 { 785 ; CHECK-LABEL: name: test_call_external_void_func_i16_zeroext 786 ; CHECK: bb.1 (%ir-block.1): 787 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 788 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 789 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 790 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 791 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 792 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 793 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 794 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 795 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 796 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 797 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 798 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 799 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 800 ; CHECK: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[DEF]](p1) :: (volatile load 2 from `i16 addrspace(1)* undef`, addrspace 1) 801 ; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[LOAD]](s16) 802 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 803 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i16_zeroext 804 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 805 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 806 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 807 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 808 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 809 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 810 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 811 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 812 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 813 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 814 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 815 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 816 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 817 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 818 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 819 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 820 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 821 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 822 ; CHECK: $vgpr0 = COPY [[ZEXT]](s32) 823 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 824 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 825 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 826 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 827 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 828 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 829 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 830 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 831 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 832 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 833 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i16_zeroext, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 834 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 835 ; CHECK: S_ENDPGM 0 836 %var = load volatile i16, i16 addrspace(1)* undef 837 call void @external_void_func_i16_zeroext(i16 zeroext %var) 838 ret void 839} 840 841define amdgpu_kernel void @test_call_external_void_func_i32_imm(i32) #0 { 842 ; CHECK-LABEL: name: test_call_external_void_func_i32_imm 843 ; CHECK: bb.1 (%ir-block.1): 844 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 845 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 846 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 847 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 848 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 849 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 850 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 851 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 852 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 853 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 854 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 855 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 856 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 857 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 858 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i32 859 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 860 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 861 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 862 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 863 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 864 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 865 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 866 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 867 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 868 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 869 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 870 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 871 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 872 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 873 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 874 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 875 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 876 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 877 ; CHECK: $vgpr0 = COPY [[C]](s32) 878 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 879 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 880 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 881 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 882 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 883 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 884 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 885 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 886 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 887 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 888 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 889 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 890 ; CHECK: S_ENDPGM 0 891 call void @external_void_func_i32(i32 42) 892 ret void 893} 894 895define amdgpu_gfx void @test_gfx_call_external_void_func_i32_imm(i32) #0 { 896 ; CHECK-LABEL: name: test_gfx_call_external_void_func_i32_imm 897 ; CHECK: bb.1 (%ir-block.1): 898 ; CHECK: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr0, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 899 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 900 ; CHECK: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 901 ; CHECK: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 902 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 903 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 904 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 905 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 906 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 907 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0 908 ; CHECK: [[COPY9:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 909 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 910 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 911 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_gfx_void_func_i32 912 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY7]] 913 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY6]] 914 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY5]] 915 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY4]] 916 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY3]] 917 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY2]] 918 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY1]] 919 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 920 ; CHECK: $vgpr0 = COPY [[C]](s32) 921 ; CHECK: [[COPY18:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 922 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY18]](<4 x s32>) 923 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 924 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 925 ; CHECK: $sgpr8_sgpr9 = COPY [[COPY12]](p4) 926 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 927 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 928 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 929 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 930 ; CHECK: $vgpr31 = COPY [[COPY17]](s32) 931 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_gfx_void_func_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 932 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 933 ; CHECK: [[COPY19:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY9]] 934 ; CHECK: S_SETPC_B64_return [[COPY19]] 935 call amdgpu_gfx void @external_gfx_void_func_i32(i32 42) 936 ret void 937} 938 939define amdgpu_gfx void @test_gfx_call_external_void_func_i32_imm_inreg(i32 inreg) #0 { 940 ; CHECK-LABEL: name: test_gfx_call_external_void_func_i32_imm_inreg 941 ; CHECK: bb.1 (%ir-block.1): 942 ; CHECK: liveins: $sgpr4, $sgpr5, $sgpr14, $sgpr15, $vgpr31, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr30_sgpr31 943 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 944 ; CHECK: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr15 945 ; CHECK: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr14 946 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr5 947 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr12_sgpr13 948 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 949 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 950 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 951 ; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr4 952 ; CHECK: [[COPY9:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 953 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42 954 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 955 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_gfx_void_func_i32_inreg 956 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY7]] 957 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY6]] 958 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY5]] 959 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY4]] 960 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY3]] 961 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY2]] 962 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY1]] 963 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 964 ; CHECK: $sgpr15 = COPY [[C]](s32) 965 ; CHECK: [[COPY18:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 966 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY18]](<4 x s32>) 967 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 968 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 969 ; CHECK: $sgpr8_sgpr9 = COPY [[COPY12]](p4) 970 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 971 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 972 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 973 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 974 ; CHECK: $vgpr31 = COPY [[COPY17]](s32) 975 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_gfx_void_func_i32_inreg, csr_amdgpu_highregs, implicit $sgpr15, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 976 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 977 ; CHECK: [[COPY19:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY9]] 978 ; CHECK: S_SETPC_B64_return [[COPY19]] 979 call amdgpu_gfx void @external_gfx_void_func_i32_inreg(i32 inreg 42) 980 ret void 981} 982 983define amdgpu_kernel void @test_call_external_void_func_i64_imm() #0 { 984 ; CHECK-LABEL: name: test_call_external_void_func_i64_imm 985 ; CHECK: bb.1 (%ir-block.0): 986 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 987 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 988 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 989 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 990 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 991 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 992 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 993 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 994 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 995 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 996 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 997 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 123 998 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64) 999 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1000 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i64 1001 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1002 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1003 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1004 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1005 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 1006 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1007 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1008 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1009 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1010 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1011 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1012 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1013 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 1014 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1015 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1016 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1017 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 1018 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1019 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1020 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1021 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1022 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1023 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1024 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1025 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1026 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1027 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1028 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1029 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1030 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1031 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i64, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1032 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1033 ; CHECK: S_ENDPGM 0 1034 call void @external_void_func_i64(i64 123) 1035 ret void 1036} 1037 1038define amdgpu_kernel void @test_call_external_void_func_v2i64() #0 { 1039 ; CHECK-LABEL: name: test_call_external_void_func_v2i64 1040 ; CHECK: bb.1 (%ir-block.0): 1041 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1042 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1043 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1044 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1045 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1046 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1047 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1048 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1049 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1050 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1051 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1052 ; CHECK: [[C:%[0-9]+]]:_(p1) = G_CONSTANT i64 0 1053 ; CHECK: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[C]](p1) :: (load 16 from `<2 x i64> addrspace(1)* null`, addrspace 1) 1054 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<2 x s64>) 1055 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1056 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v2i64 1057 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1058 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1059 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1060 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1061 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 1062 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1063 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1064 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1065 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1066 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1067 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1068 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1069 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 1070 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1071 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1072 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1073 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 1074 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1075 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1076 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1077 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 1078 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 1079 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1080 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1081 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1082 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1083 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1084 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1085 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1086 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1087 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1088 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1089 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v2i64, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1090 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1091 ; CHECK: S_ENDPGM 0 1092 %val = load <2 x i64>, <2 x i64> addrspace(1)* null 1093 call void @external_void_func_v2i64(<2 x i64> %val) 1094 ret void 1095} 1096 1097define amdgpu_kernel void @test_call_external_void_func_v2i64_imm() #0 { 1098 ; CHECK-LABEL: name: test_call_external_void_func_v2i64_imm 1099 ; CHECK: bb.1 (%ir-block.0): 1100 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1101 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1102 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1103 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1104 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1105 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1106 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1107 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1108 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1109 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1110 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1111 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8589934593 1112 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 17179869187 1113 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C1]](s64) 1114 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<2 x s64>) 1115 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1116 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v2i64 1117 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1118 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1119 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1120 ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1121 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C2]](s64) 1122 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1123 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1124 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1125 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1126 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1127 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1128 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1129 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C3]](s32) 1130 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1131 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1132 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1133 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C4]](s32) 1134 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1135 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1136 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1137 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 1138 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 1139 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1140 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1141 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1142 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1143 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1144 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1145 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1146 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1147 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1148 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1149 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v2i64, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1150 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1151 ; CHECK: S_ENDPGM 0 1152 call void @external_void_func_v2i64(<2 x i64> <i64 8589934593, i64 17179869187>) 1153 ret void 1154} 1155 1156define amdgpu_kernel void @test_call_external_void_func_i48(i32) #0 { 1157 ; CHECK-LABEL: name: test_call_external_void_func_i48 1158 ; CHECK: bb.1 (%ir-block.1): 1159 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1160 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1161 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1162 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1163 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1164 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1165 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1166 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1167 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1168 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1169 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1170 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 1171 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 1172 ; CHECK: [[LOAD:%[0-9]+]]:_(s48) = G_LOAD [[DEF]](p1) :: (volatile load 6 from `i48 addrspace(1)* undef`, align 8, addrspace 1) 1173 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s48) 1174 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ANYEXT]](s64) 1175 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1176 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i48 1177 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1178 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1179 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1180 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 1181 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 1182 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1183 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1184 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1185 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1186 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1187 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1188 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1189 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 1190 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1191 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1192 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1193 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 1194 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1195 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1196 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1197 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1198 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1199 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1200 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1201 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1202 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1203 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1204 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1205 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1206 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1207 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i48, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1208 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1209 ; CHECK: S_ENDPGM 0 1210 %var = load volatile i48, i48 addrspace(1)* undef 1211 call void @external_void_func_i48(i48 %var) 1212 ret void 1213} 1214 1215define amdgpu_kernel void @test_call_external_void_func_i48_signext(i32) #0 { 1216 ; CHECK-LABEL: name: test_call_external_void_func_i48_signext 1217 ; CHECK: bb.1 (%ir-block.1): 1218 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1219 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1220 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1221 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1222 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1223 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1224 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1225 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1226 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1227 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1228 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1229 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 1230 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 1231 ; CHECK: [[LOAD:%[0-9]+]]:_(s48) = G_LOAD [[DEF]](p1) :: (volatile load 6 from `i48 addrspace(1)* undef`, align 8, addrspace 1) 1232 ; CHECK: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[LOAD]](s48) 1233 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64) 1234 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1235 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i48_signext 1236 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1237 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1238 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1239 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 1240 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 1241 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1242 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1243 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1244 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1245 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1246 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1247 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1248 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 1249 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1250 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1251 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1252 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 1253 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1254 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1255 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1256 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1257 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1258 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1259 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1260 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1261 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1262 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1263 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1264 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1265 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1266 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i48_signext, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1267 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1268 ; CHECK: S_ENDPGM 0 1269 %var = load volatile i48, i48 addrspace(1)* undef 1270 call void @external_void_func_i48_signext(i48 signext %var) 1271 ret void 1272} 1273 1274define amdgpu_kernel void @test_call_external_void_func_i48_zeroext(i32) #0 { 1275 ; CHECK-LABEL: name: test_call_external_void_func_i48_zeroext 1276 ; CHECK: bb.1 (%ir-block.1): 1277 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1278 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1279 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1280 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1281 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1282 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1283 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1284 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1285 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1286 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1287 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1288 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 1289 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 1290 ; CHECK: [[LOAD:%[0-9]+]]:_(s48) = G_LOAD [[DEF]](p1) :: (volatile load 6 from `i48 addrspace(1)* undef`, align 8, addrspace 1) 1291 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[LOAD]](s48) 1292 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ZEXT]](s64) 1293 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1294 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_i48_zeroext 1295 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1296 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1297 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1298 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 1299 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 1300 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1301 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1302 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1303 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1304 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1305 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1306 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1307 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 1308 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1309 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1310 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1311 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 1312 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1313 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1314 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1315 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1316 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1317 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1318 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1319 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1320 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1321 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1322 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1323 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1324 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1325 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_i48_zeroext, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1326 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1327 ; CHECK: S_ENDPGM 0 1328 %var = load volatile i48, i48 addrspace(1)* undef 1329 call void @external_void_func_i48_zeroext(i48 zeroext %var) 1330 ret void 1331} 1332 1333define amdgpu_kernel void @test_call_external_void_func_p0_imm(i8* %arg) #0 { 1334 ; CHECK-LABEL: name: test_call_external_void_func_p0_imm 1335 ; CHECK: bb.1 (%ir-block.0): 1336 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1337 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1338 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1339 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1340 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1341 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1342 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1343 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1344 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1345 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1346 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1347 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 1348 ; CHECK: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[INT]](p4) :: (dereferenceable invariant load 8 from %ir.arg.kernarg.offset.cast, align 16, addrspace 4) 1349 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p0) 1350 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1351 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_p0 1352 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1353 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1354 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1355 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 1356 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 1357 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1358 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1359 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1360 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1361 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1362 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1363 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1364 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 1365 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1366 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1367 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1368 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 1369 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1370 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1371 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1372 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1373 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1374 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1375 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1376 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1377 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1378 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1379 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1380 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1381 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1382 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_p0, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1383 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1384 ; CHECK: S_ENDPGM 0 1385 call void @external_void_func_p0(i8* %arg) 1386 ret void 1387} 1388 1389define amdgpu_kernel void @test_call_external_void_func_v2p0() #0 { 1390 ; CHECK-LABEL: name: test_call_external_void_func_v2p0 1391 ; CHECK: bb.1 (%ir-block.0): 1392 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1393 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1394 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1395 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1396 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1397 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1398 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1399 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1400 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1401 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1402 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1403 ; CHECK: [[C:%[0-9]+]]:_(p1) = G_CONSTANT i64 0 1404 ; CHECK: [[LOAD:%[0-9]+]]:_(<2 x p0>) = G_LOAD [[C]](p1) :: (load 16 from `<2 x i8*> addrspace(1)* null`, addrspace 1) 1405 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<2 x p0>) 1406 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1407 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v2p0 1408 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1409 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1410 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1411 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1412 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 1413 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1414 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1415 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1416 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1417 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1418 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1419 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1420 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 1421 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1422 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1423 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1424 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 1425 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1426 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1427 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1428 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 1429 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 1430 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1431 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1432 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1433 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1434 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1435 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1436 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1437 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1438 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1439 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1440 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v2p0, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1441 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1442 ; CHECK: S_ENDPGM 0 1443 %val = load <2 x i8*>, <2 x i8*> addrspace(1)* null 1444 call void @external_void_func_v2p0(<2 x i8*> %val) 1445 ret void 1446} 1447 1448define amdgpu_kernel void @test_call_external_void_func_v3i64() #0 { 1449 ; CHECK-LABEL: name: test_call_external_void_func_v3i64 1450 ; CHECK: bb.1 (%ir-block.0): 1451 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1452 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1453 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1454 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1455 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1456 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1457 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1458 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1459 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1460 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1461 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1462 ; CHECK: [[C:%[0-9]+]]:_(p1) = G_CONSTANT i64 0 1463 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8589934593 1464 ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 1465 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C1]](s64), [[DEF]](s64) 1466 ; CHECK: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[C]](p1) :: (load 16 from `<2 x i64> addrspace(1)* null`, addrspace 1) 1467 ; CHECK: [[SHUF:%[0-9]+]]:_(<3 x s64>) = G_SHUFFLE_VECTOR [[LOAD]](<2 x s64>), [[BUILD_VECTOR]], shufflemask(0, 1, 2) 1468 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SHUF]](<3 x s64>) 1469 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1470 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v3i64 1471 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1472 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1473 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1474 ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1475 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C2]](s64) 1476 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1477 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1478 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1479 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1480 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1481 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1482 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1483 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C3]](s32) 1484 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1485 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1486 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1487 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C4]](s32) 1488 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1489 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1490 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1491 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 1492 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 1493 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 1494 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 1495 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1496 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1497 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1498 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1499 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1500 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1501 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1502 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1503 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1504 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1505 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v3i64, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1506 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1507 ; CHECK: S_ENDPGM 0 1508 %load = load <2 x i64>, <2 x i64> addrspace(1)* null 1509 %val = shufflevector <2 x i64> %load, <2 x i64> <i64 8589934593, i64 undef>, <3 x i32> <i32 0, i32 1, i32 2> 1510 1511 call void @external_void_func_v3i64(<3 x i64> %val) 1512 ret void 1513} 1514 1515define amdgpu_kernel void @test_call_external_void_func_v4i64() #0 { 1516 ; CHECK-LABEL: name: test_call_external_void_func_v4i64 1517 ; CHECK: bb.1 (%ir-block.0): 1518 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1519 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1520 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1521 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1522 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1523 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1524 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1525 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1526 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1527 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1528 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1529 ; CHECK: [[C:%[0-9]+]]:_(p1) = G_CONSTANT i64 0 1530 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8589934593 1531 ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 17179869187 1532 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C1]](s64), [[C2]](s64) 1533 ; CHECK: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[C]](p1) :: (load 16 from `<2 x i64> addrspace(1)* null`, addrspace 1) 1534 ; CHECK: [[SHUF:%[0-9]+]]:_(<4 x s64>) = G_SHUFFLE_VECTOR [[LOAD]](<2 x s64>), [[BUILD_VECTOR]], shufflemask(0, 1, 2, 3) 1535 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SHUF]](<4 x s64>) 1536 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1537 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v4i64 1538 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1539 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1540 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1541 ; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1542 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C3]](s64) 1543 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1544 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1545 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1546 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1547 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1548 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1549 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1550 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C4]](s32) 1551 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1552 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1553 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1554 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C5]](s32) 1555 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1556 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1557 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1558 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 1559 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 1560 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 1561 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 1562 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 1563 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 1564 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1565 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1566 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1567 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1568 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1569 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1570 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1571 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1572 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1573 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1574 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v4i64, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1575 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1576 ; CHECK: S_ENDPGM 0 1577 %load = load <2 x i64>, <2 x i64> addrspace(1)* null 1578 %val = shufflevector <2 x i64> %load, <2 x i64> <i64 8589934593, i64 17179869187>, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 1579 call void @external_void_func_v4i64(<4 x i64> %val) 1580 ret void 1581} 1582 1583define amdgpu_kernel void @test_call_external_void_func_f16_imm() #0 { 1584 ; CHECK-LABEL: name: test_call_external_void_func_f16_imm 1585 ; CHECK: bb.1 (%ir-block.0): 1586 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1587 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1588 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1589 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1590 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1591 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1592 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1593 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1594 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1595 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1596 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1597 ; CHECK: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4400 1598 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1599 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_f16 1600 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1601 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1602 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1603 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1604 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 1605 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1606 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1607 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1608 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1609 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1610 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1611 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1612 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 1613 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1614 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1615 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1616 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 1617 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1618 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s16) 1619 ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) 1620 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1621 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1622 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1623 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1624 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1625 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1626 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1627 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1628 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1629 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1630 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_f16, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1631 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1632 ; CHECK: S_ENDPGM 0 1633 call void @external_void_func_f16(half 4.0) 1634 ret void 1635} 1636 1637define amdgpu_kernel void @test_call_external_void_func_f32_imm() #0 { 1638 ; CHECK-LABEL: name: test_call_external_void_func_f32_imm 1639 ; CHECK: bb.1 (%ir-block.0): 1640 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1641 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1642 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1643 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1644 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1645 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1646 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1647 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1648 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1649 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1650 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1651 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 4.000000e+00 1652 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1653 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_f32 1654 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1655 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1656 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1657 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1658 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 1659 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1660 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1661 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1662 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1663 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1664 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1665 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1666 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 1667 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1668 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1669 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1670 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 1671 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1672 ; CHECK: $vgpr0 = COPY [[C]](s32) 1673 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1674 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1675 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1676 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1677 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1678 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1679 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1680 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1681 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1682 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1683 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_f32, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1684 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1685 ; CHECK: S_ENDPGM 0 1686 call void @external_void_func_f32(float 4.0) 1687 ret void 1688} 1689 1690define amdgpu_kernel void @test_call_external_void_func_v2f32_imm() #0 { 1691 ; CHECK-LABEL: name: test_call_external_void_func_v2f32_imm 1692 ; CHECK: bb.1 (%ir-block.0): 1693 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1694 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1695 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1696 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1697 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1698 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1699 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1700 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1701 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1702 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1703 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1704 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00 1705 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.000000e+00 1706 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C1]](s32) 1707 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<2 x s32>) 1708 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1709 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v2f32 1710 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1711 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1712 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1713 ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1714 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C2]](s64) 1715 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1716 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1717 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1718 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1719 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1720 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1721 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1722 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C3]](s32) 1723 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1724 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1725 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1726 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C4]](s32) 1727 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1728 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1729 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1730 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1731 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1732 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1733 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1734 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1735 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1736 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1737 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1738 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1739 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1740 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v2f32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1741 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1742 ; CHECK: S_ENDPGM 0 1743 call void @external_void_func_v2f32(<2 x float> <float 1.0, float 2.0>) 1744 ret void 1745} 1746 1747define amdgpu_kernel void @test_call_external_void_func_v3f32_imm() #0 { 1748 ; CHECK-LABEL: name: test_call_external_void_func_v3f32_imm 1749 ; CHECK: bb.1 (%ir-block.0): 1750 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1751 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1752 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1753 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1754 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1755 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1756 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1757 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1758 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1759 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1760 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1761 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00 1762 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.000000e+00 1763 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_FCONSTANT float 4.000000e+00 1764 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C1]](s32), [[C2]](s32) 1765 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<3 x s32>) 1766 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1767 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v3f32 1768 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1769 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1770 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1771 ; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1772 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C3]](s64) 1773 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1774 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1775 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1776 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1777 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1778 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1779 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1780 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C4]](s32) 1781 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1782 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1783 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1784 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C5]](s32) 1785 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1786 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1787 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1788 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 1789 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1790 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1791 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1792 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1793 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1794 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1795 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1796 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1797 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1798 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1799 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v3f32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1800 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1801 ; CHECK: S_ENDPGM 0 1802 call void @external_void_func_v3f32(<3 x float> <float 1.0, float 2.0, float 4.0>) 1803 ret void 1804} 1805 1806define amdgpu_kernel void @test_call_external_void_func_v5f32_imm() #0 { 1807 ; CHECK-LABEL: name: test_call_external_void_func_v5f32_imm 1808 ; CHECK: bb.1 (%ir-block.0): 1809 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1810 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1811 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1812 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1813 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1814 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1815 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1816 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1817 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1818 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1819 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1820 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00 1821 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.000000e+00 1822 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_FCONSTANT float 4.000000e+00 1823 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_FCONSTANT float -1.000000e+00 1824 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_FCONSTANT float 5.000000e-01 1825 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C1]](s32), [[C2]](s32), [[C3]](s32), [[C4]](s32) 1826 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<5 x s32>) 1827 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1828 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v5f32 1829 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1830 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1831 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1832 ; CHECK: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1833 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C5]](s64) 1834 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1835 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1836 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1837 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1838 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1839 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1840 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1841 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C6]](s32) 1842 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1843 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1844 ; CHECK: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1845 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C7]](s32) 1846 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1847 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1848 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1849 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 1850 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 1851 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 1852 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1853 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1854 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1855 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1856 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1857 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1858 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1859 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1860 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1861 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1862 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v5f32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1863 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1864 ; CHECK: S_ENDPGM 0 1865 call void @external_void_func_v5f32(<5 x float> <float 1.0, float 2.0, float 4.0, float -1.0, float 0.5>) 1866 ret void 1867} 1868 1869define amdgpu_kernel void @test_call_external_void_func_f64_imm() #0 { 1870 ; CHECK-LABEL: name: test_call_external_void_func_f64_imm 1871 ; CHECK: bb.1 (%ir-block.0): 1872 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1873 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1874 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1875 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1876 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1877 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1878 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1879 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1880 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1881 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1882 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1883 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 4.000000e+00 1884 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64) 1885 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1886 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_f64 1887 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1888 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1889 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1890 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1891 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 1892 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1893 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1894 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1895 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1896 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1897 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1898 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1899 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 1900 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1901 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1902 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1903 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 1904 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1905 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1906 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1907 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1908 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1909 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1910 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1911 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1912 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1913 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1914 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1915 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1916 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1917 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_f64, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1918 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1919 ; CHECK: S_ENDPGM 0 1920 call void @external_void_func_f64(double 4.0) 1921 ret void 1922} 1923 1924define amdgpu_kernel void @test_call_external_void_func_v2f64_imm() #0 { 1925 ; CHECK-LABEL: name: test_call_external_void_func_v2f64_imm 1926 ; CHECK: bb.1 (%ir-block.0): 1927 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1928 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1929 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1930 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1931 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1932 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1933 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1934 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1935 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1936 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1937 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1938 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 2.000000e+00 1939 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 4.000000e+00 1940 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C1]](s64) 1941 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<2 x s64>) 1942 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 1943 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v2f64 1944 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 1945 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 1946 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 1947 ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 1948 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C2]](s64) 1949 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 1950 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 1951 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 1952 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 1953 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 1954 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 1955 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 1956 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C3]](s32) 1957 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 1958 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 1959 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1960 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C4]](s32) 1961 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1962 ; CHECK: $vgpr0 = COPY [[UV]](s32) 1963 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 1964 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 1965 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 1966 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 1967 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 1968 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 1969 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 1970 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 1971 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 1972 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 1973 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 1974 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 1975 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 1976 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v2f64, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 1977 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 1978 ; CHECK: S_ENDPGM 0 1979 call void @external_void_func_v2f64(<2 x double> <double 2.0, double 4.0>) 1980 ret void 1981} 1982 1983define amdgpu_kernel void @test_call_external_void_func_v3f64_imm() #0 { 1984 ; CHECK-LABEL: name: test_call_external_void_func_v3f64_imm 1985 ; CHECK: bb.1 (%ir-block.0): 1986 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 1987 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 1988 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 1989 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 1990 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 1991 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 1992 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 1993 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 1994 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 1995 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 1996 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 1997 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 2.000000e+00 1998 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 4.000000e+00 1999 ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_FCONSTANT double 8.000000e+00 2000 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C1]](s64), [[C2]](s64) 2001 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<3 x s64>) 2002 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2003 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v3f64 2004 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2005 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2006 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2007 ; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2008 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C3]](s64) 2009 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2010 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2011 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2012 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2013 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2014 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2015 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2016 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C4]](s32) 2017 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2018 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2019 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2020 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C5]](s32) 2021 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2022 ; CHECK: $vgpr0 = COPY [[UV]](s32) 2023 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 2024 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 2025 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 2026 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 2027 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 2028 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2029 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 2030 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2031 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2032 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2033 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2034 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2035 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2036 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2037 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2038 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v3f64, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2039 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 2040 ; CHECK: S_ENDPGM 0 2041 call void @external_void_func_v3f64(<3 x double> <double 2.0, double 4.0, double 8.0>) 2042 ret void 2043} 2044 2045define amdgpu_kernel void @test_call_external_void_func_v2i16() #0 { 2046 ; CHECK-LABEL: name: test_call_external_void_func_v2i16 2047 ; CHECK: bb.1 (%ir-block.0): 2048 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2049 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2050 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2051 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2052 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2053 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2054 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2055 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2056 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2057 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2058 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2059 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 2060 ; CHECK: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[DEF]](p1) :: (load 4 from `<2 x i16> addrspace(1)* undef`, addrspace 1) 2061 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2062 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v2i16 2063 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2064 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2065 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2066 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2067 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 2068 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2069 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2070 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2071 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2072 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2073 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2074 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2075 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 2076 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2077 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2078 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2079 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 2080 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2081 ; CHECK: $vgpr0 = COPY [[LOAD]](<2 x s16>) 2082 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2083 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 2084 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2085 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2086 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2087 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2088 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2089 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2090 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2091 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2092 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v2i16, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2093 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 2094 ; CHECK: S_ENDPGM 0 2095 %val = load <2 x i16>, <2 x i16> addrspace(1)* undef 2096 call void @external_void_func_v2i16(<2 x i16> %val) 2097 ret void 2098} 2099 2100define amdgpu_kernel void @test_call_external_void_func_v3i16() #0 { 2101 ; CHECK-LABEL: name: test_call_external_void_func_v3i16 2102 ; CHECK: bb.1 (%ir-block.0): 2103 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2104 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2105 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2106 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2107 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2108 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2109 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2110 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2111 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2112 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2113 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2114 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 2115 ; CHECK: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[DEF]](p1) :: (load 6 from `<3 x i16> addrspace(1)* undef`, align 8, addrspace 1) 2116 ; CHECK: [[DEF1:%[0-9]+]]:_(<3 x s16>) = G_IMPLICIT_DEF 2117 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[LOAD]](<3 x s16>), [[DEF1]](<3 x s16>) 2118 ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>), [[UV2:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<6 x s16>) 2119 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2120 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v3i16 2121 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2122 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2123 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2124 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2125 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 2126 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2127 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2128 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2129 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2130 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2131 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2132 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2133 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 2134 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2135 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2136 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2137 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 2138 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2139 ; CHECK: $vgpr0 = COPY [[UV]](<2 x s16>) 2140 ; CHECK: $vgpr1 = COPY [[UV1]](<2 x s16>) 2141 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2142 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 2143 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2144 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2145 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2146 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2147 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2148 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2149 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2150 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2151 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v3i16, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2152 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 2153 ; CHECK: S_ENDPGM 0 2154 %val = load <3 x i16>, <3 x i16> addrspace(1)* undef 2155 call void @external_void_func_v3i16(<3 x i16> %val) 2156 ret void 2157} 2158 2159define amdgpu_kernel void @test_call_external_void_func_v3f16() #0 { 2160 ; CHECK-LABEL: name: test_call_external_void_func_v3f16 2161 ; CHECK: bb.1 (%ir-block.0): 2162 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2163 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2164 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2165 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2166 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2167 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2168 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2169 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2170 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2171 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2172 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2173 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 2174 ; CHECK: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[DEF]](p1) :: (load 6 from `<3 x half> addrspace(1)* undef`, align 8, addrspace 1) 2175 ; CHECK: [[DEF1:%[0-9]+]]:_(<3 x s16>) = G_IMPLICIT_DEF 2176 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[LOAD]](<3 x s16>), [[DEF1]](<3 x s16>) 2177 ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>), [[UV2:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<6 x s16>) 2178 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2179 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v3f16 2180 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2181 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2182 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2183 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2184 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 2185 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2186 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2187 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2188 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2189 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2190 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2191 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2192 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 2193 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2194 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2195 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2196 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 2197 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2198 ; CHECK: $vgpr0 = COPY [[UV]](<2 x s16>) 2199 ; CHECK: $vgpr1 = COPY [[UV1]](<2 x s16>) 2200 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2201 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 2202 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2203 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2204 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2205 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2206 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2207 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2208 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2209 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2210 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v3f16, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2211 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 2212 ; CHECK: S_ENDPGM 0 2213 %val = load <3 x half>, <3 x half> addrspace(1)* undef 2214 call void @external_void_func_v3f16(<3 x half> %val) 2215 ret void 2216} 2217 2218define amdgpu_kernel void @test_call_external_void_func_v4i16() #0 { 2219 ; CHECK-LABEL: name: test_call_external_void_func_v4i16 2220 ; CHECK: bb.1 (%ir-block.0): 2221 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2222 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2223 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2224 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2225 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2226 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2227 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2228 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2229 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2230 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2231 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2232 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 2233 ; CHECK: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[DEF]](p1) :: (load 8 from `<4 x i16> addrspace(1)* undef`, addrspace 1) 2234 ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[LOAD]](<4 x s16>) 2235 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2236 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v4i16 2237 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2238 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2239 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2240 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2241 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 2242 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2243 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2244 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2245 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2246 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2247 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2248 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2249 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 2250 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2251 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2252 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2253 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 2254 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2255 ; CHECK: $vgpr0 = COPY [[UV]](<2 x s16>) 2256 ; CHECK: $vgpr1 = COPY [[UV1]](<2 x s16>) 2257 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2258 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 2259 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2260 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2261 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2262 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2263 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2264 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2265 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2266 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2267 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v4i16, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2268 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 2269 ; CHECK: S_ENDPGM 0 2270 %val = load <4 x i16>, <4 x i16> addrspace(1)* undef 2271 call void @external_void_func_v4i16(<4 x i16> %val) 2272 ret void 2273} 2274 2275define amdgpu_kernel void @test_call_external_void_func_v4i16_imm() #0 { 2276 ; CHECK-LABEL: name: test_call_external_void_func_v4i16_imm 2277 ; CHECK: bb.1 (%ir-block.0): 2278 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2279 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2280 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2281 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2282 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2283 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2284 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2285 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2286 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2287 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2288 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2289 ; CHECK: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 1 2290 ; CHECK: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 2 2291 ; CHECK: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 3 2292 ; CHECK: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 4 2293 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[C]](s16), [[C1]](s16), [[C2]](s16), [[C3]](s16) 2294 ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<4 x s16>) 2295 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2296 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v4i16 2297 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2298 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2299 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2300 ; CHECK: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2301 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C4]](s64) 2302 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2303 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2304 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2305 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2306 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2307 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2308 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2309 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C5]](s32) 2310 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2311 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2312 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2313 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C6]](s32) 2314 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2315 ; CHECK: $vgpr0 = COPY [[UV]](<2 x s16>) 2316 ; CHECK: $vgpr1 = COPY [[UV1]](<2 x s16>) 2317 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2318 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 2319 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2320 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2321 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2322 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2323 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2324 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2325 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2326 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2327 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v4i16, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2328 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 2329 ; CHECK: S_ENDPGM 0 2330 call void @external_void_func_v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>) 2331 ret void 2332} 2333 2334define amdgpu_kernel void @test_call_external_void_func_v5i16() #0 { 2335 ; CHECK-LABEL: name: test_call_external_void_func_v5i16 2336 ; CHECK: bb.1 (%ir-block.0): 2337 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2338 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2339 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2340 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2341 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2342 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2343 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2344 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2345 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2346 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2347 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2348 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 2349 ; CHECK: [[LOAD:%[0-9]+]]:_(<5 x s16>) = G_LOAD [[DEF]](p1) :: (load 10 from `<5 x i16> addrspace(1)* undef`, align 16, addrspace 1) 2350 ; CHECK: [[DEF1:%[0-9]+]]:_(<5 x s16>) = G_IMPLICIT_DEF 2351 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<10 x s16>) = G_CONCAT_VECTORS [[LOAD]](<5 x s16>), [[DEF1]](<5 x s16>) 2352 ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>), [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>), [[UV4:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<10 x s16>) 2353 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2354 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v5i16 2355 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2356 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2357 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2358 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2359 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 2360 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2361 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2362 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2363 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2364 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2365 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2366 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2367 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 2368 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2369 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2370 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2371 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 2372 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2373 ; CHECK: $vgpr0 = COPY [[UV]](<2 x s16>) 2374 ; CHECK: $vgpr1 = COPY [[UV1]](<2 x s16>) 2375 ; CHECK: $vgpr2 = COPY [[UV2]](<2 x s16>) 2376 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2377 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 2378 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2379 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2380 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2381 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2382 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2383 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2384 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2385 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2386 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v5i16, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2387 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 2388 ; CHECK: S_ENDPGM 0 2389 %val = load <5 x i16>, <5 x i16> addrspace(1)* undef 2390 call void @external_void_func_v5i16(<5 x i16> %val) 2391 ret void 2392} 2393 2394define amdgpu_kernel void @test_call_external_void_func_v7i16() #0 { 2395 ; CHECK-LABEL: name: test_call_external_void_func_v7i16 2396 ; CHECK: bb.1 (%ir-block.0): 2397 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2398 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2399 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2400 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2401 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2402 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2403 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2404 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2405 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2406 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2407 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2408 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 2409 ; CHECK: [[LOAD:%[0-9]+]]:_(<7 x s16>) = G_LOAD [[DEF]](p1) :: (load 14 from `<7 x i16> addrspace(1)* undef`, align 16, addrspace 1) 2410 ; CHECK: [[DEF1:%[0-9]+]]:_(<7 x s16>) = G_IMPLICIT_DEF 2411 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<14 x s16>) = G_CONCAT_VECTORS [[LOAD]](<7 x s16>), [[DEF1]](<7 x s16>) 2412 ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>), [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>), [[UV4:%[0-9]+]]:_(<2 x s16>), [[UV5:%[0-9]+]]:_(<2 x s16>), [[UV6:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<14 x s16>) 2413 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2414 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v7i16 2415 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2416 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2417 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2418 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2419 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 2420 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2421 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2422 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2423 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2424 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2425 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2426 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2427 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 2428 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2429 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2430 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2431 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 2432 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2433 ; CHECK: $vgpr0 = COPY [[UV]](<2 x s16>) 2434 ; CHECK: $vgpr1 = COPY [[UV1]](<2 x s16>) 2435 ; CHECK: $vgpr2 = COPY [[UV2]](<2 x s16>) 2436 ; CHECK: $vgpr3 = COPY [[UV3]](<2 x s16>) 2437 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2438 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 2439 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2440 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2441 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2442 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2443 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2444 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2445 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2446 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2447 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v7i16, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2448 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 2449 ; CHECK: S_ENDPGM 0 2450 %val = load <7 x i16>, <7 x i16> addrspace(1)* undef 2451 call void @external_void_func_v7i16(<7 x i16> %val) 2452 ret void 2453} 2454 2455define amdgpu_kernel void @test_call_external_void_func_v63i16() #0 { 2456 ; CHECK-LABEL: name: test_call_external_void_func_v63i16 2457 ; CHECK: bb.1 (%ir-block.0): 2458 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2459 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2460 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2461 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2462 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2463 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2464 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2465 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2466 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2467 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2468 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2469 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 2470 ; CHECK: [[LOAD:%[0-9]+]]:_(<63 x s16>) = G_LOAD [[DEF]](p1) :: (load 126 from `<63 x i16> addrspace(1)* undef`, align 128, addrspace 1) 2471 ; CHECK: [[DEF1:%[0-9]+]]:_(<63 x s16>) = G_IMPLICIT_DEF 2472 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<126 x s16>) = G_CONCAT_VECTORS [[LOAD]](<63 x s16>), [[DEF1]](<63 x s16>) 2473 ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>), [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>), [[UV4:%[0-9]+]]:_(<2 x s16>), [[UV5:%[0-9]+]]:_(<2 x s16>), [[UV6:%[0-9]+]]:_(<2 x s16>), [[UV7:%[0-9]+]]:_(<2 x s16>), [[UV8:%[0-9]+]]:_(<2 x s16>), [[UV9:%[0-9]+]]:_(<2 x s16>), [[UV10:%[0-9]+]]:_(<2 x s16>), [[UV11:%[0-9]+]]:_(<2 x s16>), [[UV12:%[0-9]+]]:_(<2 x s16>), [[UV13:%[0-9]+]]:_(<2 x s16>), [[UV14:%[0-9]+]]:_(<2 x s16>), [[UV15:%[0-9]+]]:_(<2 x s16>), [[UV16:%[0-9]+]]:_(<2 x s16>), [[UV17:%[0-9]+]]:_(<2 x s16>), [[UV18:%[0-9]+]]:_(<2 x s16>), [[UV19:%[0-9]+]]:_(<2 x s16>), [[UV20:%[0-9]+]]:_(<2 x s16>), [[UV21:%[0-9]+]]:_(<2 x s16>), [[UV22:%[0-9]+]]:_(<2 x s16>), [[UV23:%[0-9]+]]:_(<2 x s16>), [[UV24:%[0-9]+]]:_(<2 x s16>), [[UV25:%[0-9]+]]:_(<2 x s16>), [[UV26:%[0-9]+]]:_(<2 x s16>), [[UV27:%[0-9]+]]:_(<2 x s16>), [[UV28:%[0-9]+]]:_(<2 x s16>), [[UV29:%[0-9]+]]:_(<2 x s16>), [[UV30:%[0-9]+]]:_(<2 x s16>), [[UV31:%[0-9]+]]:_(<2 x s16>), [[UV32:%[0-9]+]]:_(<2 x s16>), [[UV33:%[0-9]+]]:_(<2 x s16>), [[UV34:%[0-9]+]]:_(<2 x s16>), [[UV35:%[0-9]+]]:_(<2 x s16>), [[UV36:%[0-9]+]]:_(<2 x s16>), [[UV37:%[0-9]+]]:_(<2 x s16>), [[UV38:%[0-9]+]]:_(<2 x s16>), [[UV39:%[0-9]+]]:_(<2 x s16>), [[UV40:%[0-9]+]]:_(<2 x s16>), [[UV41:%[0-9]+]]:_(<2 x s16>), [[UV42:%[0-9]+]]:_(<2 x s16>), [[UV43:%[0-9]+]]:_(<2 x s16>), [[UV44:%[0-9]+]]:_(<2 x s16>), [[UV45:%[0-9]+]]:_(<2 x s16>), [[UV46:%[0-9]+]]:_(<2 x s16>), [[UV47:%[0-9]+]]:_(<2 x s16>), [[UV48:%[0-9]+]]:_(<2 x s16>), [[UV49:%[0-9]+]]:_(<2 x s16>), [[UV50:%[0-9]+]]:_(<2 x s16>), [[UV51:%[0-9]+]]:_(<2 x s16>), [[UV52:%[0-9]+]]:_(<2 x s16>), [[UV53:%[0-9]+]]:_(<2 x s16>), [[UV54:%[0-9]+]]:_(<2 x s16>), [[UV55:%[0-9]+]]:_(<2 x s16>), [[UV56:%[0-9]+]]:_(<2 x s16>), [[UV57:%[0-9]+]]:_(<2 x s16>), [[UV58:%[0-9]+]]:_(<2 x s16>), [[UV59:%[0-9]+]]:_(<2 x s16>), [[UV60:%[0-9]+]]:_(<2 x s16>), [[UV61:%[0-9]+]]:_(<2 x s16>), [[UV62:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<126 x s16>) 2474 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2475 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v63i16 2476 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2477 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2478 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2479 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2480 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 2481 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2482 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2483 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2484 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2485 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2486 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2487 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2488 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 2489 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2490 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2491 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2492 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 2493 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2494 ; CHECK: $vgpr0 = COPY [[UV]](<2 x s16>) 2495 ; CHECK: $vgpr1 = COPY [[UV1]](<2 x s16>) 2496 ; CHECK: $vgpr2 = COPY [[UV2]](<2 x s16>) 2497 ; CHECK: $vgpr3 = COPY [[UV3]](<2 x s16>) 2498 ; CHECK: $vgpr4 = COPY [[UV4]](<2 x s16>) 2499 ; CHECK: $vgpr5 = COPY [[UV5]](<2 x s16>) 2500 ; CHECK: $vgpr6 = COPY [[UV6]](<2 x s16>) 2501 ; CHECK: $vgpr7 = COPY [[UV7]](<2 x s16>) 2502 ; CHECK: $vgpr8 = COPY [[UV8]](<2 x s16>) 2503 ; CHECK: $vgpr9 = COPY [[UV9]](<2 x s16>) 2504 ; CHECK: $vgpr10 = COPY [[UV10]](<2 x s16>) 2505 ; CHECK: $vgpr11 = COPY [[UV11]](<2 x s16>) 2506 ; CHECK: $vgpr12 = COPY [[UV12]](<2 x s16>) 2507 ; CHECK: $vgpr13 = COPY [[UV13]](<2 x s16>) 2508 ; CHECK: $vgpr14 = COPY [[UV14]](<2 x s16>) 2509 ; CHECK: $vgpr15 = COPY [[UV15]](<2 x s16>) 2510 ; CHECK: $vgpr16 = COPY [[UV16]](<2 x s16>) 2511 ; CHECK: $vgpr17 = COPY [[UV17]](<2 x s16>) 2512 ; CHECK: $vgpr18 = COPY [[UV18]](<2 x s16>) 2513 ; CHECK: $vgpr19 = COPY [[UV19]](<2 x s16>) 2514 ; CHECK: $vgpr20 = COPY [[UV20]](<2 x s16>) 2515 ; CHECK: $vgpr21 = COPY [[UV21]](<2 x s16>) 2516 ; CHECK: $vgpr22 = COPY [[UV22]](<2 x s16>) 2517 ; CHECK: $vgpr23 = COPY [[UV23]](<2 x s16>) 2518 ; CHECK: $vgpr24 = COPY [[UV24]](<2 x s16>) 2519 ; CHECK: $vgpr25 = COPY [[UV25]](<2 x s16>) 2520 ; CHECK: $vgpr26 = COPY [[UV26]](<2 x s16>) 2521 ; CHECK: $vgpr27 = COPY [[UV27]](<2 x s16>) 2522 ; CHECK: $vgpr28 = COPY [[UV28]](<2 x s16>) 2523 ; CHECK: $vgpr29 = COPY [[UV29]](<2 x s16>) 2524 ; CHECK: $vgpr30 = COPY [[UV30]](<2 x s16>) 2525 ; CHECK: [[COPY20:%[0-9]+]]:_(p5) = COPY $sp_reg 2526 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2527 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C3]](s32) 2528 ; CHECK: G_STORE [[UV31]](<2 x s16>), [[PTR_ADD1]](p5) :: (store 4 into stack, align 16, addrspace 5) 2529 ; CHECK: [[COPY21:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2530 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY21]](<4 x s32>) 2531 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2532 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2533 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2534 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2535 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2536 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2537 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2538 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2539 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v63i16, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2540 ; CHECK: ADJCALLSTACKDOWN 0, 4, implicit-def $scc 2541 ; CHECK: S_ENDPGM 0 2542 %val = load <63 x i16>, <63 x i16> addrspace(1)* undef 2543 call void @external_void_func_v63i16(<63 x i16> %val) 2544 ret void 2545} 2546 2547define amdgpu_kernel void @test_call_external_void_func_v65i16() #0 { 2548 ; CHECK-LABEL: name: test_call_external_void_func_v65i16 2549 ; CHECK: bb.1 (%ir-block.0): 2550 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2551 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2552 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2553 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2554 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2555 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2556 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2557 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2558 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2559 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2560 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2561 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 2562 ; CHECK: [[LOAD:%[0-9]+]]:_(<65 x s16>) = G_LOAD [[DEF]](p1) :: (load 130 from `<65 x i16> addrspace(1)* undef`, align 256, addrspace 1) 2563 ; CHECK: [[DEF1:%[0-9]+]]:_(<65 x s16>) = G_IMPLICIT_DEF 2564 ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<130 x s16>) = G_CONCAT_VECTORS [[LOAD]](<65 x s16>), [[DEF1]](<65 x s16>) 2565 ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>), [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>), [[UV4:%[0-9]+]]:_(<2 x s16>), [[UV5:%[0-9]+]]:_(<2 x s16>), [[UV6:%[0-9]+]]:_(<2 x s16>), [[UV7:%[0-9]+]]:_(<2 x s16>), [[UV8:%[0-9]+]]:_(<2 x s16>), [[UV9:%[0-9]+]]:_(<2 x s16>), [[UV10:%[0-9]+]]:_(<2 x s16>), [[UV11:%[0-9]+]]:_(<2 x s16>), [[UV12:%[0-9]+]]:_(<2 x s16>), [[UV13:%[0-9]+]]:_(<2 x s16>), [[UV14:%[0-9]+]]:_(<2 x s16>), [[UV15:%[0-9]+]]:_(<2 x s16>), [[UV16:%[0-9]+]]:_(<2 x s16>), [[UV17:%[0-9]+]]:_(<2 x s16>), [[UV18:%[0-9]+]]:_(<2 x s16>), [[UV19:%[0-9]+]]:_(<2 x s16>), [[UV20:%[0-9]+]]:_(<2 x s16>), [[UV21:%[0-9]+]]:_(<2 x s16>), [[UV22:%[0-9]+]]:_(<2 x s16>), [[UV23:%[0-9]+]]:_(<2 x s16>), [[UV24:%[0-9]+]]:_(<2 x s16>), [[UV25:%[0-9]+]]:_(<2 x s16>), [[UV26:%[0-9]+]]:_(<2 x s16>), [[UV27:%[0-9]+]]:_(<2 x s16>), [[UV28:%[0-9]+]]:_(<2 x s16>), [[UV29:%[0-9]+]]:_(<2 x s16>), [[UV30:%[0-9]+]]:_(<2 x s16>), [[UV31:%[0-9]+]]:_(<2 x s16>), [[UV32:%[0-9]+]]:_(<2 x s16>), [[UV33:%[0-9]+]]:_(<2 x s16>), [[UV34:%[0-9]+]]:_(<2 x s16>), [[UV35:%[0-9]+]]:_(<2 x s16>), [[UV36:%[0-9]+]]:_(<2 x s16>), [[UV37:%[0-9]+]]:_(<2 x s16>), [[UV38:%[0-9]+]]:_(<2 x s16>), [[UV39:%[0-9]+]]:_(<2 x s16>), [[UV40:%[0-9]+]]:_(<2 x s16>), [[UV41:%[0-9]+]]:_(<2 x s16>), [[UV42:%[0-9]+]]:_(<2 x s16>), [[UV43:%[0-9]+]]:_(<2 x s16>), [[UV44:%[0-9]+]]:_(<2 x s16>), [[UV45:%[0-9]+]]:_(<2 x s16>), [[UV46:%[0-9]+]]:_(<2 x s16>), [[UV47:%[0-9]+]]:_(<2 x s16>), [[UV48:%[0-9]+]]:_(<2 x s16>), [[UV49:%[0-9]+]]:_(<2 x s16>), [[UV50:%[0-9]+]]:_(<2 x s16>), [[UV51:%[0-9]+]]:_(<2 x s16>), [[UV52:%[0-9]+]]:_(<2 x s16>), [[UV53:%[0-9]+]]:_(<2 x s16>), [[UV54:%[0-9]+]]:_(<2 x s16>), [[UV55:%[0-9]+]]:_(<2 x s16>), [[UV56:%[0-9]+]]:_(<2 x s16>), [[UV57:%[0-9]+]]:_(<2 x s16>), [[UV58:%[0-9]+]]:_(<2 x s16>), [[UV59:%[0-9]+]]:_(<2 x s16>), [[UV60:%[0-9]+]]:_(<2 x s16>), [[UV61:%[0-9]+]]:_(<2 x s16>), [[UV62:%[0-9]+]]:_(<2 x s16>), [[UV63:%[0-9]+]]:_(<2 x s16>), [[UV64:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<130 x s16>) 2566 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2567 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v65i16 2568 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2569 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2570 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2571 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2572 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 2573 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2574 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2575 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2576 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2577 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2578 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2579 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2580 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 2581 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2582 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2583 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2584 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 2585 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2586 ; CHECK: $vgpr0 = COPY [[UV]](<2 x s16>) 2587 ; CHECK: $vgpr1 = COPY [[UV1]](<2 x s16>) 2588 ; CHECK: $vgpr2 = COPY [[UV2]](<2 x s16>) 2589 ; CHECK: $vgpr3 = COPY [[UV3]](<2 x s16>) 2590 ; CHECK: $vgpr4 = COPY [[UV4]](<2 x s16>) 2591 ; CHECK: $vgpr5 = COPY [[UV5]](<2 x s16>) 2592 ; CHECK: $vgpr6 = COPY [[UV6]](<2 x s16>) 2593 ; CHECK: $vgpr7 = COPY [[UV7]](<2 x s16>) 2594 ; CHECK: $vgpr8 = COPY [[UV8]](<2 x s16>) 2595 ; CHECK: $vgpr9 = COPY [[UV9]](<2 x s16>) 2596 ; CHECK: $vgpr10 = COPY [[UV10]](<2 x s16>) 2597 ; CHECK: $vgpr11 = COPY [[UV11]](<2 x s16>) 2598 ; CHECK: $vgpr12 = COPY [[UV12]](<2 x s16>) 2599 ; CHECK: $vgpr13 = COPY [[UV13]](<2 x s16>) 2600 ; CHECK: $vgpr14 = COPY [[UV14]](<2 x s16>) 2601 ; CHECK: $vgpr15 = COPY [[UV15]](<2 x s16>) 2602 ; CHECK: $vgpr16 = COPY [[UV16]](<2 x s16>) 2603 ; CHECK: $vgpr17 = COPY [[UV17]](<2 x s16>) 2604 ; CHECK: $vgpr18 = COPY [[UV18]](<2 x s16>) 2605 ; CHECK: $vgpr19 = COPY [[UV19]](<2 x s16>) 2606 ; CHECK: $vgpr20 = COPY [[UV20]](<2 x s16>) 2607 ; CHECK: $vgpr21 = COPY [[UV21]](<2 x s16>) 2608 ; CHECK: $vgpr22 = COPY [[UV22]](<2 x s16>) 2609 ; CHECK: $vgpr23 = COPY [[UV23]](<2 x s16>) 2610 ; CHECK: $vgpr24 = COPY [[UV24]](<2 x s16>) 2611 ; CHECK: $vgpr25 = COPY [[UV25]](<2 x s16>) 2612 ; CHECK: $vgpr26 = COPY [[UV26]](<2 x s16>) 2613 ; CHECK: $vgpr27 = COPY [[UV27]](<2 x s16>) 2614 ; CHECK: $vgpr28 = COPY [[UV28]](<2 x s16>) 2615 ; CHECK: $vgpr29 = COPY [[UV29]](<2 x s16>) 2616 ; CHECK: $vgpr30 = COPY [[UV30]](<2 x s16>) 2617 ; CHECK: [[COPY20:%[0-9]+]]:_(p5) = COPY $sp_reg 2618 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2619 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C3]](s32) 2620 ; CHECK: G_STORE [[UV31]](<2 x s16>), [[PTR_ADD1]](p5) :: (store 4 into stack, align 16, addrspace 5) 2621 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2622 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C4]](s32) 2623 ; CHECK: G_STORE [[UV32]](<2 x s16>), [[PTR_ADD2]](p5) :: (store 4 into stack + 4, addrspace 5) 2624 ; CHECK: [[COPY21:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2625 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY21]](<4 x s32>) 2626 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2627 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2628 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2629 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2630 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2631 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2632 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2633 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2634 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v65i16, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2635 ; CHECK: ADJCALLSTACKDOWN 0, 8, implicit-def $scc 2636 ; CHECK: S_ENDPGM 0 2637 %val = load <65 x i16>, <65 x i16> addrspace(1)* undef 2638 call void @external_void_func_v65i16(<65 x i16> %val) 2639 ret void 2640} 2641 2642define amdgpu_kernel void @test_call_external_void_func_v66i16() #0 { 2643 ; CHECK-LABEL: name: test_call_external_void_func_v66i16 2644 ; CHECK: bb.1 (%ir-block.0): 2645 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2646 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2647 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2648 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2649 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2650 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2651 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2652 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2653 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2654 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2655 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2656 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 2657 ; CHECK: [[LOAD:%[0-9]+]]:_(<66 x s16>) = G_LOAD [[DEF]](p1) :: (load 132 from `<66 x i16> addrspace(1)* undef`, align 256, addrspace 1) 2658 ; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>), [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>), [[UV4:%[0-9]+]]:_(<2 x s16>), [[UV5:%[0-9]+]]:_(<2 x s16>), [[UV6:%[0-9]+]]:_(<2 x s16>), [[UV7:%[0-9]+]]:_(<2 x s16>), [[UV8:%[0-9]+]]:_(<2 x s16>), [[UV9:%[0-9]+]]:_(<2 x s16>), [[UV10:%[0-9]+]]:_(<2 x s16>), [[UV11:%[0-9]+]]:_(<2 x s16>), [[UV12:%[0-9]+]]:_(<2 x s16>), [[UV13:%[0-9]+]]:_(<2 x s16>), [[UV14:%[0-9]+]]:_(<2 x s16>), [[UV15:%[0-9]+]]:_(<2 x s16>), [[UV16:%[0-9]+]]:_(<2 x s16>), [[UV17:%[0-9]+]]:_(<2 x s16>), [[UV18:%[0-9]+]]:_(<2 x s16>), [[UV19:%[0-9]+]]:_(<2 x s16>), [[UV20:%[0-9]+]]:_(<2 x s16>), [[UV21:%[0-9]+]]:_(<2 x s16>), [[UV22:%[0-9]+]]:_(<2 x s16>), [[UV23:%[0-9]+]]:_(<2 x s16>), [[UV24:%[0-9]+]]:_(<2 x s16>), [[UV25:%[0-9]+]]:_(<2 x s16>), [[UV26:%[0-9]+]]:_(<2 x s16>), [[UV27:%[0-9]+]]:_(<2 x s16>), [[UV28:%[0-9]+]]:_(<2 x s16>), [[UV29:%[0-9]+]]:_(<2 x s16>), [[UV30:%[0-9]+]]:_(<2 x s16>), [[UV31:%[0-9]+]]:_(<2 x s16>), [[UV32:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[LOAD]](<66 x s16>) 2659 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2660 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v66i16 2661 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2662 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2663 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2664 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2665 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 2666 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2667 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2668 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2669 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2670 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2671 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2672 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2673 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 2674 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2675 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2676 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2677 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 2678 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2679 ; CHECK: $vgpr0 = COPY [[UV]](<2 x s16>) 2680 ; CHECK: $vgpr1 = COPY [[UV1]](<2 x s16>) 2681 ; CHECK: $vgpr2 = COPY [[UV2]](<2 x s16>) 2682 ; CHECK: $vgpr3 = COPY [[UV3]](<2 x s16>) 2683 ; CHECK: $vgpr4 = COPY [[UV4]](<2 x s16>) 2684 ; CHECK: $vgpr5 = COPY [[UV5]](<2 x s16>) 2685 ; CHECK: $vgpr6 = COPY [[UV6]](<2 x s16>) 2686 ; CHECK: $vgpr7 = COPY [[UV7]](<2 x s16>) 2687 ; CHECK: $vgpr8 = COPY [[UV8]](<2 x s16>) 2688 ; CHECK: $vgpr9 = COPY [[UV9]](<2 x s16>) 2689 ; CHECK: $vgpr10 = COPY [[UV10]](<2 x s16>) 2690 ; CHECK: $vgpr11 = COPY [[UV11]](<2 x s16>) 2691 ; CHECK: $vgpr12 = COPY [[UV12]](<2 x s16>) 2692 ; CHECK: $vgpr13 = COPY [[UV13]](<2 x s16>) 2693 ; CHECK: $vgpr14 = COPY [[UV14]](<2 x s16>) 2694 ; CHECK: $vgpr15 = COPY [[UV15]](<2 x s16>) 2695 ; CHECK: $vgpr16 = COPY [[UV16]](<2 x s16>) 2696 ; CHECK: $vgpr17 = COPY [[UV17]](<2 x s16>) 2697 ; CHECK: $vgpr18 = COPY [[UV18]](<2 x s16>) 2698 ; CHECK: $vgpr19 = COPY [[UV19]](<2 x s16>) 2699 ; CHECK: $vgpr20 = COPY [[UV20]](<2 x s16>) 2700 ; CHECK: $vgpr21 = COPY [[UV21]](<2 x s16>) 2701 ; CHECK: $vgpr22 = COPY [[UV22]](<2 x s16>) 2702 ; CHECK: $vgpr23 = COPY [[UV23]](<2 x s16>) 2703 ; CHECK: $vgpr24 = COPY [[UV24]](<2 x s16>) 2704 ; CHECK: $vgpr25 = COPY [[UV25]](<2 x s16>) 2705 ; CHECK: $vgpr26 = COPY [[UV26]](<2 x s16>) 2706 ; CHECK: $vgpr27 = COPY [[UV27]](<2 x s16>) 2707 ; CHECK: $vgpr28 = COPY [[UV28]](<2 x s16>) 2708 ; CHECK: $vgpr29 = COPY [[UV29]](<2 x s16>) 2709 ; CHECK: $vgpr30 = COPY [[UV30]](<2 x s16>) 2710 ; CHECK: [[COPY20:%[0-9]+]]:_(p5) = COPY $sp_reg 2711 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2712 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C3]](s32) 2713 ; CHECK: G_STORE [[UV31]](<2 x s16>), [[PTR_ADD1]](p5) :: (store 4 into stack, align 16, addrspace 5) 2714 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2715 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C4]](s32) 2716 ; CHECK: G_STORE [[UV32]](<2 x s16>), [[PTR_ADD2]](p5) :: (store 4 into stack + 4, addrspace 5) 2717 ; CHECK: [[COPY21:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2718 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY21]](<4 x s32>) 2719 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2720 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2721 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2722 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2723 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2724 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2725 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2726 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2727 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v66i16, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2728 ; CHECK: ADJCALLSTACKDOWN 0, 8, implicit-def $scc 2729 ; CHECK: S_ENDPGM 0 2730 %val = load <66 x i16>, <66 x i16> addrspace(1)* undef 2731 call void @external_void_func_v66i16(<66 x i16> %val) 2732 ret void 2733} 2734 2735define amdgpu_kernel void @test_call_external_void_func_v2f16() #0 { 2736 ; CHECK-LABEL: name: test_call_external_void_func_v2f16 2737 ; CHECK: bb.1 (%ir-block.0): 2738 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2739 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2740 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2741 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2742 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2743 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2744 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2745 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2746 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2747 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2748 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2749 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 2750 ; CHECK: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[DEF]](p1) :: (load 4 from `<2 x half> addrspace(1)* undef`, addrspace 1) 2751 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2752 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v2f16 2753 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2754 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2755 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2756 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2757 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 2758 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2759 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2760 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2761 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2762 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2763 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2764 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2765 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 2766 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2767 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2768 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2769 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 2770 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2771 ; CHECK: $vgpr0 = COPY [[LOAD]](<2 x s16>) 2772 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2773 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 2774 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2775 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2776 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2777 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2778 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2779 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2780 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2781 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2782 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v2f16, csr_amdgpu_highregs, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2783 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 2784 ; CHECK: S_ENDPGM 0 2785 %val = load <2 x half>, <2 x half> addrspace(1)* undef 2786 call void @external_void_func_v2f16(<2 x half> %val) 2787 ret void 2788} 2789 2790define amdgpu_kernel void @test_call_external_void_func_v2i32() #0 { 2791 ; CHECK-LABEL: name: test_call_external_void_func_v2i32 2792 ; CHECK: bb.1 (%ir-block.0): 2793 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2794 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2795 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2796 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2797 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2798 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2799 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2800 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2801 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2802 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2803 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2804 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 2805 ; CHECK: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[DEF]](p1) :: (load 8 from `<2 x i32> addrspace(1)* undef`, addrspace 1) 2806 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<2 x s32>) 2807 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2808 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v2i32 2809 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2810 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2811 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2812 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2813 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 2814 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2815 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2816 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2817 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2818 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2819 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2820 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2821 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 2822 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2823 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2824 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2825 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 2826 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2827 ; CHECK: $vgpr0 = COPY [[UV]](s32) 2828 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 2829 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2830 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 2831 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2832 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2833 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2834 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2835 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2836 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2837 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2838 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2839 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v2i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2840 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 2841 ; CHECK: S_ENDPGM 0 2842 %val = load <2 x i32>, <2 x i32> addrspace(1)* undef 2843 call void @external_void_func_v2i32(<2 x i32> %val) 2844 ret void 2845} 2846 2847define amdgpu_kernel void @test_call_external_void_func_v2i32_imm() #0 { 2848 ; CHECK-LABEL: name: test_call_external_void_func_v2i32_imm 2849 ; CHECK: bb.1 (%ir-block.0): 2850 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2851 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2852 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2853 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2854 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2855 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2856 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2857 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2858 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2859 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2860 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2861 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2862 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2863 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C1]](s32) 2864 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<2 x s32>) 2865 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2866 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v2i32 2867 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2868 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2869 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2870 ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 2871 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C2]](s64) 2872 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2873 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2874 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2875 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2876 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2877 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2878 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2879 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C3]](s32) 2880 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2881 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2882 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2883 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C4]](s32) 2884 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2885 ; CHECK: $vgpr0 = COPY [[UV]](s32) 2886 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 2887 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2888 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 2889 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2890 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2891 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2892 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2893 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2894 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2895 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2896 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2897 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v2i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2898 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 2899 ; CHECK: S_ENDPGM 0 2900 call void @external_void_func_v2i32(<2 x i32> <i32 1, i32 2>) 2901 ret void 2902} 2903 2904define amdgpu_kernel void @test_call_external_void_func_v3i32_imm(i32) #0 { 2905 ; CHECK-LABEL: name: test_call_external_void_func_v3i32_imm 2906 ; CHECK: bb.1 (%ir-block.1): 2907 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2908 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2909 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2910 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2911 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2912 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2913 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2914 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2915 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2916 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2917 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2918 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2919 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2920 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 2921 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C1]](s32), [[C2]](s32) 2922 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 2923 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<3 x s32>) 2924 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2925 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v3i32 2926 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2927 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2928 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2929 ; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 2930 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C3]](s64) 2931 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2932 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2933 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2934 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2935 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2936 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2937 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2938 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C4]](s32) 2939 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 2940 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 2941 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 2942 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C5]](s32) 2943 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2944 ; CHECK: $vgpr0 = COPY [[UV]](s32) 2945 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 2946 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 2947 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 2948 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 2949 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 2950 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 2951 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 2952 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 2953 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 2954 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 2955 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 2956 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 2957 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v3i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 2958 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 2959 ; CHECK: S_ENDPGM 0 2960 call void @external_void_func_v3i32(<3 x i32> <i32 3, i32 4, i32 5>) 2961 ret void 2962} 2963 2964define amdgpu_kernel void @test_call_external_void_func_v3i32_i32(i32) #0 { 2965 ; CHECK-LABEL: name: test_call_external_void_func_v3i32_i32 2966 ; CHECK: bb.1 (%ir-block.1): 2967 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 2968 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 2969 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 2970 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 2971 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 2972 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 2973 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 2974 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 2975 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 2976 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 2977 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 2978 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2979 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2980 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 2981 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C1]](s32), [[C2]](s32) 2982 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 2983 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 2984 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<3 x s32>) 2985 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 2986 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v3i32_i32 2987 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 2988 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 2989 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 2990 ; CHECK: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 2991 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C4]](s64) 2992 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 2993 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 2994 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 2995 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 2996 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 2997 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 2998 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 2999 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C5]](s32) 3000 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 3001 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3002 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 3003 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C6]](s32) 3004 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3005 ; CHECK: $vgpr0 = COPY [[UV]](s32) 3006 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 3007 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 3008 ; CHECK: $vgpr3 = COPY [[C3]](s32) 3009 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 3010 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 3011 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 3012 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 3013 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 3014 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 3015 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 3016 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 3017 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 3018 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 3019 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v3i32_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3020 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 3021 ; CHECK: S_ENDPGM 0 3022 call void @external_void_func_v3i32_i32(<3 x i32> <i32 3, i32 4, i32 5>, i32 6) 3023 ret void 3024} 3025 3026define amdgpu_kernel void @test_call_external_void_func_v4i32() #0 { 3027 ; CHECK-LABEL: name: test_call_external_void_func_v4i32 3028 ; CHECK: bb.1 (%ir-block.0): 3029 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 3030 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 3031 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 3032 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 3033 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 3034 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 3035 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3036 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3037 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3038 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3039 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 3040 ; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 3041 ; CHECK: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[DEF]](p1) :: (load 16 from `<4 x i32> addrspace(1)* undef`, addrspace 1) 3042 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<4 x s32>) 3043 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3044 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v4i32 3045 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 3046 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3047 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 3048 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 3049 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 3050 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 3051 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 3052 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 3053 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3054 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 3055 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 3056 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 3057 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 3058 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 3059 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3060 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 3061 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 3062 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3063 ; CHECK: $vgpr0 = COPY [[UV]](s32) 3064 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 3065 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 3066 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 3067 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 3068 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 3069 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 3070 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 3071 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 3072 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 3073 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 3074 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 3075 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 3076 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 3077 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v4i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3078 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 3079 ; CHECK: S_ENDPGM 0 3080 %val = load <4 x i32>, <4 x i32> addrspace(1)* undef 3081 call void @external_void_func_v4i32(<4 x i32> %val) 3082 ret void 3083} 3084 3085define amdgpu_kernel void @test_call_external_void_func_v4i32_imm() #0 { 3086 ; CHECK-LABEL: name: test_call_external_void_func_v4i32_imm 3087 ; CHECK: bb.1 (%ir-block.0): 3088 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 3089 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 3090 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 3091 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 3092 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 3093 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 3094 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3095 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3096 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3097 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3098 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 3099 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3100 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3101 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3102 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3103 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C1]](s32), [[C2]](s32), [[C3]](s32) 3104 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<4 x s32>) 3105 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3106 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v4i32 3107 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 3108 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3109 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 3110 ; CHECK: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 3111 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C4]](s64) 3112 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 3113 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 3114 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 3115 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3116 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 3117 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 3118 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 3119 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C5]](s32) 3120 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 3121 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3122 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 3123 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C6]](s32) 3124 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3125 ; CHECK: $vgpr0 = COPY [[UV]](s32) 3126 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 3127 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 3128 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 3129 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 3130 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 3131 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 3132 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 3133 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 3134 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 3135 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 3136 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 3137 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 3138 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 3139 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v4i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3140 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 3141 ; CHECK: S_ENDPGM 0 3142 call void @external_void_func_v4i32(<4 x i32> <i32 1, i32 2, i32 3, i32 4>) 3143 ret void 3144} 3145 3146define amdgpu_kernel void @test_call_external_void_func_v5i32_imm() #0 { 3147 ; CHECK-LABEL: name: test_call_external_void_func_v5i32_imm 3148 ; CHECK: bb.1 (%ir-block.0): 3149 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 3150 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 3151 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 3152 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 3153 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 3154 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 3155 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3156 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3157 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3158 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3159 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 3160 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3161 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3162 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3163 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3164 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 3165 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C1]](s32), [[C2]](s32), [[C3]](s32), [[C4]](s32) 3166 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<5 x s32>) 3167 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3168 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v5i32 3169 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 3170 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3171 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 3172 ; CHECK: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 3173 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C5]](s64) 3174 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 3175 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 3176 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 3177 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3178 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 3179 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 3180 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 3181 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C6]](s32) 3182 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 3183 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3184 ; CHECK: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 3185 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C7]](s32) 3186 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3187 ; CHECK: $vgpr0 = COPY [[UV]](s32) 3188 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 3189 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 3190 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 3191 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 3192 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 3193 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 3194 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 3195 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 3196 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 3197 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 3198 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 3199 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 3200 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 3201 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 3202 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v5i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3203 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 3204 ; CHECK: S_ENDPGM 0 3205 call void @external_void_func_v5i32(<5 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5>) 3206 ret void 3207} 3208 3209define amdgpu_kernel void @test_call_external_void_func_v8i32() #0 { 3210 ; CHECK-LABEL: name: test_call_external_void_func_v8i32 3211 ; CHECK: bb.1 (%ir-block.0): 3212 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 3213 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 3214 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 3215 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 3216 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 3217 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 3218 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3219 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3220 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3221 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3222 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 3223 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 3224 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `<8 x i32> addrspace(1)* addrspace(4)* undef`, addrspace 4) 3225 ; CHECK: [[LOAD1:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[LOAD]](p1) :: (load 32 from %ir.ptr, addrspace 1) 3226 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](<8 x s32>) 3227 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3228 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v8i32 3229 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 3230 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3231 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 3232 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 3233 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 3234 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 3235 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 3236 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 3237 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3238 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 3239 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 3240 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 3241 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 3242 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 3243 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3244 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 3245 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 3246 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3247 ; CHECK: $vgpr0 = COPY [[UV]](s32) 3248 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 3249 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 3250 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 3251 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 3252 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 3253 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 3254 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 3255 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 3256 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 3257 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 3258 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 3259 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 3260 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 3261 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 3262 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 3263 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 3264 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 3265 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v8i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3266 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 3267 ; CHECK: S_ENDPGM 0 3268 %ptr = load <8 x i32> addrspace(1)*, <8 x i32> addrspace(1)* addrspace(4)* undef 3269 %val = load <8 x i32>, <8 x i32> addrspace(1)* %ptr 3270 call void @external_void_func_v8i32(<8 x i32> %val) 3271 ret void 3272} 3273 3274define amdgpu_kernel void @test_call_external_void_func_v8i32_imm() #0 { 3275 ; CHECK-LABEL: name: test_call_external_void_func_v8i32_imm 3276 ; CHECK: bb.1 (%ir-block.0): 3277 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 3278 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 3279 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 3280 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 3281 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 3282 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 3283 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3284 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3285 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3286 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3287 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 3288 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3289 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3290 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3291 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3292 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 3293 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 3294 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 3295 ; CHECK: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3296 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C1]](s32), [[C2]](s32), [[C3]](s32), [[C4]](s32), [[C5]](s32), [[C6]](s32), [[C7]](s32) 3297 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<8 x s32>) 3298 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3299 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v8i32 3300 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 3301 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3302 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 3303 ; CHECK: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 3304 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C8]](s64) 3305 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 3306 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 3307 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 3308 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3309 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 3310 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 3311 ; CHECK: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 3312 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C9]](s32) 3313 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 3314 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3315 ; CHECK: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 3316 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C10]](s32) 3317 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3318 ; CHECK: $vgpr0 = COPY [[UV]](s32) 3319 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 3320 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 3321 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 3322 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 3323 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 3324 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 3325 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 3326 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 3327 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 3328 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 3329 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 3330 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 3331 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 3332 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 3333 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 3334 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 3335 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 3336 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v8i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3337 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 3338 ; CHECK: S_ENDPGM 0 3339 call void @external_void_func_v8i32(<8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>) 3340 ret void 3341} 3342 3343define amdgpu_kernel void @test_call_external_void_func_v16i32() #0 { 3344 ; CHECK-LABEL: name: test_call_external_void_func_v16i32 3345 ; CHECK: bb.1 (%ir-block.0): 3346 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 3347 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 3348 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 3349 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 3350 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 3351 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 3352 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3353 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3354 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3355 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3356 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 3357 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 3358 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `<16 x i32> addrspace(1)* addrspace(4)* undef`, addrspace 4) 3359 ; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[LOAD]](p1) :: (load 64 from %ir.ptr, addrspace 1) 3360 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](<16 x s32>) 3361 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3362 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v16i32 3363 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 3364 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3365 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 3366 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 3367 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 3368 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 3369 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 3370 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 3371 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3372 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 3373 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 3374 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 3375 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 3376 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 3377 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3378 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 3379 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 3380 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3381 ; CHECK: $vgpr0 = COPY [[UV]](s32) 3382 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 3383 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 3384 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 3385 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 3386 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 3387 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 3388 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 3389 ; CHECK: $vgpr8 = COPY [[UV8]](s32) 3390 ; CHECK: $vgpr9 = COPY [[UV9]](s32) 3391 ; CHECK: $vgpr10 = COPY [[UV10]](s32) 3392 ; CHECK: $vgpr11 = COPY [[UV11]](s32) 3393 ; CHECK: $vgpr12 = COPY [[UV12]](s32) 3394 ; CHECK: $vgpr13 = COPY [[UV13]](s32) 3395 ; CHECK: $vgpr14 = COPY [[UV14]](s32) 3396 ; CHECK: $vgpr15 = COPY [[UV15]](s32) 3397 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 3398 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 3399 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 3400 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 3401 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 3402 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 3403 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 3404 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 3405 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 3406 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 3407 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v16i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3408 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 3409 ; CHECK: S_ENDPGM 0 3410 %ptr = load <16 x i32> addrspace(1)*, <16 x i32> addrspace(1)* addrspace(4)* undef 3411 %val = load <16 x i32>, <16 x i32> addrspace(1)* %ptr 3412 call void @external_void_func_v16i32(<16 x i32> %val) 3413 ret void 3414} 3415 3416define amdgpu_kernel void @test_call_external_void_func_v32i32() #0 { 3417 ; CHECK-LABEL: name: test_call_external_void_func_v32i32 3418 ; CHECK: bb.1 (%ir-block.0): 3419 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 3420 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 3421 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 3422 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 3423 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 3424 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 3425 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3426 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3427 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3428 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3429 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 3430 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 3431 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `<32 x i32> addrspace(1)* addrspace(4)* undef`, addrspace 4) 3432 ; CHECK: [[LOAD1:%[0-9]+]]:_(<32 x s32>) = G_LOAD [[LOAD]](p1) :: (load 128 from %ir.ptr, addrspace 1) 3433 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](<32 x s32>) 3434 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3435 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v32i32 3436 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 3437 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3438 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 3439 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 3440 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 3441 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 3442 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 3443 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 3444 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3445 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 3446 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 3447 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 3448 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 3449 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 3450 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3451 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 3452 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 3453 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3454 ; CHECK: $vgpr0 = COPY [[UV]](s32) 3455 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 3456 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 3457 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 3458 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 3459 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 3460 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 3461 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 3462 ; CHECK: $vgpr8 = COPY [[UV8]](s32) 3463 ; CHECK: $vgpr9 = COPY [[UV9]](s32) 3464 ; CHECK: $vgpr10 = COPY [[UV10]](s32) 3465 ; CHECK: $vgpr11 = COPY [[UV11]](s32) 3466 ; CHECK: $vgpr12 = COPY [[UV12]](s32) 3467 ; CHECK: $vgpr13 = COPY [[UV13]](s32) 3468 ; CHECK: $vgpr14 = COPY [[UV14]](s32) 3469 ; CHECK: $vgpr15 = COPY [[UV15]](s32) 3470 ; CHECK: $vgpr16 = COPY [[UV16]](s32) 3471 ; CHECK: $vgpr17 = COPY [[UV17]](s32) 3472 ; CHECK: $vgpr18 = COPY [[UV18]](s32) 3473 ; CHECK: $vgpr19 = COPY [[UV19]](s32) 3474 ; CHECK: $vgpr20 = COPY [[UV20]](s32) 3475 ; CHECK: $vgpr21 = COPY [[UV21]](s32) 3476 ; CHECK: $vgpr22 = COPY [[UV22]](s32) 3477 ; CHECK: $vgpr23 = COPY [[UV23]](s32) 3478 ; CHECK: $vgpr24 = COPY [[UV24]](s32) 3479 ; CHECK: $vgpr25 = COPY [[UV25]](s32) 3480 ; CHECK: $vgpr26 = COPY [[UV26]](s32) 3481 ; CHECK: $vgpr27 = COPY [[UV27]](s32) 3482 ; CHECK: $vgpr28 = COPY [[UV28]](s32) 3483 ; CHECK: $vgpr29 = COPY [[UV29]](s32) 3484 ; CHECK: $vgpr30 = COPY [[UV30]](s32) 3485 ; CHECK: [[COPY20:%[0-9]+]]:_(p5) = COPY $sp_reg 3486 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 3487 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C3]](s32) 3488 ; CHECK: G_STORE [[UV31]](s32), [[PTR_ADD1]](p5) :: (store 4 into stack, align 16, addrspace 5) 3489 ; CHECK: [[COPY21:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 3490 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY21]](<4 x s32>) 3491 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 3492 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 3493 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 3494 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 3495 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 3496 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 3497 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 3498 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 3499 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v32i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3500 ; CHECK: ADJCALLSTACKDOWN 0, 4, implicit-def $scc 3501 ; CHECK: S_ENDPGM 0 3502 %ptr = load <32 x i32> addrspace(1)*, <32 x i32> addrspace(1)* addrspace(4)* undef 3503 %val = load <32 x i32>, <32 x i32> addrspace(1)* %ptr 3504 call void @external_void_func_v32i32(<32 x i32> %val) 3505 ret void 3506} 3507 3508define amdgpu_kernel void @test_call_external_void_func_v32i32_i32(i32) #0 { 3509 ; CHECK-LABEL: name: test_call_external_void_func_v32i32_i32 3510 ; CHECK: bb.1 (%ir-block.1): 3511 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 3512 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 3513 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 3514 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 3515 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 3516 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 3517 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3518 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3519 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3520 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3521 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 3522 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 3523 ; CHECK: [[DEF1:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 3524 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 3525 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `<32 x i32> addrspace(1)* addrspace(4)* undef`, addrspace 4) 3526 ; CHECK: [[LOAD1:%[0-9]+]]:_(<32 x s32>) = G_LOAD [[LOAD]](p1) :: (load 128 from %ir.ptr0, addrspace 1) 3527 ; CHECK: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[DEF1]](p1) :: (load 4 from `i32 addrspace(1)* undef`, addrspace 1) 3528 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](<32 x s32>) 3529 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3530 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v32i32_i32 3531 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 3532 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3533 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 3534 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 3535 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 3536 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 3537 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 3538 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 3539 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3540 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 3541 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 3542 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 3543 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 3544 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 3545 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3546 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 3547 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 3548 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3549 ; CHECK: $vgpr0 = COPY [[UV]](s32) 3550 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 3551 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 3552 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 3553 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 3554 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 3555 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 3556 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 3557 ; CHECK: $vgpr8 = COPY [[UV8]](s32) 3558 ; CHECK: $vgpr9 = COPY [[UV9]](s32) 3559 ; CHECK: $vgpr10 = COPY [[UV10]](s32) 3560 ; CHECK: $vgpr11 = COPY [[UV11]](s32) 3561 ; CHECK: $vgpr12 = COPY [[UV12]](s32) 3562 ; CHECK: $vgpr13 = COPY [[UV13]](s32) 3563 ; CHECK: $vgpr14 = COPY [[UV14]](s32) 3564 ; CHECK: $vgpr15 = COPY [[UV15]](s32) 3565 ; CHECK: $vgpr16 = COPY [[UV16]](s32) 3566 ; CHECK: $vgpr17 = COPY [[UV17]](s32) 3567 ; CHECK: $vgpr18 = COPY [[UV18]](s32) 3568 ; CHECK: $vgpr19 = COPY [[UV19]](s32) 3569 ; CHECK: $vgpr20 = COPY [[UV20]](s32) 3570 ; CHECK: $vgpr21 = COPY [[UV21]](s32) 3571 ; CHECK: $vgpr22 = COPY [[UV22]](s32) 3572 ; CHECK: $vgpr23 = COPY [[UV23]](s32) 3573 ; CHECK: $vgpr24 = COPY [[UV24]](s32) 3574 ; CHECK: $vgpr25 = COPY [[UV25]](s32) 3575 ; CHECK: $vgpr26 = COPY [[UV26]](s32) 3576 ; CHECK: $vgpr27 = COPY [[UV27]](s32) 3577 ; CHECK: $vgpr28 = COPY [[UV28]](s32) 3578 ; CHECK: $vgpr29 = COPY [[UV29]](s32) 3579 ; CHECK: $vgpr30 = COPY [[UV30]](s32) 3580 ; CHECK: [[COPY20:%[0-9]+]]:_(p5) = COPY $sp_reg 3581 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 3582 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C3]](s32) 3583 ; CHECK: G_STORE [[UV31]](s32), [[PTR_ADD1]](p5) :: (store 4 into stack, align 16, addrspace 5) 3584 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3585 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C4]](s32) 3586 ; CHECK: G_STORE [[LOAD2]](s32), [[PTR_ADD2]](p5) :: (store 4 into stack + 4, addrspace 5) 3587 ; CHECK: [[COPY21:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 3588 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY21]](<4 x s32>) 3589 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 3590 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 3591 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 3592 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 3593 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 3594 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 3595 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 3596 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 3597 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v32i32_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3598 ; CHECK: ADJCALLSTACKDOWN 0, 8, implicit-def $scc 3599 ; CHECK: S_ENDPGM 0 3600 %ptr0 = load <32 x i32> addrspace(1)*, <32 x i32> addrspace(1)* addrspace(4)* undef 3601 %val0 = load <32 x i32>, <32 x i32> addrspace(1)* %ptr0 3602 %val1 = load i32, i32 addrspace(1)* undef 3603 call void @external_void_func_v32i32_i32(<32 x i32> %val0, i32 %val1) 3604 ret void 3605} 3606 3607define amdgpu_kernel void @test_call_external_void_func_v32i32_i8_i8_i16() #0 { 3608 ; CHECK-LABEL: name: test_call_external_void_func_v32i32_i8_i8_i16 3609 ; CHECK: bb.1 (%ir-block.0): 3610 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 3611 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 3612 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 3613 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 3614 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 3615 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 3616 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3617 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3618 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3619 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3620 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 3621 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 3622 ; CHECK: [[DEF1:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 3623 ; CHECK: [[COPY10:%[0-9]+]]:_(p1) = COPY [[DEF1]](p1) 3624 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `<32 x i32> addrspace(1)* addrspace(4)* undef`, addrspace 4) 3625 ; CHECK: [[LOAD1:%[0-9]+]]:_(<32 x s32>) = G_LOAD [[LOAD]](p1) :: (load 128 from %ir.ptr0, addrspace 1) 3626 ; CHECK: [[LOAD2:%[0-9]+]]:_(s8) = G_LOAD [[DEF1]](p1) :: (load 1 from `i8 addrspace(1)* undef`, addrspace 1) 3627 ; CHECK: [[LOAD3:%[0-9]+]]:_(s16) = G_LOAD [[COPY10]](p1) :: (load 2 from `i16 addrspace(1)* undef`, addrspace 1) 3628 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](<32 x s32>) 3629 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[LOAD2]](s8) 3630 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[LOAD3]](s16) 3631 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3632 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v32i32_i8_i8_i16 3633 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY8]] 3634 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3635 ; CHECK: [[COPY13:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 3636 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 3637 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY13]], [[C]](s64) 3638 ; CHECK: [[COPY14:%[0-9]+]]:_(s64) = COPY [[COPY6]] 3639 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY5]] 3640 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY4]] 3641 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3642 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 3643 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 3644 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 3645 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C1]](s32) 3646 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY18]], [[SHL]] 3647 ; CHECK: [[COPY20:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3648 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 3649 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY20]], [[C2]](s32) 3650 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3651 ; CHECK: $vgpr0 = COPY [[UV]](s32) 3652 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 3653 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 3654 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 3655 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 3656 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 3657 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 3658 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 3659 ; CHECK: $vgpr8 = COPY [[UV8]](s32) 3660 ; CHECK: $vgpr9 = COPY [[UV9]](s32) 3661 ; CHECK: $vgpr10 = COPY [[UV10]](s32) 3662 ; CHECK: $vgpr11 = COPY [[UV11]](s32) 3663 ; CHECK: $vgpr12 = COPY [[UV12]](s32) 3664 ; CHECK: $vgpr13 = COPY [[UV13]](s32) 3665 ; CHECK: $vgpr14 = COPY [[UV14]](s32) 3666 ; CHECK: $vgpr15 = COPY [[UV15]](s32) 3667 ; CHECK: $vgpr16 = COPY [[UV16]](s32) 3668 ; CHECK: $vgpr17 = COPY [[UV17]](s32) 3669 ; CHECK: $vgpr18 = COPY [[UV18]](s32) 3670 ; CHECK: $vgpr19 = COPY [[UV19]](s32) 3671 ; CHECK: $vgpr20 = COPY [[UV20]](s32) 3672 ; CHECK: $vgpr21 = COPY [[UV21]](s32) 3673 ; CHECK: $vgpr22 = COPY [[UV22]](s32) 3674 ; CHECK: $vgpr23 = COPY [[UV23]](s32) 3675 ; CHECK: $vgpr24 = COPY [[UV24]](s32) 3676 ; CHECK: $vgpr25 = COPY [[UV25]](s32) 3677 ; CHECK: $vgpr26 = COPY [[UV26]](s32) 3678 ; CHECK: $vgpr27 = COPY [[UV27]](s32) 3679 ; CHECK: $vgpr28 = COPY [[UV28]](s32) 3680 ; CHECK: $vgpr29 = COPY [[UV29]](s32) 3681 ; CHECK: $vgpr30 = COPY [[UV30]](s32) 3682 ; CHECK: [[COPY21:%[0-9]+]]:_(p5) = COPY $sp_reg 3683 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 3684 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY21]], [[C3]](s32) 3685 ; CHECK: G_STORE [[UV31]](s32), [[PTR_ADD1]](p5) :: (store 4 into stack, align 16, addrspace 5) 3686 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3687 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY21]], [[C4]](s32) 3688 ; CHECK: G_STORE [[ANYEXT]](s32), [[PTR_ADD2]](p5) :: (store 4 into stack + 4, addrspace 5) 3689 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3690 ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY21]], [[C5]](s32) 3691 ; CHECK: G_STORE [[ANYEXT]](s32), [[PTR_ADD3]](p5) :: (store 4 into stack + 8, align 8, addrspace 5) 3692 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 3693 ; CHECK: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY21]], [[C6]](s32) 3694 ; CHECK: G_STORE [[ANYEXT1]](s32), [[PTR_ADD4]](p5) :: (store 4 into stack + 12, addrspace 5) 3695 ; CHECK: [[COPY22:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 3696 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY22]](<4 x s32>) 3697 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY11]](p4) 3698 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY12]](p4) 3699 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 3700 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY14]](s64) 3701 ; CHECK: $sgpr12 = COPY [[COPY15]](s32) 3702 ; CHECK: $sgpr13 = COPY [[COPY16]](s32) 3703 ; CHECK: $sgpr14 = COPY [[COPY17]](s32) 3704 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 3705 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v32i32_i8_i8_i16, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3706 ; CHECK: ADJCALLSTACKDOWN 0, 16, implicit-def $scc 3707 ; CHECK: S_ENDPGM 0 3708 %ptr0 = load <32 x i32> addrspace(1)*, <32 x i32> addrspace(1)* addrspace(4)* undef 3709 %val0 = load <32 x i32>, <32 x i32> addrspace(1)* %ptr0 3710 %val1 = load i8, i8 addrspace(1)* undef 3711 %val2 = load i8, i8 addrspace(1)* undef 3712 %val3 = load i16, i16 addrspace(1)* undef 3713 call void @external_void_func_v32i32_i8_i8_i16(<32 x i32> %val0, i8 %val1, i8 %val2, i16 %val3) 3714 ret void 3715} 3716 3717define amdgpu_kernel void @test_call_external_void_func_v32i32_p3_p5() #0 { 3718 ; CHECK-LABEL: name: test_call_external_void_func_v32i32_p3_p5 3719 ; CHECK: bb.1 (%ir-block.0): 3720 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 3721 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 3722 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 3723 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 3724 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 3725 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 3726 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3727 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3728 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3729 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3730 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 3731 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 3732 ; CHECK: [[DEF1:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF 3733 ; CHECK: [[COPY10:%[0-9]+]]:_(p1) = COPY [[DEF1]](p1) 3734 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `<32 x i32> addrspace(1)* addrspace(4)* undef`, addrspace 4) 3735 ; CHECK: [[LOAD1:%[0-9]+]]:_(<32 x s32>) = G_LOAD [[LOAD]](p1) :: (load 128 from %ir.ptr0, addrspace 1) 3736 ; CHECK: [[LOAD2:%[0-9]+]]:_(p3) = G_LOAD [[DEF1]](p1) :: (load 4 from `i8 addrspace(3)* addrspace(1)* undef`, addrspace 1) 3737 ; CHECK: [[LOAD3:%[0-9]+]]:_(p5) = G_LOAD [[COPY10]](p1) :: (load 4 from `i8 addrspace(5)* addrspace(1)* undef`, addrspace 1) 3738 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](<32 x s32>) 3739 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3740 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v32i32_p3_p5 3741 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY8]] 3742 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3743 ; CHECK: [[COPY13:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 3744 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 3745 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY13]], [[C]](s64) 3746 ; CHECK: [[COPY14:%[0-9]+]]:_(s64) = COPY [[COPY6]] 3747 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY5]] 3748 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY4]] 3749 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3750 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 3751 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 3752 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 3753 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C1]](s32) 3754 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY18]], [[SHL]] 3755 ; CHECK: [[COPY20:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3756 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 3757 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY20]], [[C2]](s32) 3758 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3759 ; CHECK: $vgpr0 = COPY [[UV]](s32) 3760 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 3761 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 3762 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 3763 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 3764 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 3765 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 3766 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 3767 ; CHECK: $vgpr8 = COPY [[UV8]](s32) 3768 ; CHECK: $vgpr9 = COPY [[UV9]](s32) 3769 ; CHECK: $vgpr10 = COPY [[UV10]](s32) 3770 ; CHECK: $vgpr11 = COPY [[UV11]](s32) 3771 ; CHECK: $vgpr12 = COPY [[UV12]](s32) 3772 ; CHECK: $vgpr13 = COPY [[UV13]](s32) 3773 ; CHECK: $vgpr14 = COPY [[UV14]](s32) 3774 ; CHECK: $vgpr15 = COPY [[UV15]](s32) 3775 ; CHECK: $vgpr16 = COPY [[UV16]](s32) 3776 ; CHECK: $vgpr17 = COPY [[UV17]](s32) 3777 ; CHECK: $vgpr18 = COPY [[UV18]](s32) 3778 ; CHECK: $vgpr19 = COPY [[UV19]](s32) 3779 ; CHECK: $vgpr20 = COPY [[UV20]](s32) 3780 ; CHECK: $vgpr21 = COPY [[UV21]](s32) 3781 ; CHECK: $vgpr22 = COPY [[UV22]](s32) 3782 ; CHECK: $vgpr23 = COPY [[UV23]](s32) 3783 ; CHECK: $vgpr24 = COPY [[UV24]](s32) 3784 ; CHECK: $vgpr25 = COPY [[UV25]](s32) 3785 ; CHECK: $vgpr26 = COPY [[UV26]](s32) 3786 ; CHECK: $vgpr27 = COPY [[UV27]](s32) 3787 ; CHECK: $vgpr28 = COPY [[UV28]](s32) 3788 ; CHECK: $vgpr29 = COPY [[UV29]](s32) 3789 ; CHECK: $vgpr30 = COPY [[UV30]](s32) 3790 ; CHECK: [[COPY21:%[0-9]+]]:_(p5) = COPY $sp_reg 3791 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 3792 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY21]], [[C3]](s32) 3793 ; CHECK: G_STORE [[UV31]](s32), [[PTR_ADD1]](p5) :: (store 4 into stack, align 16, addrspace 5) 3794 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3795 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY21]], [[C4]](s32) 3796 ; CHECK: G_STORE [[LOAD2]](p3), [[PTR_ADD2]](p5) :: (store 4 into stack + 4, addrspace 5) 3797 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3798 ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY21]], [[C5]](s32) 3799 ; CHECK: G_STORE [[LOAD3]](p5), [[PTR_ADD3]](p5) :: (store 4 into stack + 8, align 8, addrspace 5) 3800 ; CHECK: [[COPY22:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 3801 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY22]](<4 x s32>) 3802 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY11]](p4) 3803 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY12]](p4) 3804 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 3805 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY14]](s64) 3806 ; CHECK: $sgpr12 = COPY [[COPY15]](s32) 3807 ; CHECK: $sgpr13 = COPY [[COPY16]](s32) 3808 ; CHECK: $sgpr14 = COPY [[COPY17]](s32) 3809 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 3810 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v32i32_p3_p5, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3811 ; CHECK: ADJCALLSTACKDOWN 0, 12, implicit-def $scc 3812 ; CHECK: S_ENDPGM 0 3813 %ptr0 = load <32 x i32> addrspace(1)*, <32 x i32> addrspace(1)* addrspace(4)* undef 3814 %val0 = load <32 x i32>, <32 x i32> addrspace(1)* %ptr0 3815 %val1 = load i8 addrspace(3)*, i8 addrspace(3)* addrspace(1)* undef 3816 %val2 = load i8 addrspace(5)*, i8 addrspace(5)* addrspace(1)* undef 3817 call void @external_void_func_v32i32_p3_p5(<32 x i32> %val0, i8 addrspace(3)* %val1, i8 addrspace(5)* %val2) 3818 ret void 3819} 3820 3821define amdgpu_kernel void @test_call_external_void_func_struct_i8_i32() #0 { 3822 ; CHECK-LABEL: name: test_call_external_void_func_struct_i8_i32 3823 ; CHECK: bb.1 (%ir-block.0): 3824 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 3825 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 3826 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 3827 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 3828 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 3829 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 3830 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3831 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3832 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3833 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3834 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 3835 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 3836 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `{ i8, i32 } addrspace(1)* addrspace(4)* undef`, addrspace 4) 3837 ; CHECK: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[LOAD]](p1) :: (load 1 from %ir.ptr0, align 4, addrspace 1) 3838 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 3839 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[LOAD]], [[C]](s64) 3840 ; CHECK: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4 from %ir.ptr0 + 4, addrspace 1) 3841 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[LOAD1]](s8) 3842 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3843 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_struct_i8_i32 3844 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 3845 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3846 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 3847 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 3848 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 3849 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 3850 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 3851 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 3852 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3853 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 3854 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 3855 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 3856 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 3857 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 3858 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3859 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 3860 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 3861 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3862 ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) 3863 ; CHECK: $vgpr1 = COPY [[LOAD2]](s32) 3864 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 3865 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 3866 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 3867 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 3868 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD1]](p4) 3869 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 3870 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 3871 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 3872 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 3873 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 3874 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_struct_i8_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3875 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 3876 ; CHECK: S_ENDPGM 0 3877 %ptr0 = load { i8, i32 } addrspace(1)*, { i8, i32 } addrspace(1)* addrspace(4)* undef 3878 %val = load { i8, i32 }, { i8, i32 } addrspace(1)* %ptr0 3879 call void @external_void_func_struct_i8_i32({ i8, i32 } %val) 3880 ret void 3881} 3882 3883define amdgpu_gfx void @test_gfx_call_external_void_func_struct_i8_i32() #0 { 3884 ; CHECK-LABEL: name: test_gfx_call_external_void_func_struct_i8_i32 3885 ; CHECK: bb.1 (%ir-block.0): 3886 ; CHECK: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 3887 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 3888 ; CHECK: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3889 ; CHECK: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 3890 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 3891 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3892 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 3893 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3894 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3895 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 3896 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 3897 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `{ i8, i32 } addrspace(1)* addrspace(4)* undef`, addrspace 4) 3898 ; CHECK: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[LOAD]](p1) :: (load 1 from %ir.ptr0, align 4, addrspace 1) 3899 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 3900 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[LOAD]], [[C]](s64) 3901 ; CHECK: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4 from %ir.ptr0 + 4, addrspace 1) 3902 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[LOAD1]](s8) 3903 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3904 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_gfx_void_func_struct_i8_i32 3905 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3906 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY6]] 3907 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY5]] 3908 ; CHECK: [[COPY12:%[0-9]+]]:_(s64) = COPY [[COPY4]] 3909 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3910 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY2]] 3911 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY1]] 3912 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3913 ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) 3914 ; CHECK: $vgpr1 = COPY [[LOAD2]](s32) 3915 ; CHECK: [[COPY17:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 3916 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY17]](<4 x s32>) 3917 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY9]](p4) 3918 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY10]](p4) 3919 ; CHECK: $sgpr8_sgpr9 = COPY [[COPY11]](p4) 3920 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY12]](s64) 3921 ; CHECK: $sgpr12 = COPY [[COPY13]](s32) 3922 ; CHECK: $sgpr13 = COPY [[COPY14]](s32) 3923 ; CHECK: $sgpr14 = COPY [[COPY15]](s32) 3924 ; CHECK: $vgpr31 = COPY [[COPY16]](s32) 3925 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_gfx_void_func_struct_i8_i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3926 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 3927 ; CHECK: [[COPY18:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]] 3928 ; CHECK: S_SETPC_B64_return [[COPY18]] 3929 %ptr0 = load { i8, i32 } addrspace(1)*, { i8, i32 } addrspace(1)* addrspace(4)* undef 3930 %val = load { i8, i32 }, { i8, i32 } addrspace(1)* %ptr0 3931 call amdgpu_gfx void @external_gfx_void_func_struct_i8_i32({ i8, i32 } %val) 3932 ret void 3933} 3934 3935define amdgpu_gfx void @test_gfx_call_external_void_func_struct_i8_i32_inreg() #0 { 3936 ; CHECK-LABEL: name: test_gfx_call_external_void_func_struct_i8_i32_inreg 3937 ; CHECK: bb.1 (%ir-block.0): 3938 ; CHECK: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 3939 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 3940 ; CHECK: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3941 ; CHECK: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 3942 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 3943 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3944 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 3945 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3946 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 3947 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 3948 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 3949 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `{ i8, i32 } addrspace(1)* addrspace(4)* undef`, addrspace 4) 3950 ; CHECK: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[LOAD]](p1) :: (load 1 from %ir.ptr0, align 4, addrspace 1) 3951 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 3952 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[LOAD]], [[C]](s64) 3953 ; CHECK: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4 from %ir.ptr0 + 4, addrspace 1) 3954 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[LOAD1]](s8) 3955 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 3956 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_gfx_void_func_struct_i8_i32_inreg 3957 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY [[COPY7]] 3958 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY6]] 3959 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY5]] 3960 ; CHECK: [[COPY12:%[0-9]+]]:_(s64) = COPY [[COPY4]] 3961 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[COPY3]] 3962 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY2]] 3963 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY1]] 3964 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 3965 ; CHECK: $sgpr15 = COPY [[ANYEXT]](s32) 3966 ; CHECK: $sgpr16 = COPY [[LOAD2]](s32) 3967 ; CHECK: [[COPY17:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 3968 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY17]](<4 x s32>) 3969 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY9]](p4) 3970 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY10]](p4) 3971 ; CHECK: $sgpr8_sgpr9 = COPY [[COPY11]](p4) 3972 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY12]](s64) 3973 ; CHECK: $sgpr12 = COPY [[COPY13]](s32) 3974 ; CHECK: $sgpr13 = COPY [[COPY14]](s32) 3975 ; CHECK: $sgpr14 = COPY [[COPY15]](s32) 3976 ; CHECK: $vgpr31 = COPY [[COPY16]](s32) 3977 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_gfx_void_func_struct_i8_i32_inreg, csr_amdgpu_highregs, implicit $sgpr15, implicit $sgpr16, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 3978 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 3979 ; CHECK: [[COPY18:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]] 3980 ; CHECK: S_SETPC_B64_return [[COPY18]] 3981 %ptr0 = load { i8, i32 } addrspace(1)*, { i8, i32 } addrspace(1)* addrspace(4)* undef 3982 %val = load { i8, i32 }, { i8, i32 } addrspace(1)* %ptr0 3983 call amdgpu_gfx void @external_gfx_void_func_struct_i8_i32_inreg({ i8, i32 } inreg %val) 3984 ret void 3985} 3986 3987define amdgpu_kernel void @test_call_external_void_func_byval_struct_i8_i32() #0 { 3988 ; CHECK-LABEL: name: test_call_external_void_func_byval_struct_i8_i32 3989 ; CHECK: bb.1 (%ir-block.0): 3990 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 3991 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 3992 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 3993 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 3994 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 3995 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 3996 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 3997 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 3998 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 3999 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 4000 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 4001 ; CHECK: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 3 4002 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4003 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.0.val 4004 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4005 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C2]](s32) 4006 ; CHECK: G_STORE [[C]](s8), [[FRAME_INDEX]](p5) :: (store 1 into %ir.gep01, addrspace 5) 4007 ; CHECK: G_STORE [[C1]](s32), [[PTR_ADD]](p5) :: (store 4 into %ir.gep1, addrspace 5) 4008 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 4009 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_byval_struct_i8_i32 4010 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 4011 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 4012 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 4013 ; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 4014 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C3]](s64) 4015 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 4016 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 4017 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 4018 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 4019 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 4020 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 4021 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 4022 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C4]](s32) 4023 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 4024 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 4025 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 4026 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C5]](s32) 4027 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4028 ; CHECK: [[COPY20:%[0-9]+]]:_(p5) = COPY $sp_reg 4029 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 4030 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C6]](s32) 4031 ; CHECK: G_STORE [[FRAME_INDEX]](p5), [[PTR_ADD2]](p5) :: (store 4 into stack, align 16, addrspace 5) 4032 ; CHECK: [[COPY21:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 4033 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY21]](<4 x s32>) 4034 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 4035 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 4036 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD1]](p4) 4037 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 4038 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 4039 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 4040 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 4041 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 4042 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_byval_struct_i8_i32, csr_amdgpu_highregs, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 4043 ; CHECK: ADJCALLSTACKDOWN 0, 8, implicit-def $scc 4044 ; CHECK: S_ENDPGM 0 4045 %val = alloca { i8, i32 }, align 4, addrspace(5) 4046 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %val, i32 0, i32 0 4047 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %val, i32 0, i32 1 4048 store i8 3, i8 addrspace(5)* %gep0 4049 store i32 8, i32 addrspace(5)* %gep1 4050 call void @external_void_func_byval_struct_i8_i32({ i8, i32 } addrspace(5)* byval({ i8, i32 }) %val) 4051 ret void 4052} 4053 4054define amdgpu_kernel void @test_call_external_void_func_v2i8() #0 { 4055 ; CHECK-LABEL: name: test_call_external_void_func_v2i8 4056 ; CHECK: bb.1 (%ir-block.0): 4057 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 4058 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 4059 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 4060 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 4061 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 4062 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 4063 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 4064 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 4065 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 4066 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 4067 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 4068 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 4069 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `<2 x i8> addrspace(1)* addrspace(4)* undef`, addrspace 4) 4070 ; CHECK: [[LOAD1:%[0-9]+]]:_(<2 x s8>) = G_LOAD [[LOAD]](p1) :: (load 2 from %ir.ptr, addrspace 1) 4071 ; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[LOAD1]](<2 x s8>) 4072 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[UV]](s8) 4073 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s16) = G_ANYEXT [[UV1]](s8) 4074 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 4075 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v2i8 4076 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 4077 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 4078 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 4079 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 4080 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 4081 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 4082 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 4083 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 4084 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 4085 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 4086 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 4087 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 4088 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 4089 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 4090 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 4091 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 4092 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 4093 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4094 ; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT]](s16) 4095 ; CHECK: $vgpr0 = COPY [[ANYEXT2]](s32) 4096 ; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT1]](s16) 4097 ; CHECK: $vgpr1 = COPY [[ANYEXT3]](s32) 4098 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 4099 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 4100 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 4101 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 4102 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 4103 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 4104 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 4105 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 4106 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 4107 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 4108 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v2i8, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 4109 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 4110 ; CHECK: S_ENDPGM 0 4111 %ptr = load <2 x i8> addrspace(1)*, <2 x i8> addrspace(1)* addrspace(4)* undef 4112 %val = load <2 x i8>, <2 x i8> addrspace(1)* %ptr 4113 call void @external_void_func_v2i8(<2 x i8> %val) 4114 ret void 4115} 4116 4117define amdgpu_kernel void @test_call_external_void_func_v3i8() #0 { 4118 ; CHECK-LABEL: name: test_call_external_void_func_v3i8 4119 ; CHECK: bb.1 (%ir-block.0): 4120 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 4121 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 4122 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 4123 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 4124 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 4125 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 4126 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 4127 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 4128 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 4129 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 4130 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 4131 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 4132 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `<3 x i8> addrspace(1)* addrspace(4)* undef`, addrspace 4) 4133 ; CHECK: [[LOAD1:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[LOAD]](p1) :: (load 3 from %ir.ptr, align 4, addrspace 1) 4134 ; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[LOAD1]](<3 x s8>) 4135 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[UV]](s8) 4136 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s16) = G_ANYEXT [[UV1]](s8) 4137 ; CHECK: [[ANYEXT2:%[0-9]+]]:_(s16) = G_ANYEXT [[UV2]](s8) 4138 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 4139 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v3i8 4140 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 4141 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 4142 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 4143 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 4144 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 4145 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 4146 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 4147 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 4148 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 4149 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 4150 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 4151 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 4152 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 4153 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 4154 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 4155 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 4156 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 4157 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4158 ; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT]](s16) 4159 ; CHECK: $vgpr0 = COPY [[ANYEXT3]](s32) 4160 ; CHECK: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT1]](s16) 4161 ; CHECK: $vgpr1 = COPY [[ANYEXT4]](s32) 4162 ; CHECK: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT2]](s16) 4163 ; CHECK: $vgpr2 = COPY [[ANYEXT5]](s32) 4164 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 4165 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 4166 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 4167 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 4168 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 4169 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 4170 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 4171 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 4172 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 4173 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 4174 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v3i8, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 4175 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 4176 ; CHECK: S_ENDPGM 0 4177 %ptr = load <3 x i8> addrspace(1)*, <3 x i8> addrspace(1)* addrspace(4)* undef 4178 %val = load <3 x i8>, <3 x i8> addrspace(1)* %ptr 4179 call void @external_void_func_v3i8(<3 x i8> %val) 4180 ret void 4181} 4182 4183define amdgpu_kernel void @test_call_external_void_func_v4i8() #0 { 4184 ; CHECK-LABEL: name: test_call_external_void_func_v4i8 4185 ; CHECK: bb.1 (%ir-block.0): 4186 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 4187 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 4188 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 4189 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 4190 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 4191 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 4192 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 4193 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 4194 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 4195 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 4196 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 4197 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 4198 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `<4 x i8> addrspace(1)* addrspace(4)* undef`, addrspace 4) 4199 ; CHECK: [[LOAD1:%[0-9]+]]:_(<4 x s8>) = G_LOAD [[LOAD]](p1) :: (load 4 from %ir.ptr, addrspace 1) 4200 ; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[LOAD1]](<4 x s8>) 4201 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[UV]](s8) 4202 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s16) = G_ANYEXT [[UV1]](s8) 4203 ; CHECK: [[ANYEXT2:%[0-9]+]]:_(s16) = G_ANYEXT [[UV2]](s8) 4204 ; CHECK: [[ANYEXT3:%[0-9]+]]:_(s16) = G_ANYEXT [[UV3]](s8) 4205 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 4206 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v4i8 4207 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 4208 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 4209 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 4210 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 4211 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 4212 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 4213 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 4214 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 4215 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 4216 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 4217 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 4218 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 4219 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 4220 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 4221 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 4222 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 4223 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 4224 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4225 ; CHECK: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT]](s16) 4226 ; CHECK: $vgpr0 = COPY [[ANYEXT4]](s32) 4227 ; CHECK: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT1]](s16) 4228 ; CHECK: $vgpr1 = COPY [[ANYEXT5]](s32) 4229 ; CHECK: [[ANYEXT6:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT2]](s16) 4230 ; CHECK: $vgpr2 = COPY [[ANYEXT6]](s32) 4231 ; CHECK: [[ANYEXT7:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT3]](s16) 4232 ; CHECK: $vgpr3 = COPY [[ANYEXT7]](s32) 4233 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 4234 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 4235 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 4236 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 4237 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 4238 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 4239 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 4240 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 4241 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 4242 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 4243 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v4i8, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 4244 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 4245 ; CHECK: S_ENDPGM 0 4246 %ptr = load <4 x i8> addrspace(1)*, <4 x i8> addrspace(1)* addrspace(4)* undef 4247 %val = load <4 x i8>, <4 x i8> addrspace(1)* %ptr 4248 call void @external_void_func_v4i8(<4 x i8> %val) 4249 ret void 4250} 4251 4252define amdgpu_kernel void @test_call_external_void_func_v8i8() #0 { 4253 ; CHECK-LABEL: name: test_call_external_void_func_v8i8 4254 ; CHECK: bb.1 (%ir-block.0): 4255 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 4256 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 4257 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 4258 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 4259 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 4260 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 4261 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 4262 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 4263 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 4264 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 4265 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 4266 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 4267 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `<8 x i8> addrspace(1)* addrspace(4)* undef`, addrspace 4) 4268 ; CHECK: [[LOAD1:%[0-9]+]]:_(<8 x s8>) = G_LOAD [[LOAD]](p1) :: (load 8 from %ir.ptr, addrspace 1) 4269 ; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [[UV7:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[LOAD1]](<8 x s8>) 4270 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[UV]](s8) 4271 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s16) = G_ANYEXT [[UV1]](s8) 4272 ; CHECK: [[ANYEXT2:%[0-9]+]]:_(s16) = G_ANYEXT [[UV2]](s8) 4273 ; CHECK: [[ANYEXT3:%[0-9]+]]:_(s16) = G_ANYEXT [[UV3]](s8) 4274 ; CHECK: [[ANYEXT4:%[0-9]+]]:_(s16) = G_ANYEXT [[UV4]](s8) 4275 ; CHECK: [[ANYEXT5:%[0-9]+]]:_(s16) = G_ANYEXT [[UV5]](s8) 4276 ; CHECK: [[ANYEXT6:%[0-9]+]]:_(s16) = G_ANYEXT [[UV6]](s8) 4277 ; CHECK: [[ANYEXT7:%[0-9]+]]:_(s16) = G_ANYEXT [[UV7]](s8) 4278 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 4279 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v8i8 4280 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 4281 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 4282 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 4283 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 4284 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 4285 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 4286 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 4287 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 4288 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 4289 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 4290 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 4291 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 4292 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 4293 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 4294 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 4295 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 4296 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 4297 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4298 ; CHECK: [[ANYEXT8:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT]](s16) 4299 ; CHECK: $vgpr0 = COPY [[ANYEXT8]](s32) 4300 ; CHECK: [[ANYEXT9:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT1]](s16) 4301 ; CHECK: $vgpr1 = COPY [[ANYEXT9]](s32) 4302 ; CHECK: [[ANYEXT10:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT2]](s16) 4303 ; CHECK: $vgpr2 = COPY [[ANYEXT10]](s32) 4304 ; CHECK: [[ANYEXT11:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT3]](s16) 4305 ; CHECK: $vgpr3 = COPY [[ANYEXT11]](s32) 4306 ; CHECK: [[ANYEXT12:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT4]](s16) 4307 ; CHECK: $vgpr4 = COPY [[ANYEXT12]](s32) 4308 ; CHECK: [[ANYEXT13:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT5]](s16) 4309 ; CHECK: $vgpr5 = COPY [[ANYEXT13]](s32) 4310 ; CHECK: [[ANYEXT14:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT6]](s16) 4311 ; CHECK: $vgpr6 = COPY [[ANYEXT14]](s32) 4312 ; CHECK: [[ANYEXT15:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT7]](s16) 4313 ; CHECK: $vgpr7 = COPY [[ANYEXT15]](s32) 4314 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 4315 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 4316 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 4317 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 4318 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 4319 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 4320 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 4321 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 4322 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 4323 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 4324 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v8i8, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 4325 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 4326 ; CHECK: S_ENDPGM 0 4327 %ptr = load <8 x i8> addrspace(1)*, <8 x i8> addrspace(1)* addrspace(4)* undef 4328 %val = load <8 x i8>, <8 x i8> addrspace(1)* %ptr 4329 call void @external_void_func_v8i8(<8 x i8> %val) 4330 ret void 4331} 4332 4333define amdgpu_kernel void @test_call_external_void_func_v16i8() #0 { 4334 ; CHECK-LABEL: name: test_call_external_void_func_v16i8 4335 ; CHECK: bb.1 (%ir-block.0): 4336 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 4337 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 4338 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 4339 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 4340 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 4341 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 4342 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 4343 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 4344 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 4345 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 4346 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 4347 ; CHECK: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF 4348 ; CHECK: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (load 8 from `<16 x i8> addrspace(1)* addrspace(4)* undef`, addrspace 4) 4349 ; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s8>) = G_LOAD [[LOAD]](p1) :: (load 16 from %ir.ptr, addrspace 1) 4350 ; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [[UV7:%[0-9]+]]:_(s8), [[UV8:%[0-9]+]]:_(s8), [[UV9:%[0-9]+]]:_(s8), [[UV10:%[0-9]+]]:_(s8), [[UV11:%[0-9]+]]:_(s8), [[UV12:%[0-9]+]]:_(s8), [[UV13:%[0-9]+]]:_(s8), [[UV14:%[0-9]+]]:_(s8), [[UV15:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[LOAD1]](<16 x s8>) 4351 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[UV]](s8) 4352 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s16) = G_ANYEXT [[UV1]](s8) 4353 ; CHECK: [[ANYEXT2:%[0-9]+]]:_(s16) = G_ANYEXT [[UV2]](s8) 4354 ; CHECK: [[ANYEXT3:%[0-9]+]]:_(s16) = G_ANYEXT [[UV3]](s8) 4355 ; CHECK: [[ANYEXT4:%[0-9]+]]:_(s16) = G_ANYEXT [[UV4]](s8) 4356 ; CHECK: [[ANYEXT5:%[0-9]+]]:_(s16) = G_ANYEXT [[UV5]](s8) 4357 ; CHECK: [[ANYEXT6:%[0-9]+]]:_(s16) = G_ANYEXT [[UV6]](s8) 4358 ; CHECK: [[ANYEXT7:%[0-9]+]]:_(s16) = G_ANYEXT [[UV7]](s8) 4359 ; CHECK: [[ANYEXT8:%[0-9]+]]:_(s16) = G_ANYEXT [[UV8]](s8) 4360 ; CHECK: [[ANYEXT9:%[0-9]+]]:_(s16) = G_ANYEXT [[UV9]](s8) 4361 ; CHECK: [[ANYEXT10:%[0-9]+]]:_(s16) = G_ANYEXT [[UV10]](s8) 4362 ; CHECK: [[ANYEXT11:%[0-9]+]]:_(s16) = G_ANYEXT [[UV11]](s8) 4363 ; CHECK: [[ANYEXT12:%[0-9]+]]:_(s16) = G_ANYEXT [[UV12]](s8) 4364 ; CHECK: [[ANYEXT13:%[0-9]+]]:_(s16) = G_ANYEXT [[UV13]](s8) 4365 ; CHECK: [[ANYEXT14:%[0-9]+]]:_(s16) = G_ANYEXT [[UV14]](s8) 4366 ; CHECK: [[ANYEXT15:%[0-9]+]]:_(s16) = G_ANYEXT [[UV15]](s8) 4367 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 4368 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_v16i8 4369 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 4370 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 4371 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 4372 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 4373 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) 4374 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 4375 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 4376 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 4377 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 4378 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 4379 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 4380 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 4381 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) 4382 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 4383 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 4384 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 4385 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) 4386 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4387 ; CHECK: [[ANYEXT16:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT]](s16) 4388 ; CHECK: $vgpr0 = COPY [[ANYEXT16]](s32) 4389 ; CHECK: [[ANYEXT17:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT1]](s16) 4390 ; CHECK: $vgpr1 = COPY [[ANYEXT17]](s32) 4391 ; CHECK: [[ANYEXT18:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT2]](s16) 4392 ; CHECK: $vgpr2 = COPY [[ANYEXT18]](s32) 4393 ; CHECK: [[ANYEXT19:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT3]](s16) 4394 ; CHECK: $vgpr3 = COPY [[ANYEXT19]](s32) 4395 ; CHECK: [[ANYEXT20:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT4]](s16) 4396 ; CHECK: $vgpr4 = COPY [[ANYEXT20]](s32) 4397 ; CHECK: [[ANYEXT21:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT5]](s16) 4398 ; CHECK: $vgpr5 = COPY [[ANYEXT21]](s32) 4399 ; CHECK: [[ANYEXT22:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT6]](s16) 4400 ; CHECK: $vgpr6 = COPY [[ANYEXT22]](s32) 4401 ; CHECK: [[ANYEXT23:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT7]](s16) 4402 ; CHECK: $vgpr7 = COPY [[ANYEXT23]](s32) 4403 ; CHECK: [[ANYEXT24:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT8]](s16) 4404 ; CHECK: $vgpr8 = COPY [[ANYEXT24]](s32) 4405 ; CHECK: [[ANYEXT25:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT9]](s16) 4406 ; CHECK: $vgpr9 = COPY [[ANYEXT25]](s32) 4407 ; CHECK: [[ANYEXT26:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT10]](s16) 4408 ; CHECK: $vgpr10 = COPY [[ANYEXT26]](s32) 4409 ; CHECK: [[ANYEXT27:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT11]](s16) 4410 ; CHECK: $vgpr11 = COPY [[ANYEXT27]](s32) 4411 ; CHECK: [[ANYEXT28:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT12]](s16) 4412 ; CHECK: $vgpr12 = COPY [[ANYEXT28]](s32) 4413 ; CHECK: [[ANYEXT29:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT13]](s16) 4414 ; CHECK: $vgpr13 = COPY [[ANYEXT29]](s32) 4415 ; CHECK: [[ANYEXT30:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT14]](s16) 4416 ; CHECK: $vgpr14 = COPY [[ANYEXT30]](s32) 4417 ; CHECK: [[ANYEXT31:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT15]](s16) 4418 ; CHECK: $vgpr15 = COPY [[ANYEXT31]](s32) 4419 ; CHECK: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 4420 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) 4421 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 4422 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 4423 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) 4424 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 4425 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 4426 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 4427 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 4428 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 4429 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_v16i8, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 4430 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $scc 4431 ; CHECK: S_ENDPGM 0 4432 %ptr = load <16 x i8> addrspace(1)*, <16 x i8> addrspace(1)* addrspace(4)* undef 4433 %val = load <16 x i8>, <16 x i8> addrspace(1)* %ptr 4434 call void @external_void_func_v16i8(<16 x i8> %val) 4435 ret void 4436} 4437 4438define amdgpu_kernel void @stack_passed_arg_alignment_v32i32_f64(<32 x i32> %val, double %tmp) #0 { 4439 ; CHECK-LABEL: name: stack_passed_arg_alignment_v32i32_f64 4440 ; CHECK: bb.1.entry: 4441 ; CHECK: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 4442 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 4443 ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 4444 ; CHECK: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 4445 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 4446 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 4447 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 4448 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 4449 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 4450 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 4451 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 4452 ; CHECK: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) 4453 ; CHECK: [[LOAD:%[0-9]+]]:_(<32 x s32>) = G_LOAD [[INT]](p4) :: (dereferenceable invariant load 128 from %ir.val.kernarg.offset.cast, align 16, addrspace 4) 4454 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 128 4455 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[INT]], [[C]](s64) 4456 ; CHECK: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p4) :: (dereferenceable invariant load 8 from %ir.tmp.kernarg.offset.cast, align 16, addrspace 4) 4457 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<32 x s32>) 4458 ; CHECK: [[UV32:%[0-9]+]]:_(s32), [[UV33:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](s64) 4459 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 4460 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @stack_passed_f64_arg 4461 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] 4462 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] 4463 ; CHECK: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) 4464 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 136 4465 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C1]](s64) 4466 ; CHECK: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] 4467 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] 4468 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] 4469 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] 4470 ; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 4471 ; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 4472 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 4473 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C2]](s32) 4474 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] 4475 ; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 4476 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 4477 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C3]](s32) 4478 ; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4479 ; CHECK: $vgpr0 = COPY [[UV]](s32) 4480 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 4481 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 4482 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 4483 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 4484 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 4485 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 4486 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 4487 ; CHECK: $vgpr8 = COPY [[UV8]](s32) 4488 ; CHECK: $vgpr9 = COPY [[UV9]](s32) 4489 ; CHECK: $vgpr10 = COPY [[UV10]](s32) 4490 ; CHECK: $vgpr11 = COPY [[UV11]](s32) 4491 ; CHECK: $vgpr12 = COPY [[UV12]](s32) 4492 ; CHECK: $vgpr13 = COPY [[UV13]](s32) 4493 ; CHECK: $vgpr14 = COPY [[UV14]](s32) 4494 ; CHECK: $vgpr15 = COPY [[UV15]](s32) 4495 ; CHECK: $vgpr16 = COPY [[UV16]](s32) 4496 ; CHECK: $vgpr17 = COPY [[UV17]](s32) 4497 ; CHECK: $vgpr18 = COPY [[UV18]](s32) 4498 ; CHECK: $vgpr19 = COPY [[UV19]](s32) 4499 ; CHECK: $vgpr20 = COPY [[UV20]](s32) 4500 ; CHECK: $vgpr21 = COPY [[UV21]](s32) 4501 ; CHECK: $vgpr22 = COPY [[UV22]](s32) 4502 ; CHECK: $vgpr23 = COPY [[UV23]](s32) 4503 ; CHECK: $vgpr24 = COPY [[UV24]](s32) 4504 ; CHECK: $vgpr25 = COPY [[UV25]](s32) 4505 ; CHECK: $vgpr26 = COPY [[UV26]](s32) 4506 ; CHECK: $vgpr27 = COPY [[UV27]](s32) 4507 ; CHECK: $vgpr28 = COPY [[UV28]](s32) 4508 ; CHECK: $vgpr29 = COPY [[UV29]](s32) 4509 ; CHECK: $vgpr30 = COPY [[UV30]](s32) 4510 ; CHECK: [[COPY20:%[0-9]+]]:_(p5) = COPY $sp_reg 4511 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 4512 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C4]](s32) 4513 ; CHECK: G_STORE [[UV31]](s32), [[PTR_ADD2]](p5) :: (store 4 into stack, align 16, addrspace 5) 4514 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4515 ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C5]](s32) 4516 ; CHECK: G_STORE [[UV32]](s32), [[PTR_ADD3]](p5) :: (store 4 into stack + 4, addrspace 5) 4517 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4518 ; CHECK: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY20]], [[C6]](s32) 4519 ; CHECK: G_STORE [[UV33]](s32), [[PTR_ADD4]](p5) :: (store 4 into stack + 8, align 8, addrspace 5) 4520 ; CHECK: [[COPY21:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg 4521 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY21]](<4 x s32>) 4522 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY10]](p4) 4523 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY11]](p4) 4524 ; CHECK: $sgpr8_sgpr9 = COPY [[PTR_ADD1]](p4) 4525 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY13]](s64) 4526 ; CHECK: $sgpr12 = COPY [[COPY14]](s32) 4527 ; CHECK: $sgpr13 = COPY [[COPY15]](s32) 4528 ; CHECK: $sgpr14 = COPY [[COPY16]](s32) 4529 ; CHECK: $vgpr31 = COPY [[OR1]](s32) 4530 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @stack_passed_f64_arg, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 4531 ; CHECK: ADJCALLSTACKDOWN 0, 12, implicit-def $scc 4532 ; CHECK: S_ENDPGM 0 4533entry: 4534 call void @stack_passed_f64_arg(<32 x i32> %val, double %tmp) 4535 ret void 4536} 4537 4538define void @stack_12xv3i32() #0 { 4539 ; CHECK-LABEL: name: stack_12xv3i32 4540 ; CHECK: bb.1.entry: 4541 ; CHECK: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 4542 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 4543 ; CHECK: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 4544 ; CHECK: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 4545 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 4546 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 4547 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 4548 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 4549 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 4550 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 4551 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 4552 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32) 4553 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4554 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32), [[C1]](s32) 4555 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4556 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C2]](s32), [[C2]](s32), [[C2]](s32) 4557 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4558 ; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C3]](s32), [[C3]](s32), [[C3]](s32) 4559 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4560 ; CHECK: [[BUILD_VECTOR4:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C4]](s32), [[C4]](s32), [[C4]](s32) 4561 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 4562 ; CHECK: [[BUILD_VECTOR5:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C5]](s32), [[C5]](s32), [[C5]](s32) 4563 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 4564 ; CHECK: [[BUILD_VECTOR6:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C6]](s32), [[C6]](s32), [[C6]](s32) 4565 ; CHECK: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 4566 ; CHECK: [[BUILD_VECTOR7:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C7]](s32), [[C7]](s32), [[C7]](s32) 4567 ; CHECK: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4568 ; CHECK: [[BUILD_VECTOR8:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C8]](s32), [[C8]](s32), [[C8]](s32) 4569 ; CHECK: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 9 4570 ; CHECK: [[BUILD_VECTOR9:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C9]](s32), [[C9]](s32), [[C9]](s32) 4571 ; CHECK: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 4572 ; CHECK: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 11 4573 ; CHECK: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 4574 ; CHECK: [[BUILD_VECTOR10:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C10]](s32), [[C11]](s32), [[C12]](s32) 4575 ; CHECK: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 13 4576 ; CHECK: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 14 4577 ; CHECK: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 15 4578 ; CHECK: [[BUILD_VECTOR11:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C13]](s32), [[C14]](s32), [[C15]](s32) 4579 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<3 x s32>) 4580 ; CHECK: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR1]](<3 x s32>) 4581 ; CHECK: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR2]](<3 x s32>) 4582 ; CHECK: [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR3]](<3 x s32>) 4583 ; CHECK: [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR4]](<3 x s32>) 4584 ; CHECK: [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR5]](<3 x s32>) 4585 ; CHECK: [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR6]](<3 x s32>) 4586 ; CHECK: [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR7]](<3 x s32>) 4587 ; CHECK: [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR8]](<3 x s32>) 4588 ; CHECK: [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR9]](<3 x s32>) 4589 ; CHECK: [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32), [[UV32:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR10]](<3 x s32>) 4590 ; CHECK: [[UV33:%[0-9]+]]:_(s32), [[UV34:%[0-9]+]]:_(s32), [[UV35:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR11]](<3 x s32>) 4591 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 4592 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_12xv3i32 4593 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY [[COPY7]] 4594 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY6]] 4595 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY5]] 4596 ; CHECK: [[COPY12:%[0-9]+]]:_(s64) = COPY [[COPY4]] 4597 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[COPY3]] 4598 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY2]] 4599 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY1]] 4600 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 4601 ; CHECK: $vgpr0 = COPY [[UV]](s32) 4602 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 4603 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 4604 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 4605 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 4606 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 4607 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 4608 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 4609 ; CHECK: $vgpr8 = COPY [[UV8]](s32) 4610 ; CHECK: $vgpr9 = COPY [[UV9]](s32) 4611 ; CHECK: $vgpr10 = COPY [[UV10]](s32) 4612 ; CHECK: $vgpr11 = COPY [[UV11]](s32) 4613 ; CHECK: $vgpr12 = COPY [[UV12]](s32) 4614 ; CHECK: $vgpr13 = COPY [[UV13]](s32) 4615 ; CHECK: $vgpr14 = COPY [[UV14]](s32) 4616 ; CHECK: $vgpr15 = COPY [[UV15]](s32) 4617 ; CHECK: $vgpr16 = COPY [[UV16]](s32) 4618 ; CHECK: $vgpr17 = COPY [[UV17]](s32) 4619 ; CHECK: $vgpr18 = COPY [[UV18]](s32) 4620 ; CHECK: $vgpr19 = COPY [[UV19]](s32) 4621 ; CHECK: $vgpr20 = COPY [[UV20]](s32) 4622 ; CHECK: $vgpr21 = COPY [[UV21]](s32) 4623 ; CHECK: $vgpr22 = COPY [[UV22]](s32) 4624 ; CHECK: $vgpr23 = COPY [[UV23]](s32) 4625 ; CHECK: $vgpr24 = COPY [[UV24]](s32) 4626 ; CHECK: $vgpr25 = COPY [[UV25]](s32) 4627 ; CHECK: $vgpr26 = COPY [[UV26]](s32) 4628 ; CHECK: $vgpr27 = COPY [[UV27]](s32) 4629 ; CHECK: $vgpr28 = COPY [[UV28]](s32) 4630 ; CHECK: $vgpr29 = COPY [[UV29]](s32) 4631 ; CHECK: $vgpr30 = COPY [[UV30]](s32) 4632 ; CHECK: [[COPY17:%[0-9]+]]:_(p5) = COPY $sgpr32 4633 ; CHECK: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 4634 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C16]](s32) 4635 ; CHECK: G_STORE [[UV31]](s32), [[PTR_ADD]](p5) :: (store 4 into stack, align 16, addrspace 5) 4636 ; CHECK: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4637 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C17]](s32) 4638 ; CHECK: G_STORE [[UV32]](s32), [[PTR_ADD1]](p5) :: (store 4 into stack + 4, addrspace 5) 4639 ; CHECK: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4640 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C18]](s32) 4641 ; CHECK: G_STORE [[UV33]](s32), [[PTR_ADD2]](p5) :: (store 4 into stack + 8, align 8, addrspace 5) 4642 ; CHECK: [[C19:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 4643 ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C19]](s32) 4644 ; CHECK: G_STORE [[UV34]](s32), [[PTR_ADD3]](p5) :: (store 4 into stack + 12, addrspace 5) 4645 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4646 ; CHECK: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C20]](s32) 4647 ; CHECK: G_STORE [[UV35]](s32), [[PTR_ADD4]](p5) :: (store 4 into stack + 16, align 16, addrspace 5) 4648 ; CHECK: [[COPY18:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 4649 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY18]](<4 x s32>) 4650 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY9]](p4) 4651 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY10]](p4) 4652 ; CHECK: $sgpr8_sgpr9 = COPY [[COPY11]](p4) 4653 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY12]](s64) 4654 ; CHECK: $sgpr12 = COPY [[COPY13]](s32) 4655 ; CHECK: $sgpr13 = COPY [[COPY14]](s32) 4656 ; CHECK: $sgpr14 = COPY [[COPY15]](s32) 4657 ; CHECK: $vgpr31 = COPY [[COPY16]](s32) 4658 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_12xv3i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 4659 ; CHECK: ADJCALLSTACKDOWN 0, 20, implicit-def $scc 4660 ; CHECK: [[COPY19:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]] 4661 ; CHECK: S_SETPC_B64_return [[COPY19]] 4662entry: 4663 call void @external_void_func_12xv3i32( 4664 <3 x i32> <i32 0, i32 0, i32 0>, 4665 <3 x i32> <i32 1, i32 1, i32 1>, 4666 <3 x i32> <i32 2, i32 2, i32 2>, 4667 <3 x i32> <i32 3, i32 3, i32 3>, 4668 <3 x i32> <i32 4, i32 4, i32 4>, 4669 <3 x i32> <i32 5, i32 5, i32 5>, 4670 <3 x i32> <i32 6, i32 6, i32 6>, 4671 <3 x i32> <i32 7, i32 7, i32 7>, 4672 <3 x i32> <i32 8, i32 8, i32 8>, 4673 <3 x i32> <i32 9, i32 9, i32 9>, 4674 <3 x i32> <i32 10, i32 11, i32 12>, 4675 <3 x i32> <i32 13, i32 14, i32 15>) 4676 ret void 4677} 4678 4679define void @stack_12xv3f32() #0 { 4680 ; CHECK-LABEL: name: stack_12xv3f32 4681 ; CHECK: bb.1.entry: 4682 ; CHECK: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 4683 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 4684 ; CHECK: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 4685 ; CHECK: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 4686 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 4687 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 4688 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 4689 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 4690 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 4691 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 4692 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00 4693 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32) 4694 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00 4695 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32), [[C1]](s32) 4696 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.000000e+00 4697 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C2]](s32), [[C2]](s32), [[C2]](s32) 4698 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_FCONSTANT float 3.000000e+00 4699 ; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C3]](s32), [[C3]](s32), [[C3]](s32) 4700 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_FCONSTANT float 4.000000e+00 4701 ; CHECK: [[BUILD_VECTOR4:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C4]](s32), [[C4]](s32), [[C4]](s32) 4702 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_FCONSTANT float 5.000000e+00 4703 ; CHECK: [[BUILD_VECTOR5:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C5]](s32), [[C5]](s32), [[C5]](s32) 4704 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_FCONSTANT float 6.000000e+00 4705 ; CHECK: [[BUILD_VECTOR6:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C6]](s32), [[C6]](s32), [[C6]](s32) 4706 ; CHECK: [[C7:%[0-9]+]]:_(s32) = G_FCONSTANT float 7.000000e+00 4707 ; CHECK: [[BUILD_VECTOR7:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C7]](s32), [[C7]](s32), [[C7]](s32) 4708 ; CHECK: [[C8:%[0-9]+]]:_(s32) = G_FCONSTANT float 8.000000e+00 4709 ; CHECK: [[BUILD_VECTOR8:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C8]](s32), [[C8]](s32), [[C8]](s32) 4710 ; CHECK: [[C9:%[0-9]+]]:_(s32) = G_FCONSTANT float 9.000000e+00 4711 ; CHECK: [[BUILD_VECTOR9:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C9]](s32), [[C9]](s32), [[C9]](s32) 4712 ; CHECK: [[C10:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+01 4713 ; CHECK: [[C11:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.100000e+01 4714 ; CHECK: [[C12:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.200000e+01 4715 ; CHECK: [[BUILD_VECTOR10:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C10]](s32), [[C11]](s32), [[C12]](s32) 4716 ; CHECK: [[C13:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.300000e+01 4717 ; CHECK: [[C14:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.400000e+01 4718 ; CHECK: [[C15:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.500000e+01 4719 ; CHECK: [[BUILD_VECTOR11:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C13]](s32), [[C14]](s32), [[C15]](s32) 4720 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<3 x s32>) 4721 ; CHECK: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR1]](<3 x s32>) 4722 ; CHECK: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR2]](<3 x s32>) 4723 ; CHECK: [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR3]](<3 x s32>) 4724 ; CHECK: [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR4]](<3 x s32>) 4725 ; CHECK: [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR5]](<3 x s32>) 4726 ; CHECK: [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR6]](<3 x s32>) 4727 ; CHECK: [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR7]](<3 x s32>) 4728 ; CHECK: [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR8]](<3 x s32>) 4729 ; CHECK: [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR9]](<3 x s32>) 4730 ; CHECK: [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32), [[UV32:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR10]](<3 x s32>) 4731 ; CHECK: [[UV33:%[0-9]+]]:_(s32), [[UV34:%[0-9]+]]:_(s32), [[UV35:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR11]](<3 x s32>) 4732 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 4733 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_12xv3f32 4734 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY [[COPY7]] 4735 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY6]] 4736 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY5]] 4737 ; CHECK: [[COPY12:%[0-9]+]]:_(s64) = COPY [[COPY4]] 4738 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[COPY3]] 4739 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY2]] 4740 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY1]] 4741 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 4742 ; CHECK: $vgpr0 = COPY [[UV]](s32) 4743 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 4744 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 4745 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 4746 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 4747 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 4748 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 4749 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 4750 ; CHECK: $vgpr8 = COPY [[UV8]](s32) 4751 ; CHECK: $vgpr9 = COPY [[UV9]](s32) 4752 ; CHECK: $vgpr10 = COPY [[UV10]](s32) 4753 ; CHECK: $vgpr11 = COPY [[UV11]](s32) 4754 ; CHECK: $vgpr12 = COPY [[UV12]](s32) 4755 ; CHECK: $vgpr13 = COPY [[UV13]](s32) 4756 ; CHECK: $vgpr14 = COPY [[UV14]](s32) 4757 ; CHECK: $vgpr15 = COPY [[UV15]](s32) 4758 ; CHECK: $vgpr16 = COPY [[UV16]](s32) 4759 ; CHECK: $vgpr17 = COPY [[UV17]](s32) 4760 ; CHECK: $vgpr18 = COPY [[UV18]](s32) 4761 ; CHECK: $vgpr19 = COPY [[UV19]](s32) 4762 ; CHECK: $vgpr20 = COPY [[UV20]](s32) 4763 ; CHECK: $vgpr21 = COPY [[UV21]](s32) 4764 ; CHECK: $vgpr22 = COPY [[UV22]](s32) 4765 ; CHECK: $vgpr23 = COPY [[UV23]](s32) 4766 ; CHECK: $vgpr24 = COPY [[UV24]](s32) 4767 ; CHECK: $vgpr25 = COPY [[UV25]](s32) 4768 ; CHECK: $vgpr26 = COPY [[UV26]](s32) 4769 ; CHECK: $vgpr27 = COPY [[UV27]](s32) 4770 ; CHECK: $vgpr28 = COPY [[UV28]](s32) 4771 ; CHECK: $vgpr29 = COPY [[UV29]](s32) 4772 ; CHECK: $vgpr30 = COPY [[UV30]](s32) 4773 ; CHECK: [[COPY17:%[0-9]+]]:_(p5) = COPY $sgpr32 4774 ; CHECK: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 4775 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C16]](s32) 4776 ; CHECK: G_STORE [[UV31]](s32), [[PTR_ADD]](p5) :: (store 4 into stack, align 16, addrspace 5) 4777 ; CHECK: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4778 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C17]](s32) 4779 ; CHECK: G_STORE [[UV32]](s32), [[PTR_ADD1]](p5) :: (store 4 into stack + 4, addrspace 5) 4780 ; CHECK: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4781 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C18]](s32) 4782 ; CHECK: G_STORE [[UV33]](s32), [[PTR_ADD2]](p5) :: (store 4 into stack + 8, align 8, addrspace 5) 4783 ; CHECK: [[C19:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 4784 ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C19]](s32) 4785 ; CHECK: G_STORE [[UV34]](s32), [[PTR_ADD3]](p5) :: (store 4 into stack + 12, addrspace 5) 4786 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4787 ; CHECK: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C20]](s32) 4788 ; CHECK: G_STORE [[UV35]](s32), [[PTR_ADD4]](p5) :: (store 4 into stack + 16, align 16, addrspace 5) 4789 ; CHECK: [[COPY18:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 4790 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY18]](<4 x s32>) 4791 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY9]](p4) 4792 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY10]](p4) 4793 ; CHECK: $sgpr8_sgpr9 = COPY [[COPY11]](p4) 4794 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY12]](s64) 4795 ; CHECK: $sgpr12 = COPY [[COPY13]](s32) 4796 ; CHECK: $sgpr13 = COPY [[COPY14]](s32) 4797 ; CHECK: $sgpr14 = COPY [[COPY15]](s32) 4798 ; CHECK: $vgpr31 = COPY [[COPY16]](s32) 4799 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_12xv3f32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 4800 ; CHECK: ADJCALLSTACKDOWN 0, 20, implicit-def $scc 4801 ; CHECK: [[COPY19:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]] 4802 ; CHECK: S_SETPC_B64_return [[COPY19]] 4803entry: 4804 call void @external_void_func_12xv3f32( 4805 <3 x float> <float 0.0, float 0.0, float 0.0>, 4806 <3 x float> <float 1.0, float 1.0, float 1.0>, 4807 <3 x float> <float 2.0, float 2.0, float 2.0>, 4808 <3 x float> <float 3.0, float 3.0, float 3.0>, 4809 <3 x float> <float 4.0, float 4.0, float 4.0>, 4810 <3 x float> <float 5.0, float 5.0, float 5.0>, 4811 <3 x float> <float 6.0, float 6.0, float 6.0>, 4812 <3 x float> <float 7.0, float 7.0, float 7.0>, 4813 <3 x float> <float 8.0, float 8.0, float 8.0>, 4814 <3 x float> <float 9.0, float 9.0, float 9.0>, 4815 <3 x float> <float 10.0, float 11.0, float 12.0>, 4816 <3 x float> <float 13.0, float 14.0, float 15.0>) 4817 ret void 4818} 4819 4820define void @stack_8xv5i32() #0 { 4821 ; CHECK-LABEL: name: stack_8xv5i32 4822 ; CHECK: bb.1.entry: 4823 ; CHECK: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 4824 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 4825 ; CHECK: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 4826 ; CHECK: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 4827 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 4828 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 4829 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 4830 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 4831 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 4832 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 4833 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 4834 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32) 4835 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4836 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32), [[C1]](s32), [[C1]](s32), [[C1]](s32) 4837 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4838 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C2]](s32), [[C2]](s32), [[C2]](s32), [[C2]](s32), [[C2]](s32) 4839 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4840 ; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C3]](s32), [[C3]](s32), [[C3]](s32), [[C3]](s32), [[C3]](s32) 4841 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4842 ; CHECK: [[BUILD_VECTOR4:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C4]](s32), [[C4]](s32), [[C4]](s32), [[C4]](s32), [[C4]](s32) 4843 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 4844 ; CHECK: [[BUILD_VECTOR5:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C5]](s32), [[C5]](s32), [[C5]](s32), [[C5]](s32), [[C5]](s32) 4845 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 6 4846 ; CHECK: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 7 4847 ; CHECK: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4848 ; CHECK: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 9 4849 ; CHECK: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 4850 ; CHECK: [[BUILD_VECTOR6:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C6]](s32), [[C7]](s32), [[C8]](s32), [[C9]](s32), [[C10]](s32) 4851 ; CHECK: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 11 4852 ; CHECK: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 4853 ; CHECK: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 13 4854 ; CHECK: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 14 4855 ; CHECK: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 15 4856 ; CHECK: [[BUILD_VECTOR7:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C11]](s32), [[C12]](s32), [[C13]](s32), [[C14]](s32), [[C15]](s32) 4857 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<5 x s32>) 4858 ; CHECK: [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR1]](<5 x s32>) 4859 ; CHECK: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR2]](<5 x s32>) 4860 ; CHECK: [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR3]](<5 x s32>) 4861 ; CHECK: [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR4]](<5 x s32>) 4862 ; CHECK: [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR5]](<5 x s32>) 4863 ; CHECK: [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32), [[UV32:%[0-9]+]]:_(s32), [[UV33:%[0-9]+]]:_(s32), [[UV34:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR6]](<5 x s32>) 4864 ; CHECK: [[UV35:%[0-9]+]]:_(s32), [[UV36:%[0-9]+]]:_(s32), [[UV37:%[0-9]+]]:_(s32), [[UV38:%[0-9]+]]:_(s32), [[UV39:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR7]](<5 x s32>) 4865 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 4866 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_8xv5i32 4867 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY [[COPY7]] 4868 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY6]] 4869 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY5]] 4870 ; CHECK: [[COPY12:%[0-9]+]]:_(s64) = COPY [[COPY4]] 4871 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[COPY3]] 4872 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY2]] 4873 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY1]] 4874 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 4875 ; CHECK: $vgpr0 = COPY [[UV]](s32) 4876 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 4877 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 4878 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 4879 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 4880 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 4881 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 4882 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 4883 ; CHECK: $vgpr8 = COPY [[UV8]](s32) 4884 ; CHECK: $vgpr9 = COPY [[UV9]](s32) 4885 ; CHECK: $vgpr10 = COPY [[UV10]](s32) 4886 ; CHECK: $vgpr11 = COPY [[UV11]](s32) 4887 ; CHECK: $vgpr12 = COPY [[UV12]](s32) 4888 ; CHECK: $vgpr13 = COPY [[UV13]](s32) 4889 ; CHECK: $vgpr14 = COPY [[UV14]](s32) 4890 ; CHECK: $vgpr15 = COPY [[UV15]](s32) 4891 ; CHECK: $vgpr16 = COPY [[UV16]](s32) 4892 ; CHECK: $vgpr17 = COPY [[UV17]](s32) 4893 ; CHECK: $vgpr18 = COPY [[UV18]](s32) 4894 ; CHECK: $vgpr19 = COPY [[UV19]](s32) 4895 ; CHECK: $vgpr20 = COPY [[UV20]](s32) 4896 ; CHECK: $vgpr21 = COPY [[UV21]](s32) 4897 ; CHECK: $vgpr22 = COPY [[UV22]](s32) 4898 ; CHECK: $vgpr23 = COPY [[UV23]](s32) 4899 ; CHECK: $vgpr24 = COPY [[UV24]](s32) 4900 ; CHECK: $vgpr25 = COPY [[UV25]](s32) 4901 ; CHECK: $vgpr26 = COPY [[UV26]](s32) 4902 ; CHECK: $vgpr27 = COPY [[UV27]](s32) 4903 ; CHECK: $vgpr28 = COPY [[UV28]](s32) 4904 ; CHECK: $vgpr29 = COPY [[UV29]](s32) 4905 ; CHECK: $vgpr30 = COPY [[UV30]](s32) 4906 ; CHECK: [[COPY17:%[0-9]+]]:_(p5) = COPY $sgpr32 4907 ; CHECK: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 4908 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C16]](s32) 4909 ; CHECK: G_STORE [[UV31]](s32), [[PTR_ADD]](p5) :: (store 4 into stack, align 16, addrspace 5) 4910 ; CHECK: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4911 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C17]](s32) 4912 ; CHECK: G_STORE [[UV32]](s32), [[PTR_ADD1]](p5) :: (store 4 into stack + 4, addrspace 5) 4913 ; CHECK: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4914 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C18]](s32) 4915 ; CHECK: G_STORE [[UV33]](s32), [[PTR_ADD2]](p5) :: (store 4 into stack + 8, align 8, addrspace 5) 4916 ; CHECK: [[C19:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 4917 ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C19]](s32) 4918 ; CHECK: G_STORE [[UV34]](s32), [[PTR_ADD3]](p5) :: (store 4 into stack + 12, addrspace 5) 4919 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4920 ; CHECK: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C20]](s32) 4921 ; CHECK: G_STORE [[UV35]](s32), [[PTR_ADD4]](p5) :: (store 4 into stack + 16, align 16, addrspace 5) 4922 ; CHECK: [[C21:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 4923 ; CHECK: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C21]](s32) 4924 ; CHECK: G_STORE [[UV36]](s32), [[PTR_ADD5]](p5) :: (store 4 into stack + 20, addrspace 5) 4925 ; CHECK: [[C22:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4926 ; CHECK: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C22]](s32) 4927 ; CHECK: G_STORE [[UV37]](s32), [[PTR_ADD6]](p5) :: (store 4 into stack + 24, align 8, addrspace 5) 4928 ; CHECK: [[C23:%[0-9]+]]:_(s32) = G_CONSTANT i32 28 4929 ; CHECK: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C23]](s32) 4930 ; CHECK: G_STORE [[UV38]](s32), [[PTR_ADD7]](p5) :: (store 4 into stack + 28, addrspace 5) 4931 ; CHECK: [[C24:%[0-9]+]]:_(s32) = G_CONSTANT i32 32 4932 ; CHECK: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C24]](s32) 4933 ; CHECK: G_STORE [[UV39]](s32), [[PTR_ADD8]](p5) :: (store 4 into stack + 32, align 16, addrspace 5) 4934 ; CHECK: [[COPY18:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 4935 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY18]](<4 x s32>) 4936 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY9]](p4) 4937 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY10]](p4) 4938 ; CHECK: $sgpr8_sgpr9 = COPY [[COPY11]](p4) 4939 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY12]](s64) 4940 ; CHECK: $sgpr12 = COPY [[COPY13]](s32) 4941 ; CHECK: $sgpr13 = COPY [[COPY14]](s32) 4942 ; CHECK: $sgpr14 = COPY [[COPY15]](s32) 4943 ; CHECK: $vgpr31 = COPY [[COPY16]](s32) 4944 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_8xv5i32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 4945 ; CHECK: ADJCALLSTACKDOWN 0, 36, implicit-def $scc 4946 ; CHECK: [[COPY19:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]] 4947 ; CHECK: S_SETPC_B64_return [[COPY19]] 4948entry: 4949 call void @external_void_func_8xv5i32( 4950 <5 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0>, 4951 <5 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1>, 4952 <5 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2>, 4953 <5 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3>, 4954 <5 x i32> <i32 4, i32 4, i32 4, i32 4, i32 4>, 4955 <5 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5>, 4956 <5 x i32> <i32 6, i32 7, i32 8, i32 9, i32 10>, 4957 <5 x i32> <i32 11, i32 12, i32 13, i32 14, i32 15>) 4958 ret void 4959} 4960 4961define void @stack_8xv5f32() #0 { 4962 ; CHECK-LABEL: name: stack_8xv5f32 4963 ; CHECK: bb.1.entry: 4964 ; CHECK: liveins: $sgpr12, $sgpr13, $sgpr14, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31 4965 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr31 4966 ; CHECK: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr14 4967 ; CHECK: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr13 4968 ; CHECK: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr12 4969 ; CHECK: [[COPY4:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 4970 ; CHECK: [[COPY5:%[0-9]+]]:sgpr_64 = COPY $sgpr8_sgpr9 4971 ; CHECK: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 4972 ; CHECK: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 4973 ; CHECK: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 4974 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00 4975 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32) 4976 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00 4977 ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32), [[C1]](s32), [[C1]](s32), [[C1]](s32) 4978 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.000000e+00 4979 ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C2]](s32), [[C2]](s32), [[C2]](s32), [[C2]](s32), [[C2]](s32) 4980 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_FCONSTANT float 3.000000e+00 4981 ; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C3]](s32), [[C3]](s32), [[C3]](s32), [[C3]](s32), [[C3]](s32) 4982 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_FCONSTANT float 4.000000e+00 4983 ; CHECK: [[BUILD_VECTOR4:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C4]](s32), [[C4]](s32), [[C4]](s32), [[C4]](s32), [[C4]](s32) 4984 ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_FCONSTANT float 5.000000e+00 4985 ; CHECK: [[BUILD_VECTOR5:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C5]](s32), [[C5]](s32), [[C5]](s32), [[C5]](s32), [[C5]](s32) 4986 ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_FCONSTANT float 6.000000e+00 4987 ; CHECK: [[C7:%[0-9]+]]:_(s32) = G_FCONSTANT float 7.000000e+00 4988 ; CHECK: [[C8:%[0-9]+]]:_(s32) = G_FCONSTANT float 8.000000e+00 4989 ; CHECK: [[C9:%[0-9]+]]:_(s32) = G_FCONSTANT float 9.000000e+00 4990 ; CHECK: [[C10:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+01 4991 ; CHECK: [[BUILD_VECTOR6:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C6]](s32), [[C7]](s32), [[C8]](s32), [[C9]](s32), [[C10]](s32) 4992 ; CHECK: [[C11:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.100000e+01 4993 ; CHECK: [[C12:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.200000e+01 4994 ; CHECK: [[C13:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.300000e+01 4995 ; CHECK: [[C14:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.400000e+01 4996 ; CHECK: [[C15:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.500000e+01 4997 ; CHECK: [[BUILD_VECTOR7:%[0-9]+]]:_(<5 x s32>) = G_BUILD_VECTOR [[C11]](s32), [[C12]](s32), [[C13]](s32), [[C14]](s32), [[C15]](s32) 4998 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<5 x s32>) 4999 ; CHECK: [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR1]](<5 x s32>) 5000 ; CHECK: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR2]](<5 x s32>) 5001 ; CHECK: [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR3]](<5 x s32>) 5002 ; CHECK: [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR4]](<5 x s32>) 5003 ; CHECK: [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR5]](<5 x s32>) 5004 ; CHECK: [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32), [[UV32:%[0-9]+]]:_(s32), [[UV33:%[0-9]+]]:_(s32), [[UV34:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR6]](<5 x s32>) 5005 ; CHECK: [[UV35:%[0-9]+]]:_(s32), [[UV36:%[0-9]+]]:_(s32), [[UV37:%[0-9]+]]:_(s32), [[UV38:%[0-9]+]]:_(s32), [[UV39:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR7]](<5 x s32>) 5006 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $scc 5007 ; CHECK: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_void_func_8xv5f32 5008 ; CHECK: [[COPY9:%[0-9]+]]:_(p4) = COPY [[COPY7]] 5009 ; CHECK: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY6]] 5010 ; CHECK: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY5]] 5011 ; CHECK: [[COPY12:%[0-9]+]]:_(s64) = COPY [[COPY4]] 5012 ; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[COPY3]] 5013 ; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY2]] 5014 ; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY1]] 5015 ; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 5016 ; CHECK: $vgpr0 = COPY [[UV]](s32) 5017 ; CHECK: $vgpr1 = COPY [[UV1]](s32) 5018 ; CHECK: $vgpr2 = COPY [[UV2]](s32) 5019 ; CHECK: $vgpr3 = COPY [[UV3]](s32) 5020 ; CHECK: $vgpr4 = COPY [[UV4]](s32) 5021 ; CHECK: $vgpr5 = COPY [[UV5]](s32) 5022 ; CHECK: $vgpr6 = COPY [[UV6]](s32) 5023 ; CHECK: $vgpr7 = COPY [[UV7]](s32) 5024 ; CHECK: $vgpr8 = COPY [[UV8]](s32) 5025 ; CHECK: $vgpr9 = COPY [[UV9]](s32) 5026 ; CHECK: $vgpr10 = COPY [[UV10]](s32) 5027 ; CHECK: $vgpr11 = COPY [[UV11]](s32) 5028 ; CHECK: $vgpr12 = COPY [[UV12]](s32) 5029 ; CHECK: $vgpr13 = COPY [[UV13]](s32) 5030 ; CHECK: $vgpr14 = COPY [[UV14]](s32) 5031 ; CHECK: $vgpr15 = COPY [[UV15]](s32) 5032 ; CHECK: $vgpr16 = COPY [[UV16]](s32) 5033 ; CHECK: $vgpr17 = COPY [[UV17]](s32) 5034 ; CHECK: $vgpr18 = COPY [[UV18]](s32) 5035 ; CHECK: $vgpr19 = COPY [[UV19]](s32) 5036 ; CHECK: $vgpr20 = COPY [[UV20]](s32) 5037 ; CHECK: $vgpr21 = COPY [[UV21]](s32) 5038 ; CHECK: $vgpr22 = COPY [[UV22]](s32) 5039 ; CHECK: $vgpr23 = COPY [[UV23]](s32) 5040 ; CHECK: $vgpr24 = COPY [[UV24]](s32) 5041 ; CHECK: $vgpr25 = COPY [[UV25]](s32) 5042 ; CHECK: $vgpr26 = COPY [[UV26]](s32) 5043 ; CHECK: $vgpr27 = COPY [[UV27]](s32) 5044 ; CHECK: $vgpr28 = COPY [[UV28]](s32) 5045 ; CHECK: $vgpr29 = COPY [[UV29]](s32) 5046 ; CHECK: $vgpr30 = COPY [[UV30]](s32) 5047 ; CHECK: [[COPY17:%[0-9]+]]:_(p5) = COPY $sgpr32 5048 ; CHECK: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 5049 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C16]](s32) 5050 ; CHECK: G_STORE [[UV31]](s32), [[PTR_ADD]](p5) :: (store 4 into stack, align 16, addrspace 5) 5051 ; CHECK: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5052 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C17]](s32) 5053 ; CHECK: G_STORE [[UV32]](s32), [[PTR_ADD1]](p5) :: (store 4 into stack + 4, addrspace 5) 5054 ; CHECK: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5055 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C18]](s32) 5056 ; CHECK: G_STORE [[UV33]](s32), [[PTR_ADD2]](p5) :: (store 4 into stack + 8, align 8, addrspace 5) 5057 ; CHECK: [[C19:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 5058 ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C19]](s32) 5059 ; CHECK: G_STORE [[UV34]](s32), [[PTR_ADD3]](p5) :: (store 4 into stack + 12, addrspace 5) 5060 ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5061 ; CHECK: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C20]](s32) 5062 ; CHECK: G_STORE [[UV35]](s32), [[PTR_ADD4]](p5) :: (store 4 into stack + 16, align 16, addrspace 5) 5063 ; CHECK: [[C21:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 5064 ; CHECK: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C21]](s32) 5065 ; CHECK: G_STORE [[UV36]](s32), [[PTR_ADD5]](p5) :: (store 4 into stack + 20, addrspace 5) 5066 ; CHECK: [[C22:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 5067 ; CHECK: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C22]](s32) 5068 ; CHECK: G_STORE [[UV37]](s32), [[PTR_ADD6]](p5) :: (store 4 into stack + 24, align 8, addrspace 5) 5069 ; CHECK: [[C23:%[0-9]+]]:_(s32) = G_CONSTANT i32 28 5070 ; CHECK: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C23]](s32) 5071 ; CHECK: G_STORE [[UV38]](s32), [[PTR_ADD7]](p5) :: (store 4 into stack + 28, addrspace 5) 5072 ; CHECK: [[C24:%[0-9]+]]:_(s32) = G_CONSTANT i32 32 5073 ; CHECK: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY17]], [[C24]](s32) 5074 ; CHECK: G_STORE [[UV39]](s32), [[PTR_ADD8]](p5) :: (store 4 into stack + 32, align 16, addrspace 5) 5075 ; CHECK: [[COPY18:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 5076 ; CHECK: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY18]](<4 x s32>) 5077 ; CHECK: $sgpr4_sgpr5 = COPY [[COPY9]](p4) 5078 ; CHECK: $sgpr6_sgpr7 = COPY [[COPY10]](p4) 5079 ; CHECK: $sgpr8_sgpr9 = COPY [[COPY11]](p4) 5080 ; CHECK: $sgpr10_sgpr11 = COPY [[COPY12]](s64) 5081 ; CHECK: $sgpr12 = COPY [[COPY13]](s32) 5082 ; CHECK: $sgpr13 = COPY [[COPY14]](s32) 5083 ; CHECK: $sgpr14 = COPY [[COPY15]](s32) 5084 ; CHECK: $vgpr31 = COPY [[COPY16]](s32) 5085 ; CHECK: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_void_func_8xv5f32, csr_amdgpu_highregs, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4, implicit $vgpr5, implicit $vgpr6, implicit $vgpr7, implicit $vgpr8, implicit $vgpr9, implicit $vgpr10, implicit $vgpr11, implicit $vgpr12, implicit $vgpr13, implicit $vgpr14, implicit $vgpr15, implicit $vgpr16, implicit $vgpr17, implicit $vgpr18, implicit $vgpr19, implicit $vgpr20, implicit $vgpr21, implicit $vgpr22, implicit $vgpr23, implicit $vgpr24, implicit $vgpr25, implicit $vgpr26, implicit $vgpr27, implicit $vgpr28, implicit $vgpr29, implicit $vgpr30, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $vgpr31 5086 ; CHECK: ADJCALLSTACKDOWN 0, 36, implicit-def $scc 5087 ; CHECK: [[COPY19:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY8]] 5088 ; CHECK: S_SETPC_B64_return [[COPY19]] 5089entry: 5090 call void @external_void_func_8xv5f32( 5091 <5 x float> <float 0.0, float 0.0, float 0.0, float 0.0, float 0.0>, 5092 <5 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, 5093 <5 x float> <float 2.0, float 2.0, float 2.0, float 2.0, float 2.0>, 5094 <5 x float> <float 3.0, float 3.0, float 3.0, float 3.0, float 3.0>, 5095 <5 x float> <float 4.0, float 4.0, float 4.0, float 4.0, float 4.0>, 5096 <5 x float> <float 5.0, float 5.0, float 5.0, float 5.0, float 5.0>, 5097 <5 x float> <float 6.0, float 7.0, float 8.0, float 9.0, float 10.0>, 5098 <5 x float> <float 11.0, float 12.0, float 13.0, float 14.0, float 15.0>) 5099 ret void 5100} 5101 5102attributes #0 = { nounwind } 5103attributes #1 = { nounwind readnone } 5104attributes #2 = { nounwind noinline } 5105